測試考量

CHAPTER 5 Measurement Result

圖5.31 完整可變增益低雜訊放大器電路架構

CHAPTER 5 Measurement Result

VL VM VH

R Rbias_b_1

C Cg L Lg R=

C DC_block1

Term Term1 Num=1 V_DC SRC7 Vdc=1.8 V

C DC_block2

MM9_NMOS M33

R Rbias_ref TSMC_CM01 100

wr=2.5 um lr=0.18 um Type=1.8V triple-well

8RF_NMOS_RF

nr=40 V_DC SRC8 Vdc=1.8 V

MM9_NMOS M31 R

Rb_2 R

Rb_1

Port P3 Po P2 rt Port P1

R Rbias_a_2 R Rbias_a_1

Term Term2 Num=2 MM9_NMOS

M30

MM9_NMOS M32 L

Ls_2 R=

MM9_NMOS M29

L RFChoke_2 R=

L=1.0 nH

MM9_NMOS M27

R R_1

R R_3 R R_2

MM9_NMOS M28

C DC_block

R Rbias_b_2 MM9_NMOS

M2

L Ls_1 R=

L RFChoke_1 R=

Input Matching

Output Matching

M3 Bondwire M4 Low Gain

Mode PAD

M1 BondWire

M5 Medium Gain Mode PAD

M6 High Gain Mode PAD

圖5.33 本論文可變增益低雜訊放大器 ( VGLNA ) 的電路示意圖

在上圖5.32 所示之『可變增益的低雜訊放大器( Variable Gain Low Noise Amplifier，VGLNA )』電路佈局圖其長為 1090um 而寬為 880um。

5.2.1 測試環境

一般依照測試的方式大約可將其區分為兩種型式，一種是on-wafer 的 量測如圖5.34 所示，而另一種為 PCB Board 的量測，至於要選擇那一種方 式進行量測端看我們設計者實際在設計時所作的考量來作決定；而由於在 進行電路測試時有考慮鎊線( Bonding Wire )效應並將其視為電路設計時內 部電感的一部分，因此本電路將使用PCB Board 來進行量測，在圖 5.35 所示為本論文之測試示意圖，而圖5.36 所示為對於 Chip 在 PCB 板上的放 置以及Bondwire 的簡單示意圖：

CHAPTER 5 Measurement Result

圖5.34 低雜訊放大器 On-wafer 量測示意圖

圖5.35 低雜訊放大器 On-board 量測示意圖

圖5.36 Chip 於 PCB Board 上之置放示意圖

PCB SMA Line Bond wire Componen

RFin

Chip

RFout

Via Hole DC

本實驗室之 HP8719 網路分析儀

PCB Board

CHAPTER 5 Measurement Result

如圖5.37 所示為此電路『可變增益的低雜訊放大器( Variable Gain Low Noise Amplifier，VGLNA )』在考量銲墊( Bonding PADs )以及鎊線(Bonding Wire)效應後的電路模擬圖，雖然在加入此兩項影響所造成的頻率偏移是可 以預期的，但仍需想辦法去對其進行改善。

由於頻率偏移最主要會使的前、後級匹配電路不匹配，而使S11 與 S22 這兩個反射係數(Reflection coefficient)變差，改善其最主要有兩種方法，一 種是在回去修改原來的匹配電路，另一種是在PCB 板上利用被動元件再進 行匹配，在此選擇使用第二種方法來進行匹配，將利用傳輸線與SMD 元 件將偏離的部分重新進行阻抗匹配，重新將S-parameter 匹配至 50Ω。下圖 為考量銲墊與鎊線之電路示意圖：

gnd1gnd1 gnd1 gnd1 gnd1

V4 V1

V7 V3

V5 V2

gnd1 gnd1 gnd1

Vdd1

V6

Vdd2

gnd1

gnd1

Vdd1 Vdd2

Vdd2

gnd1

C C94 C=0. 0814472 pF

R R55 R=625 O hm C C53 C=0. 065 pF

R R54 R=0. 25 O hm L L25 R=

L=0. 8 nH TSM C_CM 018RF_M I M CAP

C59 Cs=0. 95098 pF lt =29. 403 um TSM C_CM 018RF_M I M CAP C58 Cs=0. 95098 pF lt =29. 403 um C C52 C=0. 065 pF

R R53 R=625 O hm L L24 R=L=0. 8 nH R R52 R=0. 25 O hm

V_DC SRC8 Vdc=1. 8 V L L23 R=

L=1. 2 nH R R50 R=0. 375 O hm C C101 C=0. 065 pF

R R99 R=625 O hm V_DCSRC7

Vdc=1. 8 V R

R35 R=625 O hm C C19 C=0. 065 pF L L19 R=

L=1. 2 nH R R43 R=0. 375 O hm DisplayTem plat e

dispt em p2

" Cir cles_St abilit y"

" Cir cles_G a_NF"

T e mpD is p M easEqn

M eas16 y = yopt ( Sopt , 50) E q n M e a s

M easEqn M eas12 G am m a_Sour ce=Sopt E q n

M e a s M easEqn

M eas14 G am m a_Load=conj( G am m a_O ut ) E q n Me a s

M easEqn M eas11

G am m a_O ut =S22+[ ( S12*S21*G am m a_Sour ce) / ( 1- S11*G am m a_Sour ce) ] E q n

M e a s

M easEqn M eas13

G am m a_I N=S11+[ ( S12*S21*G am m a_Load) / ( 1- S22*G am m a_Load) ] E q n

M e a s St abFact

St abFact 1 K=st ab_f act ( S) St abFact

St abM eas St abM eas1 B=st ab_m eas( S) St abM eas

Sm G am m a1 Sm G am m a1 G am m a_M S=sm _gam m a1( S) SmGamma1

N Sm G am m a2 Sm G am m a2 G am m a_M L=sm _gam m a2( S) SmGamma2N O pt ions

O pt ions1

M axWar nings=10 G iveAllWar nings=yes I _AbsTol=1e- 12 A I _RelTol=1e- 6 V_AbsTol=1e- 6 V V_RelTol=1e- 6 TopologyCheck=yes Tnom =25 Tem p=16. 85

OPTIONS S_Par am

SP1

Fr eq=

St ep=25 M Hz St op=10 G Hz St ar t =0. 1 G Hz

S-PARAM ETERS

TSM C_CM 018RF_PRO CESS TSM C_CM 018RF_PRO CESS

Resist ance=Wor st RFCor ner Case=TT BI PCor ner Case=TT Cor ner Case=TT

Si - Subst r at e TSM C RF CM OS 0 .18um

R R98 R=625 O hm C C100 C=0. 065 pF C C95 C=0. 065 pF

R R93 R=625 O hm C C96 C=0. 065 pF

R R94 R=625 O hm R R95 R=625 O hm C C97 C=0. 065 pF C C98 C=0. 065 pF

R R96 R=625 O hm R R97 R=625 O hm C C99 C=0. 065 pF C C74 C=0. 065 pF

R R85 R=625 O hm C C73 C=0. 065 pF

R R84 R=625 O hm R R83 R=625 O hm C C72 C=0. 065 pF C C75 C=0. 065 pF

R R86 R=625 O hm R R92 R=0. 375 O hm

L L43 R=L=1. 2 nH LL42 R=

L=1. 2 nH R R91 R=0. 375 O hm R R90 R=0. 375 O hm

L L41 R=

L=1. 2 nH L L33 R=

L=1. 2 nH R R77 R=0. 375 O hm R R78 R=0. 375 O hm

L L34 R=

L=1. 2 nH R R79 R=0. 375 O hm

L L35 R=

L=1. 2 nH R R88 R=0. 375 O hm

L L39 R=

L=1. 2 nH L L38 R=

L=1. 2 nH R R82 R=0. 375 O hm R R81 R=0. 375 O hm

L L37 R=

L=1. 2 nH R R80 R=0. 375 O hm

L L36 R=

L=1. 2 nH L L40 R=

L=1. 2 nH R R89 R=0. 375 O hm

R R87 R=625 O hm C C76 C=0. 065 pF

TSM C_CM 018RF_NM O S_RF M 29

nr =20 wr =2. 5 um lr =0. 18 um Type=1. 8V t r iple- well R

R72 R=0. 5 O hm L L32 R=

L=1. 6 nH R

R60 R=0. 5 O hm L L27 R=

L=1. 6 nH TSM C_CM 018RF_M I M CAP C60 Cs=0. 158 pF lt =12 um

V_DC SRC12 Vdc=1. 8 V R R47 R=0. 375 O hm TSM C_CM 018RF_SPI RAL_TURN

L29 Ls=3. 799 nH nr =3. 5

C C47 C=0. 065 pF

R R51 R=625 O hm

TSM C_CM 018RF_RES R68

R=143. 34 O hm l=40 um w=2 um Type=N+ Poly w/ i silicide ( w>=2. 0) ( RF)

TSM C_CM 018RF_NM O S_RF M 30

nr =20 wr =2. 5 um lr =0. 18 um Type=1. 8V t r iple- well TSM C_CM 018RF_SPI RAL_TURN

L26 Ls=2. 369 nH nr =2. 5

TSM C_CM 018RF_M I M CAP C57 Cs=0. 95 pF lt =29. 388 um

TSM C_CM 018RF_M I M CAP C56 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_M I M CAP

C31 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_M I M CAP C30 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_M I M CAP C28 Cs=0. 95 pF lt =29. 388 um

TSM C_CM 018RF_M I M CAP C29 Cs=0. 95 pF lt =29. 388 um

Ter m Ter m 1 Z=50 O hm Num =1

TSM C_CM 018RF_M I M CAP C51 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_M I M CAP C48 Cs=0. 95 pF lt =29. 388 um

TSM C_CM 018RF_M I M CAP C50 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_M I M CAP C49 Cs=0. 95 pF lt =29. 388 um

TSM C_CM 018RF_NM O S_RF M 37

nr =20 wr =2. 5 um lr =0. 18 um Type=1. 8V t r iple- well

Ter m Ter m 2 Z=50 O hm Num =2 L

L21 R=

L=1. 2 nH R

R70 R=0. 375 O hm

L L31 R=

L=1. 2 nH

R R69 R=625 O hm C C64 C=0. 065 pF TSM C_CM 018RF_M I M CAP

C66 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_M I M CAP C65 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_M I M CAP C63 Cs=0. 95 pF lt =29. 388 um

TSM C_CM 018RF_M I M CAP C62 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_RES R66

R=114. 67 O hm l=32 um w=2 um Type=N+ Poly w/ i silicide ( w>=2. 0) ( RF)

TSM C_CM 018RF_NM O S_RF M 33

nr =30 wr =2. 5 um lr =0. 18 um Type=1. 8V t r iple- well TSM C_CM 018RF_RES

R65

R=143. 34 O hm l=40 um w=2 um Type=N+ Poly w/ i silicide ( w>=2. 0) ( RF) TSM C_CM 018RF_RES R64

R=143. 34 O hm l=40 um w=2 um Type=N+ Poly w/ i silicide ( w>=2. 0) ( RF)

R R44 R=0. 375 O hm

L L20 R=

L=1. 2 nH TSM C_CM 018RF_NM O S_RF

M 34

nr =16 wr =2. 5 um lr =0. 18 um Type=1. 8V t r iple- well TSM C_CM 018RF_M I M CAP C35 Cs=0. 99 pF lt =30 um

TSM C_CM 018RF_M I M CAP C33 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_M I M CAP C36 Cs=0. 95 pF lt =29. 388 um

TSM C_CM 018RF_M I M CAP C34 Cs=0. 95 pF lt =29. 388 um C C32 C=0. 065 pF

R R45 R=625 O hm

R R73 R=625 O hm C C68 C=0. 065 pF

TSM C_CM 018RF_NM O S_RF M 31

nr =120 wr =2. 5 um lr =0. 18 um Type=1. 8V t r iple- well TSM C_CM 018RF_RES

R58

R=20 kO hm l=35. 87 um w=2 um Type=HRI P- Poly w/ o silicide

TSM C_CM 018RF_NM O S_RF M 36

nr =64 wr =2. 5 um lr =0. 18 um Type=1. 8V t r iple- well TSM C_CM 018RF_NM O S_RF M 35

nr =42 wr =2. 5 um lr =0. 18 um Type=1. 8V t r iple- well

C C67 C=0. 065 pF

R R71 R=625 O hm TSM C_CM 018RF_RES R59

R=10 kO hm l=18. 103 um w=2 um Type=HRI P- Poly w/ o silicide

TSM C_CM 018RF_M I M CAP C61 Cs=0. 9516 pF lt =29. 412 um

TSM C_CM 018RF_RES R63

R=10 kO hm l=18. 103 um w=2 um Type=HRI P- Poly w/ o silicide TSM C_CM 018RF_RES R62

R=20 kO hm l=35. 87 um w=2 um Type=HRI P- Poly w/ o silicide

TSM C_CM 018RF_SPI RAL_TURN L30 Ls=2. 369 nH nr =2. 5

R R46 R=625 O hm C C39 C=0. 065 pF TSM C_CM 018RF_M I M CAP

C41 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_M I M CAP C40 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_M I M CAP C38 Cs=0. 95 pF lt =29. 388 um

TSM C_CM 018RF_M I M CAP C37 Cs=0. 95 pF lt =29. 388 um TSM C_CM 018RF_RES R67

R=75 O hm l=20. 929 um w=2 um Type=N+ Poly w/ i silicide ( w>=2. 0) ( RF)

TSM C_CM 018RF_NM O S_RF M 32

nr =120 wr =2. 5 um lr =0. 18 um Type=1. 8V t r iple- well

圖5.37 考量 PAD 和 Bond Wire 效應的 VGLNA 電路模擬圖

High Gain Mode:

[S-parameter、Noise Figure、Stability]

CHAPTER 5 Measurement Result

m2freq=

dB(S(2,1))=19.6865.250GHz m3 freq=

dB(S(1,2))=-34.0005.250GHz

2 4 6 8

0 10

-50 0

-100 50

freq, GHz

dB(S(2,1))

m2

dB(S(1,2))

m3

m4freq=

dB(S(1,1))=-17.5145.250GHz m5freq=

dB(S(2,2))=-22.8055.250GHz

6.6 8.6

4.6 10.0

-20 -10 0 10

-30 20

freq, GHz

dB(S(1,1))

dB(S(2,2)) m4

m5

m6freq=

nf(2)=2.8015.250GHz m7 freq=

NFmin=2.6165.250GHz

2 4 6 8

0 10

10 20 30 40

0 50

freq, GHz

nf(2)

m6

NFmin

m7

m8freq=

mu_source=3.185.250GHz m9 freq=

mu_load=4.0825.250GHz

2 4 6 8

0 10

0 1 2 3 4

-1 5

freq, GHz

meu_sourc

m8

mu_load

m9

圖5.38 可變增益低雜訊放大器 S 參數、雜訊指數與穩定度之模擬圖(H) [考量銲墊以及鎊線效應]

[IP1dB、IMD]

m2Pin=

dB_gain=18.449-18.500 m3

Pin=Pout=1.186-18.500m4

Pin=dbm_out=-0.051-18.500

-80 -60 -40 -20 0

-100 20

-60 -40 -20 0 20

-80 40

Pin

Pout

m3

dbm_out

m4

dB_gain

m2

m3freq=

dBm(mix(Vout,tones))=-86.3285.280GHz m2freq=

dBm(mix(Vout,tones))=-20.3835.260GHz

5.23 5.24 5.25 5.26 5.27

5.22 5.28

-80 -60 -40

-100 -20

m3 m2

freq, GHz

dBm(mix(Vout,tones))

圖5.39 可變增益低雜訊放大器 IP1dB 與 IMD 模擬圖(H) [考量銲墊以及鎊線效應]

Medium Gain Mode:

[S-parameter、Noise Figure、Stability]

CHAPTER 5 Measurement Result

m2freq=

dB(S(2,1))=16.4705.250GHz m3 freq=

dB(S(1,2))=-31.8615.250GHz

2 4 6 8

0 10

-50 0

-100 50

freq, GHz

dB(S(2,1))

m2

dB(S(1,2))

m3

m4freq=

dB(S(1,1))=-18.4705.250GHz m5freq=

dB(S(2,2))=-20.3405.250GHz

6.6 8.6

4.6 10.0

-20 -15 -10 -5

-25 0

freq, GHz

dB(S(1,1))

dB(S(2,2)) m4

m5

m6freq=

nf(2)=2.9195.250GHz m7 freq=

NFmin=2.7425.250GHz

2 4 6 8

0 10

10 20 30 40

0 50

freq, GHz

nf(2)

m6

NFmin

m7

m8freq=

mu_source=3.615.250GHz m9 freq=

mu_load=3.9865.250GHz

2 4 6 8

0 10

1 2 3 4 5

0 6

freq, GHz

meu_sourc

m8

mu_load

m9

圖5.40 可變增益低雜訊放大器 S 參數、雜訊指數與穩定度之模擬圖(M) [考量銲墊以及鎊線效應]

[IP1dB、IMD]

m2Pin=

dB_gain=15.453-19.000 m3

Pin=Pout=-2.530-19.000m4

Pin=dbm_out=-3.547-19.000

-80 -60 -40 -20 0

-100 20

-60 -40 -20 0 20

-80 40

Pin

Pout

m3

dbm_out m4

dB_gain

m2

m3freq=

dBm(mix(Vout,tones))=-85.0095.280GHz m2freq=

dBm(mix(Vout,tones))=-23.5965.260GHz

5.23 5.24 5.25 5.26 5.27

5.22 5.28

-80 -60 -40

-100 -20

m3 m2

freq, GHz

dBm(mix(Vout,tones))

圖5.41 可變增益低雜訊放大器 IP1dB 與 IMD 模擬圖(M) [考量銲墊以及鎊線效應]

Low Gain Mode:

[S-parameter、Noise Figure、Stability]

CHAPTER 5 Measurement Result

m2freq=

dB(S(2,1))=12.1905.250GHz m3 freq=

dB(S(1,2))=-30.8475.250GHz

2 4 6 8

0 10

-50 0

-100 50

freq, GHz

dB(S(2,1))

m2

dB(S(1,2))

m3

m4freq=

dB(S(1,1))=-13.1345.250GHz m5freq=

dB(S(2,2))=-15.2635.250GHz

6.6 8.6

4.6 10.0

-20 -15 -10 -5

-25 0

freq, GHz

dB(S(1,1))

m4

dB(S(2,2))

m5

m6freq=

nf(2)=3.1635.250GHz m7 freq=

NFmin=2.9925.250GHz

2 4 6 8

0 10

10 20 30 40 50

0 60

freq, GHz

nf(2)

m6

NFmin

m7

m8freq=

mu_source=3.045.250GHz m9 freq=

mu_load=3.5655.250GHz

2 4 6 8

0 10

2 3 4 5

1 6

freq, GHz

meu_sourc

m8

mu_load

m9

圖5.42 可變增益低雜訊放大器 S 參數、雜訊指數與穩定度之模擬圖(L) [考量銲墊以及鎊線效應]

[IP1dB、IMD]

m2Pin=

dB_gain=11.100-13.500 m3

Pin=Pout=-1.310-13.500m4

Pin=dbm_out=-2.400-13.500

-80 -60 -40 -20 0

-100 20

-60 -40 -20 0 20

-80 40

Pin

Pout

m3

dbm_out m4

dB_gain

m2

m3freq=

dBm(mix(Vout,tones))=-93.6175.280GHz m2freq=

dBm(mix(Vout,tones))=-27.8725.260GHz

5.23 5.24 5.25 5.26 5.27

5.22 5.28

-80 -60 -40

-100 -20

m3 m2

freq, GHz

dBm(mix(Vout,tones))

圖5.43 可變增益低雜訊放大器 IP1dB 與 IMD 模擬圖(L) [考量銲墊以及鎊線效應]

下表5.3 為考慮 PAD 及 Bondwire 效應之模擬結果列表：

Frequency Range 5.15~5.825 GHz

CHAPTER 5 Measurement Result

Process TSMC CMOS 0.18um Vdd (V) 1.8

Gain Mode High Medium Low S11 (dB) -17.51 -18.47 -13.13 S22 (dB) -22.8 -20.34 -15.26 S21 (dB) 19.68 16.47 12.19 S12 (dB) -34 -31.86 -30.84 Noise Figure (dB) 2.801 2.919 3.163

IP1dB (dBm) -18.5 -19 -13.5 IIP3 (dBm) -7.09 -9.355 -7.19

表5.3 本論文 5-GHz U-NII band VGLNA 設計模擬特性表( 考慮 PAD , Bond Wire )

如圖5.44 所示為散射係數(S-parameter)之 PCB Board 儀器連接示意圖：

圖5.44 S 參數 PCB Board 量測示意圖

如圖5.45 所示為 P1dB 之 PCB Board 儀器連接示意圖：

圖5.45 P1dB PCB Board 量測示意圖

如圖5.46 所示為 IP3 之 PCB Board 儀器連接示意圖：

CHAPTER 5 Measurement Result

圖5.46 IP3 PCB Board 量測示意圖

5.2.2 測試方式

接下來所要介紹的是測試的方式；之前曾經有提到過測試的方法大約 是分為兩種方式，並且曾經提及此晶片所要採取的量測方式，因此在這方 面便不再多以贅述；如圖5.47 所示，為使用 Protel 此套軟體所繪的 On PCB Board 量測之示意圖，而在 50Ω傳輸線的設計方式，是採用 CPWG(Coplanar Waveguide-Ground)的設計方式，希望能藉此方式降低整體電路的雜訊指數 並儘可能減少其EMI 的輻射。

0402高中低頻之濾波電容 0603之RF Choke

0402高中低頻之濾波電容 0603之RF Choke

Input Matching Network Output Matching Network

RFin RFout

Vdd(2) Vdd(1)VL VM VH

CHIP

0402高中低頻之濾波電容 0603之RF Choke

0402高中低頻之濾波電容 0603之RF Choke

Input Matching Network Output Matching Network

RFin RFout

Vdd(2) Vdd(1)VL VM VH

CHIP

圖5.47 PCB Board 量測方式的示意圖

而因為在設計50Ω傳輸線時是採用 CPWG(Coplanar Waveguide -Ground)的

CHAPTER 5 Measurement Result

設計方式，採取此種設計方式有一個好處就是進行Calibration Deembeding 的動作時TRL 與 SOLT ( Full two port )這兩種 Calibration 的方式都允許被 使用，並不需要在作另外的一套設計，唯一需要就是必須再額外設計一組 供TRL Calibration 所使用的治具，且此治具在設計時也必須採取 CPWG (Coplanar Waveguide -Ground)的設計方式。

在文檔中 題目：應用於 IEEE 802.11 a 5 GHz U-NII Band 之可變增益低雜訊放大器的設計 (頁 140-149)