Circuit Design Consideration

The schematic of the proposed modified spontaneous transconductance match (M-STM) current reused quadrature VCO (CR-QVCO) is shown in Fig. 2 - 8. The CR-QVCO is mainly composed of two current reused differential VCO cores, which replaces one of the NMOS transistors of a conventional differential LC-VCO with a PMOS transistor[11]. The negative conductances are provided by the cross-connected pairs of transistors M1, M2, and M5, M6, to compensate the losses in the LC-tank. The series stacking of NMOS transistors and PMOS transistors allows the supply current to be reduced by half compared to that of the conventional LC-VCO while providing the same negative conductance.

Fig. 2 - 8 Schematic of proposed current reused QVCO with modified STM

Fig. 2 - 9 Proposed CR-QVCO operation during each half period

To explain the operation of the proposed CR-QVCO, Fig. 2 - 9 shows the schematic and corresponding large-signal equivalent circuits during each half period of operation, that is, when the voltage at node I+ is high and low. As shown in Fig. 2 - 9, during the first half-period, the transistor M1, M3, M5, and M7 are on and the current flows from VDD to ground through the inductor. During the second half-period, the transistor, the transistors are off and the current flows in the opposite direction through the capacitors. Note that in the conventional differential QVCO, the cross-connected transistors switch alternatively, while in the proposed QVCO, the PMOS transistors and NMOS transistors switch at the same time.

Unlike a conventional VCO where the transistors switch alternatively, this QVCO does not have a common-source node because the transistors switch on and off at the same time.

Therefore, the proposed QVCO is inherently immune to phase noise degradation caused by second-harmonic terms at the common-source node. In the conventional NMOS-based or

PMOS-based differential QVCO, the phase noise can be degraded significantly by the noise near the second harmonic[15]. Utilization of PMOS transistors in the cross-connected pair can additionally help to reduce the phase noise due to lower flicker noise and hot carrier effects[16].

Fig. 2 - 10 shows the concept of the proposed modified spontaneous match (M-STM) technique. During the first half-period, the transistor M3, M4, M7, and M8 are biased in the triode region as a variable resistor to control the gate-source voltage of M1, M2, M5, and M6,respectively, which in turn determines the transconductances of M1, M2, M5, and M6. By connecting the gate terminals to the another side of the outputs, the equivalent resistance of the variable resistor can be expressed as

Fig. 2 - 10 Concept of the proposed modified STM technique

   

of the transistor. The effective transconductances of M1, M2, M5, and M6 in Fig. 2 - 10 can be expressed, respectively, as of the transistor, Vov is the overdrive voltage, IDL and IDR is the drain current of left-half VCO

and right-half VCO, respectively.

The size of M1 - M8 are selected to satisfy the symmetric oscillation waveform condition gm1ZI- = gm5ZI+ and gm2ZQ- = gm6ZQ+ where ZI-, ZI+, ZQ-, and ZQ+ denote the impedance at node I-, I+, Q-, and Q+, respectively. When the output amplitude at node I- and I+ are different, the feedback mechanism will change the gate voltage of M1 and M5 in an opposite amount. Therefore, the g_m1 and g_m5 are complementary changed by feedback mechanism to equalize the output amplitudes. By the same token, the gm2 and gm6 are also complementary changed by feedback mechanism to equalize the output amplitudes. The comparison of amplitude ratio V3 / V1 with modified STM technique and without modified STM technique is shown in Fig. 2 - 11. Over the entire frequency tuning range, the amplitude imbalance ratio of output signals with modified STM technique is less than 0.2%, while the amplitude imbalance ratio of output signals without modified STM technique is as high as 1.7%.

Fig. 2 - 11 Simulated output amplitude imbalance ratio of the proposed modified STM-QVCO

The mechanism of the proposed modified spontaneous transconductance match (M-STM) technique can be divided into five state, as shown from Fig. 2 - 12 to Fig. 2 - 16 :

I. Ideal Case - Equal Output Level : VI+(avg) = VI-(avg) = VIdeal

As shown in Fig. 2 - 12, when the gmn and gmp has been properly designed, two outputs of the CR-QVCO will exhibit perfectly equal output level, i.e., V_I+(avg) = V_I-(avg).

We give this ideal value a name VIdeal and will be used later.

Fig. 2 - 12 The M-STM mechanism to the ideal case of the proposed CR-QVCO

II. Type 1 - Case 1 : VI+(avg) > VI-(avg) = VIdeal

As shown in Fig. 2 - 13, when the NMOS process transconductance coefficient “kn” has slightly become smaller due to process variation :

1. VI+(avg) will become larger than ideal value correspondingly.

2. The larger V_I+(avg) will lead to smaller r_ds3, and , in turn, increase V_I+(avg) toward the ideal value, which is the dashed line in the zoom in window.

Consequently, VI+(avg) will have less variation thanks to the M-STM feedback compensation.

Fig. 2 - 13 The M-STM mechanism to "Type 1 - Case 1" of the proposed CR-QVCO

III. Type 1 - Case 2 : VI+(avg) < VI-(avg) = VIdeal

As shown in Fig. 2 - 14, when the NMOS process transconductance coefficient “kn” has slightly become larger due to process variation :

1. VI+(avg) will become smaller than ideal value correspondingly.

2. The smaller V_I+(avg) will lead to larger r_ds3, and , in turn, increase V_I+(avg) toward the ideal value.

Consequently, VI+(avg) will have less variation thanks to the M-STM feedback compensation.

Fig. 2 - 14 The M-STM mechanism to "Type 1 - Case 2" of the proposed CR-QVCO

IV. Type 2 - Case 1 : VI-(avg) > VI+(avg) = VIdeal

As shown in Fig. 2 - 15, when the PMOS process transconductance coefficient “kp” has slightly become smaller due to process variation :

1. VI-(avg) will become smaller (but larger negative-half amplitude) than ideal value correspondingly.

2. The smaller VI-(avg) will lead to smaller rds7, and , in turn, increase VI-(avg)

toward the ideal value.

Consequently, V_I-(avg) will have less variation thanks to the M-STM feedback compensation.

Fig. 2 - 15 The M-STM mechanism to "Type 2 - Case 1" of the proposed CR-QVCO

V. Type 2 - Case 2 : VI-(avg) < VI+(avg) = VIdeal

As shown in Fig. 2 - 16, when the PMOS process transconductance coefficient “kp” has slightly become larger due to process variation :

1. VI-(avg) will become larger (but smaller negative-half amplitude) than ideal value correspondingly.

2. The larger VI-(avg) will lead to larger rds7, and , in turn, decrease VI-(avg) toward the ideal value.

Consequently, V_I-(avg) will have less variation thanks to the M-STM feedback compensation.

Fig. 2 - 16 The M-STM mechanism to "Type 2 - Case 2" of the proposed CR-QVCO

在文檔中 新型低相位雜訊電流再利用四相位震盪器之設計與研究 (頁 41-51)