Conclusion

This thesis contents three works. The first work is a novel full

concurrent triple-band CMOS LNA 8GHz, 2.45GHz, and 5.25GHz. The second

work is a ed CMO r

work CM R ll n

performa n

bricated using TSMC 0.25-µm CMOS process through CIC. In this thesis, we have resented the design concepts, simulation results, experimental results, and advanced omparisons & discussions for these three works.

.1.1 Concurrent Triple-Band CMOS LNA

y integrated for 1.

modifi S double-balance mixer merged LNA fo WCDMA. The last is a new RF OS MICROMIXE for 2.45GHz. A of the simulatio

nces were finished through Eldo-RF simulator. These three ICs all have bee fa

p c

6

A novel fully integrated concurrent triple-band CMOS LNA has been designed nd presented in this thesis. All measurements were finished through on-wafer testing t NDL. The measured input matching for lower dual frequency bands (1.8GHz and .45GHz) is nearly falling at desired frequencies and achieves better matching than mulation. But the input matching for higher frequency band (5.25GHz) is shifted to wer frequency at 4.5GHz. The major reason is that the parasitic inductances are not onsidered and included in our design procedure. The measured output matching is early broadband matching but still has the trend of concurrent triple-band matching.

his is because the original additive feedback capacitors are chosen too small to ontrol exactly and have great deviations after fabrications. Besides, the power gain and noise figure performances do not meet our anticipation in this architecture. Three a

major factors also have been ex 4. However, this LNA design can achieve better dynamic range and linearity of P1dB and IIP3 parameters in measurement tha

In fact, the models of the spiral inductors applied at higher frequency (5.25GHz) are not as accurate as those applied at lower frequency. So that they will also cause misma

that is first proposed.

d LNA

n those in simulation.

tches between simulation and measurement results. In summary, to design a concurrent multi-band LNA or even other RF circuits with better performances, not only the parasitic effects have to be considered more carefully but the more accurate models designed and optimized for all desired frequencies must be involved, especially for complicated and large chip area circuits at higher frequency.

Although the measured performances in S-parameters and noise figure are not as good as that in simulation results, we actually have demonstrated our novel circuit design concepts of the concurrent triple-band LNA

6.1.2 CMOS Double-Balanced Mixer Merge

A modified CMOS double-balanced merged LNA has been design and presented in this thesis. All measurements were finished through PCB on-board testing at CIC and our laboratory. The process condition has been shifted between TT and SF-corner.

The power gain of measurement is about 1.5dB lower than that of TT-corner simulation. And the maximum measured power gain occurs at higher LO input power than TT-corner simulation result. Besides, the linearity performance of the two-tone test IIP3 is very close to the simulation result and the measured P1dB is better than the TT-corner simulated one. All factors to cause these measurement results have been explained in Section 4.4.4. Finally, although LO-to-RF isolation is much lower than the overestimated simulation result, it works very well and meets the requirements for practical circuit application.

In summary, although some performances are a little degraded as compared to the simulation results, our proposed modified merged LNA & Mixer circuit actually works very well and exhibits much higher gain, higher linearity, better isolation, and wider

6.1.3 New RF CMOS MICROMIXER

dynamic range with acceptable low power consumption than the conventional cascade LNA & Mixer architecture in CMOS technology.

A modified New RF CMOS MICROMIXER has been designed and presented in this thesis. All measurements were also finished through PCB on-board testing at CIC and our laboratory. The process condition has been moved toward FF-corner. The powe

in has been demonstrated and explained through a very useful approximate estimation. In addition, the P1dB value of measurement is much better than that of FF-corner simulation. This resul

r gain of measurement is about 1.4dB better than that of FF-corner simulation.

This is because of more current drawing in mixer core circuit as compared to FF-corner simulation. The root cause of this incremental power ga

t actually has demonstrated the good characteristic of wide dynamic range in a bisymmetric Class-AB RF stage topology.

Besides, the circuit performs good linearity of high measured IIP3 that is close to that of simulation result. However, although LO-to-RF isolation is much lower than the overestimated simulation result, it works very well and meets the requirements for practical circuit application. We can also find that the measured maximum power gain occurs at almost the same low LO input power as simulation result. It will facilitate the design of on-chip oscillator for the integration in the future.

In summary, although process condition is deviated from TT-corner and it causes a little more power consumption than what we expected, we actually reach the major

purp

ption than the conventional basic MICROMIXER architecture in CMOS technology.

oses of our modification in original MICROMIXER architecture, to achieve high gain with acceptable low power and still maintain good linearity. Finally, we have demonstrated that our proposed modified new RF CMOS MICROMIXER actually works very well and exhibits much higher gain, higher linearity, better isolation, and wider dynamic range with acceptable low power consum