Motivations and Associated Recent Works

1.2.1 Concurrent Triple-Band CMOS LNA

Since modern wireless applications necessitate communication systems with more functionality and flexibility, multi-standard RF transceivers integrated using CMOS technology are predicted to play a critical role in the future wireless communication systems. If we can combine two or more RF standards into one receiver, it will greatly reduce cost and improve integration in advanced. However, low noise amplifier is one of the most critical building blocks in modern integrated RF receiver. A suitable multi-band LNA must be designed and realized before implementing a multi-standard receiver. In Chapter 3, we will briefly describe that a concurrent multi-band LNA is the appropriate candidate for such a receiver. [1]

Recently, many researches about concurrent dual-band LNA have been studied and reported. [2-5] However, concurrent triple-band LNA is rarely cited and neither of them is concurrent or fully integrated. So that a novel fully integrated concurrent triple -band CMOS LNA is first proposed in our thesis that is capable of simultaneous

operation at all three different frequency bands (1.8GHz, 2.45GHz, and 5.25GHz) without dissipating triple as much power or significantly increasing in cost and footprint. Besides, it can also be easily integrated on a triple-band receiver.

1.2.2 CMOS Double-Balanced Mixer Merged LNA for WCDMA

The third generation of global wireless cellular systems is based on wide-band code-division multiple access (WCDMA). Direct sequence spread spectrum at 4–16 Mchips/s expands data into 5-MHz-wide channels. The spread data modulates the carrier with quadrature-phase-shift keying (QPSK). The WCDMA handset is full duplex, that is, it transmits in the 1.9-GHz band at the same time as it receives in the 2.1-GHz band. These features pose special challenges in the receiver, such as linearity performance. [6]

We undertake the work present here in search of a more linear RF front-end. Let us start with the shortcomings of the cascade of a conventional LNA and mixer. In Chapter 4, we will briefly describe that an intermediate node exists between the cascade architecture of conventional LNA and Mixer and it will greatly degrade the linearity of whole receiver. If we can eliminate this node, it will remove the associated bottleneck to linearity. [6] So that a CMOS double-balance mixer merged LNA is presented in this thesis, which is a current-mode cascade of LNA and mixer. Since two power-hungry blocks are merged into one, such a merged CMOS LNA and Mixer not only can improve linearity but also can greatly reduce its cost and power consumption. Besides, the circuit presented in this thesis is also fully integrated and it also can be integrated with other blocks easily.

Recently, although some advanced researches of stacked CMOS LNA and Mixer using bias-current reuse technique are proposed to save power [7], however, this

architecture is still a voltage-mode cascade of LNA & Mixer and remains this intermediate node as shown in Fig.1.2.1 (b). Fig. 1.2.1 shows the simplified diagrams of these two different ways of merge LNA and Mixer, and we can see that the current-mode cascade of merged LNA and Mixer theoretically should perform better linearity than voltage-mode one due to elimination of this linearity bottleneck, while both of them have the same advantages of low power and high integration capabilities.

Furthermore, to demonstrate this superiority of current-mode cascade architecture in advanced, we also have listed a comparison table as shown in Table. 1.2.1, including two works using these two different approaches and one work we will propose and briefly describe in chapter 4. Obviously, two works in current-mode cascade, [6] and this work, actually can achieve better linearity than that in voltage-mode cascade, [7].

1.2.3 New RF CMOS MCROMIXER

The mixers always play an indispensable role as frequency-translation devices in the RF transceivers of communication systems. It can perform frequency translation to a higher frequency (up-conversion) or to a lower frequency (down-conversion).

System integrated monolithic mixers often use a topology called the Gilbert mixer, especially in CMOS technology. However, its RF input stage, usually a simple differential pair or sometimes using source degeneration, sets fundamental limits to the attainable dynamic range. Further, these RF stages do not provide an accurate match to the source, even when using various types of impedance-transformation methods. Accordingly, another topology, named the MICROMIXER, adopts a quite different approach to improve dynamic range. It follows the general form of the Gilbert mixer, except for the use of a bisymmetric Class-AB RF stage based on translinear principles. [8]

Fig. 1.2.1 (a) current-mode cascade (b) voltage-mode cascade of LNA & Mixer

Specification voltage-mode [7] current-mode [6] This Work

RF Input Matching (dB) -12 -15 -13.7

Voltage Gain (dB) 29.0 23.0 18.2

Power Gain (dB) N/A N/A 9.0

Noise Figure (dB) 6.0 3.4 N/A

P1dB (dBm) N/A -19.0 -19.0

IIP3 (dBm) -16.0 -1.5 -4.8

LO-to-RF Isolation (dB) N/A <-71 -48.4

Power dissipation (mW) 6.25 21.6 18.8

Operation Freq. (GHz) 2.4 2.1 2.1

CMOS Process 0.25 0.35um 0.25um

Table 1.2.1 current-mode cascade [6], voltage-mode cascade [7] of LNA & Mixer, and our design measurement performance comparison summary

Although MICROMIXER provides a well-defined matching impedance and much lower input related nonlinearity, it is always more suited for BJT technology and exhibits poor performances in CMOS technology due to restriction by the trade-off of gain, noise figure and power dissipation. To accommodate it in CMOS technology, we will propose a modified topology based on this original basic MICROMIXER in this thesis, that is fully integrated and capable of operation at 2.45GHz band with higher gain, lower noise, higher linearity and lower power dissipation than those of basic one in CMOS technology.

The simulation results compared between basic and proposed new architecture of CMOS MICROMIXER are shown in Table 1.2.2, we can see these disadvantages (low gain, high noise figure and power dissipation) and design difficulties of basic MICROMIXER in CMOS technology obviously. That is why MICROMIXER in BJT form is generally studied and reported, but that in CMOS form is almost not investigated and presented up to now. In contrast, our proposed new RF CMOS MICROMIXER can achieve much higher gain, lower noise, better linearity, wider dynamic range and lower power consumption than the basic one in CMOS process.

Specification Basic MICROMIXER New MICROMIXER

RF Port Input RL (dB) 11.7 23.5

LO Port Input RL (dB) 12.9 19.3

Voltage Gain (dB) -1.5 10.4

Noise Figure (dB) 20.1 11.4

P1dB (dBm) -11.5 -10.1

IIP3 (dBm) -1.5 -0.7

Power Consumption (mW) 15.0 3.7

Table 1.2.2 Simulation Comparison between Basic and New MICROMIXER