Chapter 5 Conclusion
In this thesis, low power UWB LNAs are designed by using two different approaches. The first topic propose the common gate combined with band pass filters for the input matching network can easily to reduce parasitic capacitance effects of the transistors and low power consumption. The πi-section LC network technique is also employed in the LNA to achieve a sufficient and flat gain. Numerical simulation based on TSMC 0.18μm 1P6M process. It achieved 10.0～12.4dB gain from 3 GHz to 10.6 GHz and 3.25dB noise figure in 8.5GHz, operates from 1.5V power supply, and dissipates 3mW
The second topic proposes an external bias to the body node of transistor, which leads to transistor’s threshold voltage reduction and low power consumption. The proposes LNA combines a conventional LNA cascode architecture with a feedback resistor Rf, to achieve wideband input impedance matching. Based on TSMC 0.18μm 1P6M process, the numerical result shows that the LNA has 11.8～14.0dB gain from 6 GHz to 10.0 GHz with input matching S11<-13.7dB and 2.81dB noise figure in 7.0GHz. It only dissipates 2.8 mW with a very small power supply of 0.75V. Here, the second design
Chapter 5 Conclusion
method can applied to low power UWB LNA to attain to under low power consumption requirement.
References
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Appendix Basic Noise Theory
Appendix Basic Noise Theory
There are two methods for analyzing the effect of noise in electronic devices and circuits [49]. The first method consists of using equivalent noise sources at the appropriate physical location in the small signal model of the device. For example, consider the noise produced by two resistors in series, as shown in Figure A.1 (a).
Using the noise model of a resistor, the noise model shown in Figure A.1 (b) is obtained. The mean-square value of the open circuit voltage is
( )
22 2 2
, .1 ,2 ,1 2 .1* ,2 ,2
noise out noise noise noise noise noise noise
V = V +V =V + V V +V (A.1)
Figure A.1 The total noise voltage produced by two resistors in series
Appendix Basic Noise Theory
However, since Vnoise,1 and Vnoise,2 are statistically independent, the mean value of the product term (A.1) is zero. Therefore,
( )
2 2 2
, ,1 ,2
4
1 2noise out noise noise
V = V + V = kT R + R B
(A.2)The second method for analyzing the effect of noise in a circuit is based on the fact that a noisy circuit can be modeled by a noiseless circuit with external noise source. For example, a noisy two port network that contains internal noise sources is shown in Figure A.2 (a) The effect of the internal noise sources can be represented by the external noise voltage sources Vnoise,1 and Vnoise,2 placed in series with the input and output terminals, respectively, as shown in FigureA.2 (b).
Figure A.2 (a) A noisy two-port network; (b) representation of the noisy two-port network in terms of a noise-free two-port network with external noise voltage sources
Vnoise,1 and Vnoise,2
The values of Vnoise,1 and Vnoise,2 are calculated as follows. Representing the noise-free two-port network in Figure A.2 (b) by its z parameters, we can write
1 11 1 12 2 noise,1
V = Z i + Z i + V
(A.3)and
Appendix Basic Noise Theory
2 21 1 22 2 noise,2
V = Z i + Z i + V
(A.4)Equations (A.3) and (A.4) show that the values of Vnoise,1 and Vnoise,2 can be determined from open-circuit measurements in the noisy two-port network. From (A.3) and (A.4), it follows that when the input and output terminals are open, then
1 2
The noise figure of the circuit in Figure A.3 is now derived. The total output noise power is proportional to the mean square of the short-circuit current (i ) at the input sc2 port of the noise-free amplifier,
Figure A.3 Noise model for calculation of the amplifier noise figure
while the noise power due to the source alone is proportional to the mean square of the source current (i ). Hence, the noise figure NF is given by s2
Appendix Basic Noise Theory
Since the noise from the source and the noise from the two-port network are uncorrelated, we have
Substituting (A.10) into (A.6) gives
( )
2There is some correlation between the external sources Vnoise and inoise . Hence, we can write inoise in terms of two parts; one part is uncorrelated to Vnoise (called inu), and the other part is correlated to Vnoise (called inc). Thus,
n nu nc
i = i + i
(A.12) Furthermore, we can define the relation between inc and Vnoise in terms of a correlation admittance Yc-namely,nc c noise
i = Y V
(A.13) Yc is not an actual admittance in the circuit. In fact, Yc is defined by (A.13) and can be calculated as follows. From (A.12),Appendix Basic Noise Theory Substituting (A.14) into (A.11) results in the following expression for NF:
( )
The noise produced by the source is related to the source conductance by
2
4
s s
i = kTG B
(A.17)Where Gs =Re[Ys]. The noise voltage can be expressed in terms of an equivalent noise resistance Rn as
2
4
noise n
V = kTR B
(A.18) And the uncorrelated noise current can be expressed in terms of an equivalent noise conductance Gu-namely,2
4
Appendix Basic Noise Theory
The noise figure can be minimized by the proper selection of Ys. From (A.20), NF is decreased by selecting
The dependence of the expression in (A.22) on Gs can be minimized by setting
s c
0
results in the minimum noise figure. This optimum value of the source admittance is commonly denoted byY
opt= G
opt+ jB
opt. That is,From (A.22), the minimum noise figure NFmin is
Appendix Basic Noise Theory
G
and substituting into (A.27) gives( )
Using (A.28), we can write (A.20) in the form
( ) ( )
2( )
2Solving (A.25) for Gu and substituting into (A.29), the expression for NF can be simplified to read Once these quantities are specified, the value of NF can be determined for any source admittance Ys. Equation (A.30) can also be expressed in the form
2
Appendix Basic Noise Theory and yopt is the normalized value of the optimum source admittance,
0 0
opt opt opt
opt opt opt
Y G jB
y g jb
Y Y
= = + = + (A.33)
Appendix Noise Analysis of MOS Transistors
Appendix Noise Analysis of MOS Transistors
There are several noise sources in MOSFET. It is important to understand these noise sources and their effect on the performance of the devices. The model of the CMOS transistor is shown in Figure B.1. And the different noise sources model in the CMOS transistor are shown in Figure B.2. They include the noise at drain constituted by the channel thermal noise and the flicker noise and the terminal gate resistance thermal noise.
Figure B.1 Model of the CMOS transistor
The dominant noise source in CMOS devices is channel thermal noise. This source
Appendix Noise Analysis of MOS Transistors device.
Figure B.2 Different noise sources model
2
i : Drain noise current, due to the carrier thermal agitation in the channel. d 2
i : Induced gate noise, due to the coupling of the fluctuating channel charge into g
the gate terminal.
2
v : Resistor thermal noise rg
Cgs: Gate-source parasitic capacitance of transistor.
C : Gate-drain parasitic capacitance of transistor. gd
r : Output resistance of transistor. o
R : Distributed gate resistance. g
B.1 Channel Thermal Noise
The most significant source is the noise generated in the channel. In Figure B.3, the channel noise can be modeled by a current source connected between the drain and source terminals with a spectral density.
Appendix Noise Analysis of MOS Transistors
Figure B.3. Equivalent thermal noise of a MOSFET transistor.
2
4
0 dd
i kT g f = γ
Δ
(B.1)k : The Boltzmann constant is 1.38*10-23J/K.
T : The absolute temperature.
0
g : The zero-bias drain conductance of the device. d
γ : A bias-dependent factor for long channel devices ≈ 0.67~1.33.
Δ : To emphasize that f 4kT gγ d0 is the noise power per unit bandwidth.
B.2 Distributed gate resistance noise
An additional source of noise in CMOS device is the noise generated by the distributed gate resistance. This noise source can be modeled by a series resistance in the gate circuit shown in FigureB.4.
Appendix Noise Analysis of MOS Transistors
FigureB.4. Distributed gate resistance of a MOSFET
For noise purpose, the distributed gate resistance is given by:
3
2 H gR R W
= n L
(B.2)R : The sheet resistance of the poly-silicon. H
W : The total gate width of the device.
L : The gate length of the device.
n : The number of gate fingers used to layout the device.
B.3 Induced gate current noise
At high-frequency, the local channel voltage fluctuations due to thermal noise couple to the gate through the oxide capacitance and cause an induced gate noise current to flow is shown in Figure B.5.
Appendix Noise Analysis of MOS Transistors
Figure B.5 Induced gate current noise in MOS devices
Figure B.6. Small signal model of induced gate current noise
For an induced gate current noise, its small signal model can be represented by the circuit in Figure B.6. A simple gate circuit model that includes both of a shunt noise current ig2 and a shunt conductance g have been added. Mathematical g expressions for these sources are are given by:
2
Whereς is the coefficient of gate noise, classically equal to 1.33 for long channel devices.
Appendix Noise Analysis of MOS Transistors
B.4 Correlation between Drain noise and Induced gate noise
The drain noise and induced gate noise share a common physical origin and it is expressed by cross-correlation between the two noise.
0
The cross-correlation coefficient is defined as equation (B.7) and is about 0.395j in MOS device:
In Figure B.7, shows the induced gate noise can be split into two components. For the noise analysis, the first one is fully uncorrelated with the drain noise, and the other is fully correlated with the drain noise. It can be written as:
2 2
2
4 (1 ) 4
g g g
i = kT g ς − c Δ + f kT g c ς Δ f
(B.8)Appendix Noise Analysis of MOS Transistors
Figure B.7 The induced gate noise of split into two components
B.5 Other Noise Source
There are still many noise sources associated with the transistor, such as the Flicker noise besides the previous mentioned noise sources. In electronic devices, Flicker noise arises from a number of different mechanisms, and is most noticeable in devices that are sensitive surface traps. Hence, MOSFET exhibit significantly more flicker noise than bipolar devices do. However, the flicker noise can be ignored at the high frequency as a result of its noise power is inversely proportional to the frequency.