CHAPTER 4 Design of Low voltage Ultra-Wideband Low Noise
4.2.3 A Novel Method to Reduce LNA Noise Figure
In this section, a noise-reduction method using Source-Body Resistance (Rsb) technique is proposed. It is found that the method can effectively reduce the noise figure of the proposed Ultra-wideband LNA.
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA
a. Substrate thermal noise reduced by adding an external resistance
In CMOS technology, the substrate parasitic impedance can induce the substrate thermal noise of RFIC circuits due to the leaky current through the drain/source to the substrate. Here, a simple method by adding an external resistance between the source and the body is proposed to reduce the thermal noise. To explore the method, a small signal equivalent circuit model of the substrate with an added resistor is developed and is shown in Figure 4.8.Figure 4.8 Equivalent circuit model of the substrate with an added resistor Rbx, which is located between the body node and the source node of transistor, and Rb, Rsb, Rdb represent the effective substrate model.
The input impedance of the substrate, Zsub is derived and given as:
0 0
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA
From equation (4.18), increase of the added resistance, Rbx leads to a reduction of the equivalent substrate resistance Rsub, which validates our proposed method.
In this section, the proposed method is applied to UWB LNA to validate its effectiveness. Figure 4.9 illustrates the proposed UWB LNA architecture with an external resistance Rbx added to the transistor M1. To explore the noise figure of the LNA, the noise factor is derived first and is equal to the ratio between the input noise power and the output noise power of the circuit.
According to the proposed UWB LNA and using the substrate model shown in Figure 4.9. Its shows that the small-signal equivalent circuit for substrate model with add resistor (Rbx). The resistor Rbx is an additional resistor which is connected between the body node and source node of transistor M1. Resistor Rbx helps to improve the high frequency performance of the LNA noise figure.
Figure 4.9 The small-signal equivalent circuit for substrate model with add resistor (Rbx)
b. Substrate noise analysis and simulation
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA
Amplifier. Here we will derive the noise figure according to small signal model. To obtain the expression for noise figure, it is instructive to calculate the transfer functions of the input/output noise sources in the LNA. The small signal equivalent circuit used in the computation is shown in Figure 4.10, and Zsub represents simplified the substrate parasitic impedance noise from the substrate model (Figure 4.9).
Figure 4.10 Noise equivalent circuit for LNA with substrate noise
out d sub
Using (4.19) to replace (4.18) can be written as
1 1 1 1
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA
According to the definition, noise factor is
{ }
Using (4.24) to replace (4.23) can be written
2 2 2
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA
Using (4.26) (4.27) (4.28) (4.29) (4.30) (4.31) to replace (4.25) can be written
2
Using (4.33) to replace (4.32) can be written
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA frequency, ωT is cutoff frequency. C2 is gate noise and substrate noise correction coefficients. Equation (4.34) is derived to explain why increasing resistance Zsub leads to a increasing of low noise amplifier noise factor. Determination of substrate resistance value Rbx is important. In Figure 4.11 shows that the curve becomes gentle after Rbx=10kΩ, the values of substrate resistance Rbx =10kΩ are employed to proposed low noise amplifier.
Figure 4.11 Noise Figure versus Resistor Rbx
4.2.4 Simulation results
A low supply voltage of 1.5V is chosen, and the total power consumption is 9.0mW. In Figure 4.12, S11, S12, S21, and S22 versus signal frequency are illustrated.
It is found that the input reflection S11＜-11.72dB and output matching S22<-14.61dB in the range of 6~10.6 GHz. The power gain (S21) is around 12.0~14.4dB. The noise
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA
figure of the proposed LNA is shown in Figure 4.13. It shows that the noise figure (NF) is smaller when Rbx=10kΩ to compare with the case without Rbx. The simulation results also show that the input third-order-intercept points (IIP3s) are -7.0dBm at 6GHz, -7.5dBm at 8GHz, -4.5dBm at 10GHz.
Figure 4.12 S-parameters versus signal frequency
Figure 4.13 Noise Figure versus signal frequency with Rbx=10kΩ to compare with the case without Rbx
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA
Figure 4.14 Linearity parameters P1dB at 6GHz Linearity parameters P1dB can be explained by Figure 4.21.
P1dB=P1dB(dBm)=G1dB(dB)+IP1dB(RF_pwr)(dBm) =14.3+(-19)=-4.7dBm Simulation results of P1dB=-3.3dBm.
Figure 4.15 Linearity parameters OIP3 at 6GHz Linearity parameters OIP3 can be explained by Figure 4.22.
OIP3=Pout+1
2IMD=-6.689+1
2(32.662-6.689)=6.3dBm
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA
Figure 4.16 Linearity parameters P1dB at 7GHz Linearity parameters P1dB can be explained by Figure 4.21.
P1dB=P1dB(dBm)=G1dB(dB)+IP1dB(RF_pwr)(dBm) =14.5+(-20)=-5.5dBm Simulation results of P1dB=-6.6dBm.
Figure 4.17 Linearity parameters OIP3 at 6GHz Linearity parameters OIP3 can be explained by Figure 4.22.
OIP3=Pout+1
2IMD=-6.686+1
2(31.284-6.686)=5.7dBm
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA
Figure 4.18 Linearity parameters P1dB at 8GHz Linearity parameters P1dB can be explained by Figure 4.21.
P1dB=P1dB(dBm)=G1dB(dB)+IP1dB(RF_pwr)(dBm) =14.4+(-21)=-6.6dBm Simulation results of P1dB=-7.7dBm.
Figure 4.19 Linearity parameters OIP3 at 8GHz Linearity parameters OIP3 can be explained by Figure 4.22.
OIP3=Pout+1
2IMD=-7.041+1
2(31.072-7.04)=5dBm
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA
Figure 4.20 Linearity parameters P1dB at 9GHz Linearity parameters P1dB can be explained by Figure 4.21.
P1dB=P1dB(dBm)=G1dB(dB)+IP1dB(RF_pwr)(dBm) =13.9+(-22)=-8.1dBm Simulation results of P1dB=-9.2dBm.
Figure 4.21 Linearity parameters OIP3 at 9GHz Linearity parameters OIP3 can be explained by Figure 4.22.
OIP3=Pout+1
2IMD=-7.7353+1
2(32.533-7.735)=4.7dBm
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA
Figure 4.22 Linearity parameters P1dB at 10GHz Linearity parameters P1dB can be explained by Figure 4.21.
P1dB=P1dB(dBm)=G1dB(dB)+IP1dB(RF_pwr)(dBm) =12.2+(-19)=-6.8dBm Simulation results of P1dB=-8dBm.
Figure 4.23 Linearity parameters OIP3 at 10GHz Linearity parameters OIP3 can be explained by Figure 4.22.
OIP3=Pout+1
2IMD=-8.79+1
2(35.249-8.79)=3dBm
Chapter 4 Design of the Low Voltage Ultra-Wideband LNA