CHAPTER 5 CONCLUSIONS
5.2 F UTURE W ORK
The thesis has had superiority in the biomedical signals recording system according to the result of the MSFEIC post-layout simulation. However, the MSFEIC is still worth improving further in the future. For example, reduce the phase delay in the SC-LPF, consume lower power, use battery to supply the power of MSFEIC, integrate with digital signal processing circuit, etc.
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Reference
[1] Chan, P.K.; Ng, K.A.; Zhang, X.L., "A CMOS chopper-stabilized differential difference amplifier for biomedical integrated circuits," Circuits and Systems, 2004.
MWSCAS '04. The 2004 47th Midwest Symposium, vol.3, pp. iii-33-6 vol.3, 25-28 July 2004.
[2] Martins, R.; Selberherr, S.; Vaz, F.A., "A CMOS IC for portable EEG acquisition systems," IEEE Transactions on Instrumentation and Measurement, vol.47, no.5, pp.1191-1196, Oct 1998.
[3] Koli, K.; Halonen, K.A.I., "CMRR enhancement techniques for current-mode instrumentation amplifiers," IEEE Transactions on Circuits and Systems I:
Fundamental Theory and Applications, vol.47, no.5, pp.622-632, May 2000.
[4] Shojaei-Baghini, M.; Lal, R.K.; Sharma, D.K., "An ultra low-power CMOS instrumentation amplifier for biomedical applications," IEEE International Workshop on Biomedical Circuits and Systems, pp. S1/1-S1-4, 1-3 Dec. 2004.
[5] Maryam Shojaei-Baghini; Rakesh K. Lal; Dinesh K. Sharma, "A Low-Power and Compact Analog CMOS Processing Chip for Portable ECG Recorders," Asian Solid-State Circuits Conference, pp.473-476, Nov. 2005.
[6] Yazicioglu, R. F.; Merken, P.; Puers, R.; Van Hoof, C., "A 60 μW 60 nV/√Hz Readout Front-End for Portable Biopotential Acquisition Systems," IEEE Journal of Solid-State Circuits, vol.42, no.5, pp.1100-1110, May 2007.
[7] Chun-Lung, Hsu; Mean-Hom, Ho; Yu-Kuan, Wu; Ting-Hsuan, Chen, "Design of Low-Frequency Low-Pass Filters for Biomedical Applications," IEEE Asia Pacific Conference on Circuits and Systems, pp.690-695, 4-7 Dec. 2006.
[8] Chun-Chieh Huang,; Shao-Hang Hung,; Jen-Feng Chung,; Lan-Da Van,; Chin-Teng Lin, "Front-end amplifier of low-noise and tunable BW/gain for portable biomedical signal acquisition," IEEE International Symposium on Circuits and Systems, pp.2717-2720, 18-21 May 2008.
[9] Falkenstein, M.; Hohnsbein, J.; Hoormann, J.; and Blanke, L.,” Effects of crossmodal divided attention on late ERP components. II. Error processing in choice reaction tasks,” Electroencephalography and Clinical Neurophysiology, vol. 78, pp.
81
447-55, 1991.
[10] Makeig, S.; Westerfield, M.; Jung, T. P.; Enghoff, S.; Townsend, J.; Courchesne, E.;
and Sejnowski, T. J.,” Electroencephalographic Sources of Visual Evoked Responses,“ Science, vol. 295, pp. 690-694, Jan. 25,2002.
[11] N. G. Einspruch, “VLSI Handbook – Handbook in Science and Technology,”
Academic Press, 1986.
[12] N. G. Einspruch and R. D. Gold, “VLSI in Medicine – VLSI Electronics Microstructure Science,” Academic Press, 1989.
[13] Chih-Jen, Yen; Wen-Yaw, Chung; Shing-Hao, Lee, "A 0.75-mW analog processor IC for wireless biosignal monitor," Proceedings of the International Symposium on Low Power Electronics and Design, 2003, pp. 443-448, 25-27 Aug. 2003.
[14] Qiuting Huang; Oberle, M., "A 0.5-mW passive telemetry IC for biomedical applications," IEEE Journal of Solid-State Circuits, vol.33, no.7, pp.937-946, Jul 1998.
[15] Wen-Yaw, Chung; Kang-Ping, Lin; Chih-Jen, Yen; Cheng-Lun, Tsai; Te-Shin, Chen,
"Analog processor chip design for the bio-signal readout circuit application,"
[Engineering in Medicine and Biology, 1999. 21st Annual Conf. and the 1999 Annual Fall Meeting of the Biomedical Engineering Soc.] BMES/EMBS Conference, 1999. Proceedings of the First Joint , vol.2, pp.881, Oct 1999.
[16] Refet Firat Yazicioglu; Patrick Merken; Robert Puers; Chris Van Hoof, "Low-Power Low-Noise 8-Channel EEG Front-End ASIC for Ambulatory Acquisition Systems,"
Solid-State Circuits Conference, 2006. ESSCIRC 2006. Proceedings of the 32nd European , pp.247-250, Sept. 2006.
[17] Gano, A.J.; Franca, J.E., "New multiple input fully differential variable gain CMOS instrumentation amplifier," The 2000 IEEE International Symposium on Circuits and Systems, vol.4, pp.449-452 vol.4, 2000.
[18] Yazicioglu, R.F.; Merken, P.; Van Hoof, C., "Integrated low-power 24-channel EEG front-end," Electronics Letters , vol.41, no.8, pp. 457-458, 14 April 2005.
[19] A. P. Brokaw and M. P. Timko, “An improved monolithic instrumentation amplifier,” IEEE J. Solid-State Circuits, vol. SC-10, pp. 417–423, Dec. 1975.
[20] Ng, K.A.; Chan, P.K., "A CMOS analog front-end IC for portable EEG/ECG
82
monitoring applications," Circuits and Systems I: Regular Papers, IEEE Transactions on [Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on], vol.52, no.11, pp. 2335-2347, Nov. 2005.
[21] Sackinger, E.; Guggenbuhl, W., "A versatile building block: the CMOS differential difference amplifier," IEEE Journal of Solid-State Circuits, vol.22, no.2, pp.
287-294, Apr 1987.
[22] Nicollini, G.; Guardiani, C., "A 3.3-V 800-nVrms noise, gain-programmable CMOS microphone preamplifier design using yield modeling technique," IEEE Journal of Solid-State Circuits, vol.28, no.8, pp.915-921, Aug 1993.
[23] Enz, C.C.; Temes, G.C., "Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization,"
Proceedings of the IEEE, vol.84, no.11, pp.1584-1614, Nov 1996.
[24] Steyaert, M.; Kinget, P.; Sansen, W., "Full integration of extremely large time constants in CMOS," Electronics Letters, vol.27, no.10, pp.790-791, 9 May 1991.
[25] B. Razavi, “Design of Analog CMOS Integrated Circuit, ”
[26] Chun-Hsien Su, “A Multibit Cascaded Sigma-Delta Modulator with DAC Error Cancellation Techniques, ” doctoral thesis May, 2004
[27] T. Denison, K. Consoer, W. Santa, Al-Thaddeus Avestruz, J. Cooley, and A. Kelly, ” A 2 uW 100 nV/rtHz Chopper-Stabilized Instrumentation Amplifier for Chronic Measurement of Neural Field Potentials, ”IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 12, PP. 2934-2945 DECEMBER 2007
[28] M. Dessouky, and A. Kaiser, “Very Low-Voltage Digital-Audio ΣΔ Modulator with 88-dB Dynamic Range Using Local Switch Bootstrapping,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 36, NO. 3, PP. 349-355, MARCH 2001
[29] Y. Fujimoto, H. Tani, M. Maruyama, H. Akada, H. Ogawa, M. Miyamoto “A Low-Power Switched-Capacitor Variable Gain Amplifier,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 39, NO. 7, PP. 1213~1216, JULY 2004
[30] Mingliang Liu, “Demystifying Switched-Capacitor Circuits,” 2006
[31] Fujimori, L. Longo, A. Hairapetian, K. Seiyama, S. Kosic, J. Cao, Shu-Lap Chan,
“A 90-dB SNR 2.5-MHz Output-Rate ADC Using Cascaded Multibit Delta–Sigma
83
Modulation at 8 Oversampling Ratio,” IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 12, PP.1820~1828, DECEMBER 2000
[32] O. Olaei, "Thermal noise analysis of multi-input SC-integrators for delta-sigma modulator design," Proc. IEEE ISCAS 2000, vol. 4, pp. 425-428, May 2000.
[33] T. Cho et al., “A 10b, 20Msample/s, 35mW pipelined analog-to-digital converter,”
IEEE Journal of Solid-State Circuits, Vol. 30, pp. 166–172, March 1995.
[34] G. Jovanovic Dolecek (editor) Multirate systems: Design and Aplications, IGP, USA 2002.
[35] G. Jovanovic-Dolecek and J. Diaz-Carmona, “ A New Cascaded Modified CIC-Cosine Decimation Filter,” Accepted for Intern. Conference ISCAS-2005, Kobe, Japon.
[36] Y. Lian and Y.C. Lim, “New prefilter structure for designing FIR filters,”, Electronic letters, vol. 29, No 11, pp.1034-1035, May 1993.
[37] J. F. Kaiser and R W. Hamming, “Sharpening the response of a symmetric nonrecursive filter,” IEEE Transactions on Acoustic Speech, and Signal Processing, vol. ASSP-25, pp.415-422, October 1977.
[38] R. Gregorian and. G. Temes, Analog MOS Integrated Circuits for Signal Processing, John Wiley & Sons Inc., New York, NY, 1986.
[39] W. Sansen et al., "Transient analysis of charge transfer in SC filter: gain error and distortion," IEEE J. Solid-State Circuits, vol. SC-22, no. 4, pp. 268-276, Apr. 1987.
[40] Gordana Jovanovic Dolecek, and Sanjit K. Mitra, “A NEW SHARPENED CASCADED COMB-COSINE DECIMATION FILTER, ”
[41] Coelho Vincence, V.; Galup-Montoro, C.; Cherem Schneider, M., "A high-swing MOS cascode bias circuit," IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, [see also Circuits and Systems II: Express Briefs, IEEE Transactions on], vol.47, no.11, pp. 1325-1328, Nov 2000.
84