1.3.1 Voltage-Mode Down-Conversion Mixer
Down-conversion mixers are required for the frequency conversion in wireless com-munication systems, especially in the receiver front-ends [126]. In the past, due to the limited speed of MOSFETs and the low quality factor of the passive devices, the use of CMOS technology is restricted to relatively low operation frequencies. The down-conversion mixers operated above 20 GHz have been mostly implemented by GsAs-based HEMT, HBT, and SiGe/BiCMOS processes. Nevertheless, over the last years, the speed gap of CMOS devices to III/V and SiGe technologies has been significantly decreased by aggressive scaling of the transistors [111]. This has made it possible to design the down-conversion mixers operated above 20 GHz with the advanced nanometer CMOS devices.
So far, some down-conversion mixers have been proposed to investigate the operation feasibility at around 20 GHz [51]–[54],[56],[57],[65],[68],[70],[71],[127]–[132]. Among them, the Gilbert mixer has been adopted in [51],[54],[56],[57],[65],[68],[70],[71],[127].
The current-bleeding technique has been applied to the Gilbert mixers to achieve higher conversion gain [56], [71]. With current-bleeding method, the switching transistors can be operated at lower gate-to-source voltage with smaller size.
In addition to the Gilbert mixers, sub-harmonic mixers (SHMs) have also been in-vestigated in the operating frequency around 20 GHz [52], [53], [128]–[132]. The burden of designing a LO at high frequencies can be alleviated by the SHM topology. Because the LO frequency is a sub-harmonic of the RF frequency, this alleviates the DC-offset due to the LO–RF feedthrough. Furthermore, the Gilbert mixer requires high dc power consumption for the specific conversion gain and speed. Therefore, the passive SHM without dc power consumption becomes an attractive candidate for high frequency appli-cations. There are mainly two different techniques which are known for sub-harmonic down-conversion mixers: 1) exploiting the non-linear behavior of active devices to pro-duce higher harmonics of the LO waveform [131], [132] and 2) multiplying the received signal with a number of uniformly spaced LO phase [52], [53], [128]–[130]. While the type 1) mixers have a penalty in conversion gain and noise, the type 2) mixers have
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formance similar to the Gilbert mixers at the expense of a more complex LO generation circuits.
1.3.2 Voltage-Mode Up-Conversion Mixer
As down-conversion mixers which are described in the prior paragraph, up-conversion mixers are required for the frequency conversion in wireless communication systems, especially in the transmitter front-ends [126]. The up-conversion mixers operated above 20 GHz have been mostly implemented by GsAs-based HEMT, HBT, and SiGe/BiCMOS processes. Nevertheless, over the last decade, the significant improvement of CMOS devices into nanometer nodes has made the speed of the CMOS devices comparable to the devices in SiGe/BiCMOS and III-V technologies [111]. This has made it possible to design the up-conversion mixers operated above 20 GHz with the advanced nanometer CMOS processes.
So far, little has been done to investigate the feasibility of implementing CMOS up-conversion mixers for such a frequency range around 20 GHz [58]–[61], [66], [67], [133], [134]. Among them, the CMOS Gilbert mixer has been adopted in [58]–[60], [66], [67], [134]. In the Gilbert mixer, the LO signal at the drain of differential pairs is ideally zero, and the mixing is caused by the switching action of LO switching transistors between the cutoff and saturation region. Hence, the switching behavior of the LO switching transistors is quite important. To minimize the period of LO switching transistors into linear region, the current-bleeding technique can be used to enhance the switching speed.
In [58]–[60], [67], the current-bleeding technique has been applied to the up-conversion Gilbert mixer to enhance the conversion gain and make the switching transistors operate faster with lower gate-to-source voltages and smaller sizes.
The input of the Gilbert mixer is actually a voltage-to-current stage. While the non-linearity in the switching operation is necessary for frequency translation, a distortion of the drain current caused by the transconductance stage is highly unwanted. This distor-tion deteriorates the compression and intermoduladistor-tion characteristic of the up-conversion Gilbert mixer. The transconductance stage in [66] is with resistive source degeneration to enhance its linearity performance.
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The CMOS dual-gate up-conversion mixer has been proposed in [133], where the dual-gate structure is realized using a cascode connection of two single-gate n-type MOS-FETs for which relatively accurate simulation models are available. In a dual-gate mixer, a finite LO signal must be preset at the drains of lower transistors, which cause the change of drain-to-source voltages. This leads to the switching of the devices between linear and saturation regions. Due to this, the transconductance of the lower transistors is modulated by the LO frequency.
In the Gilbert mixer, the transconductance stage is primarily biased in the saturation region, whereas in a dual-gate mixer, the lower FETs are operated in the linear region during the most part of the LO cycle, resulting in lower transconductance than that of an FET biased in the saturation region. As a result, the conversion gain of the Gilbert mixer is normally higher than that of the dual-gate one, whereas the linearity performance of dual-gate mixer is moderately better than the Gilbert mixer. Both of these two kinds of mixers have inherent property of separation of LO and RF ports, which makes them amenable for integration.
1.3.3 Low Noise Amplifier (LNA)
LNA is the first circuit in the receiver front-end. The functions of LNAs are not only to amplify RF signals but to contribute as minimum noise as possible to enlarge the power difference between the received signal and noise. Considering the noise contributions in LNA design, channel thermal noise and induced gate current noise are the main sources of noise in MOS devices [126], [135]. The thermal noise occurs because of channel resis-tance, whereas the induced gate current noise results from the fluctuating channel charges that induce a physical current towards the gate by capacitive coupling.
Recently, the rapid development of Si-based CMOS technologies has made the real-ization of low-cost and high-integration RF integrated circuits at frequencies above 20 GHz feasible [111]. So far, numerous CMOS LNAs designed for the frequencies around 20 GHz have been reported [51]–[57], [65], [136]–[152]. Among them, the single-ended structure has been used in [51], [52], [54]–[57], [136]–[140], [142]–[145], [147], [148], [150], [151], whereas the differential topology has been adopted in [53],[57],[141],[146],
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