Thesis Organization

Chapter 1 INTRODUCTION

1.2 Thesis Organization

This thesis discusses about high frequency circuit design for RF receivers and it includes two parts. One is the analysis and design of a switched dual-band LNA with variable gain and a proposed new sub-harmonic mixer. The other is the design procedure and analysis of a LNA for Ka band application. These two parts will be illustrated in chapter 2 and chapter 3 and these RF components are all implemented and verified by TSMC 0.18um CMOS technology.

In chapter 2, first we introduce the system applications of 802.11a/b/g that are widely used in recent days. And the frequency occupation of these systems is the major discussion for our RF circuits design. The proposed dual-band receiver will also be discussed in Section 2.4.1. The design flows of the switched dual-band LNA and the proposed new sub-harmonic mixer will then be explained in Section 2.4.2~2.4.3. The characteristic of a switched dual-band LNA is similar to a single-band LNA. Hence, the analysis including input matching, noise figure and power dispassion are expressed for a single band LNA. The down conversion principle is the major discussion for our proposed new sub-harmonic mixer. To understand the down conversion operation and switched Gm technique, we start from the basic Gilber mixer, a switched Gm mixer and finally a tradition sub-harmonic mixer. By these mixer prototype analyses, the proposed new sub-harmonic mixer is organized and presented in Section 2.4.3.3.

Also the measurement results, discussion and comparisons with other literatures are presented in this chapter.

In chapter 3, a Ka-band LNA is designed and verified by using TSMC 0.18um CMOS process. The design procedures of a millimeter-wave circuit are based on the analysis of [1], and they are explained in Section 3.3.1~3.3.5. Two simulators including sonnet 9.52 and ADS 2004A is applied in this Ka band LNA design. The simulation results are shown in Section 3.3.6. Finally the measurement results and comparisons with recent published literatures are also illustrated in this chapter.

In chapter 4, a K band frequency source is treated as a feature work in our thesis. By doubling an X band quadrature CMOS VCO, the K band VCO performs low phase noise and high FOM. The K band frequency source has been simulated by TSMC 0.18um CMOS process, and the chip will be tested in August, 2006.

Chapter 2

S ^WITCHED D ^UAL -B ^AND L ^NA W ^ITH F ^OUR G ^AIN M ^ODES A ^ND N ^EW S ^WITCHED G ^M S ^UB -H ^ARMONIC M ^IXER

2.1 Introduction

As the wireless applications expand, requirements for radio which can support multiple bands and multiple standards are increasing. These demands are typically realized by using more than one set of RF blocks which can govern the bands. But these must increase unnecessary power consumption, die area, which in turn increase cost [2]. A way to alleviate these conditions can be accomplished by using one RF block that can handle multiple bands, such as a switched-band RF block, which not only reduces the power consumption but also rejects out-of band signals compared to broadband circuits that cover multiple bands. [1] [13].

The multi-standard wireless LAN transceiver using CMOS technologies are becoming the major design because of the consideration of low cost and high integration. In the applications of wireless LAN, IEEE 802.11a uses the frequency bands of 5.15-GHz ~ 5.35-GHz and 5.725-GHz ~ 5.825-GHz while IEEE802.11b/g uses 2.4-GHz~2.4835-GHz [18]~[20]. And these standards have similar characteristics such as channel bandwidth and modulation method that they have potential to integrate together in a single receiver to lower the cost. To integrate the two bands into a single receiver, a dual-band LNA operating in both 2.4-GHz and 5-GHz band is required first. To prevent the signals in both bands affect each

other, a switched dual-band LNA prototype is used in the integration. The receiver blocks are also designed to have higher performance including integration complexity, image rejection, and power consumption. A low intermediate frequency (IF) structure is selected to lower the integration complexity and therefore lower the cost [10]~[11]. Image signal is still a serious issue in a low IF receiver. In the proposed dual-band receiver, the I/Q signal are useful in an image rejection architecture. With the usage of sub-harmonic mixer in the proposed receiver, only a quadrature signal frequency synthesizer is demanded to down convert the dual-band signals. The practice of sub-harmonic mixer significantly reduces the receiver complexity as well as power consumption [11]. As illustrated above, the switched dual-band LNA and the sub-harmonic mixer must be realized first to achieve the proposed dual-band receiver.

2.2 Comments

2.2.1 Switched Dual-Band LNA

There are two types of dual-band LNA, one is concurrent receiving and the other is switched bands. The concurrent receiving may suffer a serious problem. While a strong signal received in one band in this concurrent LNA, the circuit will exhibit in saturation that causes the other band to operate irregularly. Switched dual-band procedure can select the desired band without receiving the other one. The switched dual-band LNA presented here operates at 2.45-GHz and 5.25-GHz for wireless LAN application. And it achieves high gain and low noise figure in both bands

In addition, as the power of the received RF signals vary with the distance from the transmitter. In order to linearly amplify the RF signals or keep each RF block to operate at linear region, the LNA must be able to have high gain and low gain modes to avoid saturating the next RF block. The switched dual-band LNA proposed in this paper can switch between 2.45-GHz/5.2-GHz by switching the inductor on /off at the output resonator, and also the

input transistors gain modes. The gain control scheme is accomplished by lowering down the gate bias of the input transistors. In low gain modes, the power consumption can be economized. However, the input return loss (S₁₁) must shift to low frequency. The four shunt NMOS transistors cascading on the input transistors can modify the input transistor’s drain-to-source voltage and hence the S₁₁. The four shunt NMOS transistors can be controlled by baseband as the receiving power is too large to saturate the following RF blocks [3].

2.2.2 Proposed Switched Gm Sub-Harmonic Mixer

Mixers are widely used for frequency translation in radio frequency communication systems. In a radio receiver, the down-conversion mixer is the key building block since it dominates the system linearity [4]~[6]. Among many proposed active mixers, the Gilbert-cell mixer has been widely used and the double-balanced mixer has been preferred since it can suppress large LO leakage signals at output. The conversion gain, noise figure and linearity are key performance parameters. Here, we take these parameters into account in our proposed sub-harmonic mixer.

Sub-harmonic mixer architectures use second or higher order harmonics of the LO signal for up or down conversion. Lower LO frequency significantly simplifies transceiver design, especially for blocks like frequency synthesizers, oscillators. These mixers are also suitable for constructing multi-standard systems sharing a common LO signal generation scheme [30].

The proposed sub-harmonic mixer can be used in dual-band receivers that the higher band frequency is almost twice of the lower one. Take 2.45-GHz and 5.25-GHz dual-band receiver for example. By the usage of sub-harmonic mixer, there is only one frequency synthesizer needed to receive dual band signals [32].

By the switched Gm prototype, the proposed sub-harmonic mixer consumes no dc power without LO input. Otherwise, the combination of switched Gm technique and PMOS active

load let the proposed mixer exhibit sufficient voltage headroom and therefore conversion gain will not be limited.

The measured buffer power consumption, 22.36mW, reveals that the fabricated mixer locates in SS-corner. Although the results are different from the desired TT-corner, we still compare the SS-corner simulation with the measured results.

2.3 Wireless LAN Standard Review

In this section, the wireless LAN standard, IEEE802.11a/b/g, will be reviewed. It will help us to understand the identical characteristics in these bands and tell us why integrating these standards together. The IEEE802.11b standard at the 2.4-GHz ISM (industrial, scientific, and medical) band provides data rate up to 11Mbits/s with the direct sequence spread spectrum (DSSS). The standard was released by IEEE in 1999. The 802.11a standard at 5-GHz U-NII band provides data rate up to 54Mbits/s using OFDM (orthogonal frequency division multiplexing) modulation. The IEEE 802.11g standard, operating at the same band of 802.11b, uses OFDM modulation and contributes data rate up to 54Mbits/s. There are several identical properties in these standards and they will be introduced in the following illustration.

2.3.1 IEEE 802.11a

As shown in Fig. 2-1, the 802.11a standard has three U-NII (Unlicensed National Information infrastructure) bands. They includes the lower band (5.15-GHz ~ 5.25-GHz), the middle band (5.25-GHz ~ 5.35-GHz) and the upper band (5.725-GHz ~ 5.825GHz). The lower and middle sub-bands have rooms for eight channels in the total bandwidth of 200-MHz. The upper band has rooms for four channels in a bandwidth of 100-MHz. The centers of the outermost channel shall be at a spacing of 30-MHz from the edge of band for the lower and middle bands, and 20-MHz for the upper band. The bandwidth of each channel is 20-MHz, and each channel has 52 sub-carries for OFDM modulation with each sub-carrier

has bandwidth of 312.5-KHz. Each sub-carrier can be either a BPSK, DQPSK, 16QAM, 64QAM signal. [18] Each data rate corresponding to modulation is listed in Table 1.

Fig. 2-1 Channel allocation of IEEE 802.11a standard

Modulation Data Rate (Mbps) BPSK 6,9

DQPSK 12,18 16QAM 24,36 64QAM 48,64

Table 1 Comparison of each modulation and its transferring data rate in IEEE 802.11a standard

2.3.2 IEEE 802.11b

IEEE 802.11b standard can be discriminated between operating in North American and European. In North American, its operating frequency is from 2400-MHz to 2472-MHz while the frequency range in European is from 2400-MHz to 2483.5-MHz. Here we adopt the former. For non-overlapping operation three channels are used and the channel center frequencies are 2412-MHz, 2437-MHz, and 2462-MHz. For overlapping operation, six channels are selected. The center frequency of each channel has a spacing of 10-MHz. Fig.

2-2 is the channel location of 802.11b standard for non-overlapping and overlapping. The standard offers a data rate up to 11 Mbps and uses direct sequence spread spectrum (DSSS) and the complementary code keying (CCK) modulation [19].

Fig. 2-2 The North American channel selection of non-overlapping and overlapping

2.3.3 IEEE 802.11g

The IEEE802.11g operates from 2412-MHz to 2483-MHz, and the bandwidth is 20-MHz for each channel. It extends the data rate of 802.11b to 54 Mbps in the 2.4-GHz band using OFDM modulation. It also has three non-overlapping channels [20]. The three standards are compared and listed in Table 2.

Standards IEEE 802.11a IEEE 802.11b IEEE 802.11g

Frequency (MHz) 5150~5350

5725~5825 2400~2483 2400~2483

Modulation OFDM CCK OFDM CCK

Data Rate (Mbps) 6~54 1~11 6~54 1~11 Available Spectrum (MHz) 300 83.5 83.5

Channel Bandwidth (MHz) 20 25 25 25

Table 2 The comparison of the 802.11 a/b/g standards

2.4 Circuit Design Consideration

2.4.1 Proposed Dual-Band Receiver

As illustrated in the introduction, low-IF architecture is preferred because it reduces the integration complexity and has no dc offset issue [6]. On the other hand, the low-IF receivers do have image problems. This problem can be solved by the image cancellation schemes, and we proposed the Weaver architecture in our receiver to do image rejection [4]. Since the digital modulation of IEEE802.11a/b/g compared above illustrates the I/Q formats are required to demodulate the transmitted signal, the I/Q down conversion is also considered in this proposed dual-band receiver.

With a simple modification the Weaver architecture readily provides quadrature outputs [4], as is needed for many modulation types, and it is this architecture that is used in this receiver. The modification involves replacing the second set of modulators by two pairs of quadrature mixers and then properly combining their contributions.

Fig. 2-3 is the proposed dual-band receiver in this project. The receiver can be divided into two frequency translations, one is down conversion to 10-MHz and then down conversion to baseband by a 10-MHz oscillator. A 10-MHz LO signal is convenient to be obtained by the reference signal of the synthesizer using in the first down conversion and this arrangement lower cost significantly. The two frequency translations compose the quadrature Weaver architecture to alleviate the issue of image signal and simultaneously produce the I/Q signals. The IF-band pass filter is easy to design and it exhibits high selectivity because of the selected low intermediate frequency. Fig. 2-4 is the frequency plan in this dual-band receiver.

For simplicity, the dual-band LNA and sub-harmonic mixer designed here obey the frequency in Fig. 2-4. That is, the RF is 5.25-GHz for 5-GHz band and 2.45-GHz for 2.4-GHz band; the LO is 2.62-GHz and 2.44-GHz for 5-GHz and 2.4-GHz frequency down conversion,

respectively. By the IEEE802.11a/b/g standards, the frequency synthesizer demanded here must provide a tuning range from 2.39-GHz to 2.67-GHz. The tuning range is about 11% of the oscillation center frequency.

Fig. 2-3 The proposed dual-band receiver

Fig. 2-4 The frequency planning in the proposed dual-band receiver

2.4.2 Switched Dual-Band LNA

A switched dual-band low noise amplifier with four gain control modes operating at the 2.45-GHz/5.25GHz has been simulated based on a 0.18-um TSMC CMOS process. This

dual-band LNA with two input channels and each tuned to 2.45-GHz and 5.25-GHz separately, by switching the output resonator inductor on /off, the input transistors are enabled / disabled for band selection. A novel gain control scheme is introduced, and this gain control scheme has low circuit complexity. The four gain control modes are executed by turning on/off the four shunted NMOS at the output of this cascode topology, and the four gain modes can be controlled digitally to adapt to the received RF signals. Comparing with the current literatures, this novel gain control scheme not only have high gain control range in both bands, but also have reasonable noise figure in the low gain mode even with 11 dB power gain lower than the high gain mode. The P^1dB of the proposed LNA in the low gain mode is about 11 dB higher than the one in the high gain mode in both bands. The peak of the input and output return loss is locked in band in each gain mode which is an important feature of this proposed LNA. In the high gain mode, the LNA approaches 14.4 dB maximum power gain and 3.54 dB noise figure at 2.45-GHz. In the 5.25-GHz band, the maximum power gain is 12 dB and the noise figure is 2.88 dB. The gain can be switched by about 11 dB between the high gain and the low gain mode at 2.45-GHz and 5.2-GHz. Because the switched dual-band LNA operation is similar to a single band, we discuss a single band LNA fist in Section 2.4.2.1~2.4.2.3.

2.4.2.1 Input Matching

For a single band LNA, the total width of the input transistor is determined by )

3 /(

1 _ox _s

opt LC R

W ≅ ω (2.1)

where ω is the operating frequency, L is the channel length of the transistor, C is the _ox gate oxide capacitor and R is generally 50Ω [4]. In this work, the total width of the input _s transistor in each band is optimized to (2.1).

Fig. 2-5 The input stage of the single band cascade LNA

The input matching network quality factor Q_in =(1/ω_cC_gsR_s) of the LNA is a key factor which determines the power consumption, gain and noise. The following analysis is finally translated to a form with Q , and the effect of _in Q is clear. Analyzing the input stage of the _in LNA in Fig. 2-5, and the input resistance can be expressed in (2.2).

For matching condition, Z_in =R_s, reveals the input impedance and resonating frequency.

The quality factor of the equivalent input matching network must be introduced first and it is useful in the following analysis about noise figure. As shown in Fig. 2-6, the input matching network is equal to a series RLC tank. The quality factor of the series RLC tank is (2.5) [5].

Fig. 2-6 The equivalent series RLC tank of the input matching network

2.4.2.2 Noise Figure

To estimate the noise figure of a cascode LNA, we take two dominate noise source for consideration. The thermal noise of the drain current from M1 and thermal noise of resistor Rg are estimated in our noise figure calculation. Fig. 2-7 shows the small signal model of the input stage, where i_nd² denotes the thermal noise of the drain current from M1 and V_n²_,Rg denotes the thermal noise of resistor Rg. The transconductance including input matching network is G , and it is derived in terms of _m g , _m Z , _in ω , and C [5]. _gs

Fig. 2-7 The equivalent noise and small signal model of the input matching network

gs in

m Z j C

G g

= ω (2.6)

At matching condition, the transconductance G can be rewritten as: _m

The input referred noise can be expressed as:

]

Finally, the noise figure can be derived:

where γ is the body-effect coefficient. To have an insight into the effect influenced by the quality factor of Lg, Q_Lg and the NF can be rewritten as:

(2.11) clearly illustrates the degradation of poor quality factor of the input inductor

2.4.2.3 Power Dissipation

The power dissipation is also an issue for a LNA. The power dissipation is proportional to the designed inductors Lg and Ls, which can be derived as follow:

where W is total width of input transistor, and L is 0.18um in this work. Using the input transistor’s gate-to-drain capacitance, Cgs, and (2.14), the (2.12) can be rewritten as (2.15).

2.4.2.4 The Switched Dual-Band LNA Design Consideration

The switched dual-band LNA provides high amplification of the signals in the desired dual bands to reduce the effect of the following high noise stages and it presents low noise figure in the first stage in the receiving chain. Fig. 2-8 shows the proposed switched dual-band LNA. M1 and M2 are input transistors of the LNA. M1 is used for 2.45-GHz band, and M2 is used for 5.2-GHz band. When the LNA operates in one band, the other one is disabled by turning the corresponding input transistor off. The matching network is similar to a single band cascade LNA, and the design method is illustrated in last section. Since there are two input transistors in the dual-band LNA, the input matching network can be independently optimized for each band.

Fig. 2-8 The schematic of the proposed dual-band LNA

The switched resonator is composed of Ld1, Ld2, M7, Rg and Rd. The band selection of the LNA is performed by turning the PMOS M7 on/off. The control voltage, Vctl, applied to the PMOS M7 through a resistor Rg. Fig. 2-9 shows that when Vctl is 1.8V, and the PMOS, M7, is turned off. The Ld2 path exhibits high impedance. Thus the output resonator is dominated by Ld1 and Rd. Design Ld1 to let the output matching network resonate at 2.45-GHz. Fig. 2-10 shows that when Vctl is 0V, and M7 is turned on at triode region, and M7 exhibits its channel resistance (Ron). Thus the output resonator is dominated by Ld1 parallel with Ld2, and Ld2 is designed to keep the output matching network resonate at 5.2-GHz.

Fig. 2-9 M7 is off and the parasitic capacitance, CM7, provides a high reactance at 2.45-GHz.

Fig. 2-10 M7 is on and provides a turn on resistance Ron at 5.25-GHz.

There exists several types of variable gain LNA solutions in the literature (e.g. [14]

~[17])： They include: i) The variance of gate bias of the common gate MOS. The gain tuning range will be limited by biasing the common gate MOS in off region and the power

在文檔中應用於IEEE 802.11a/b/g之雙頻帶低雜訊放大器和偶次諧波降頻混頻器以及使用0.18um CMOS製作之Ka頻低雜訊放大器和K頻壓控震盪器 (頁 14-0)