Noise Figure - Proposed Dual-Band Receiver

Chapter 2 SWITCHED DUAL-BAND LNA WITH FOUR GAIN MODES

2.4 Circuit Design Consideration

2.4.1 Proposed Dual-Band Receiver

2.4.2.2 Noise Figure

To estimate the noise figure of a cascode LNA, we take two dominate noise source for consideration. The thermal noise of the drain current from M1 and thermal noise of resistor Rg are estimated in our noise figure calculation. Fig. 2-7 shows the small signal model of the input stage, where i_nd² denotes the thermal noise of the drain current from M1 and V_n²_,Rg denotes the thermal noise of resistor Rg. The transconductance including input matching network is G , and it is derived in terms of _m g , _m Z , _in ω , and C [5]. _gs

Fig. 2-7 The equivalent noise and small signal model of the input matching network

gs in

m Z j C

G g

= ω (2.6)

At matching condition, the transconductance G can be rewritten as: _m

The input referred noise can be expressed as:

]

Finally, the noise figure can be derived:

where γ is the body-effect coefficient. To have an insight into the effect influenced by the quality factor of Lg, Q_Lg and the NF can be rewritten as:

(2.11) clearly illustrates the degradation of poor quality factor of the input inductor

2.4.2.3 Power Dissipation

The power dissipation is also an issue for a LNA. The power dissipation is proportional to the designed inductors Lg and Ls, which can be derived as follow:

where W is total width of input transistor, and L is 0.18um in this work. Using the input transistor’s gate-to-drain capacitance, Cgs, and (2.14), the (2.12) can be rewritten as (2.15).

2.4.2.4 The Switched Dual-Band LNA Design Consideration

The switched dual-band LNA provides high amplification of the signals in the desired dual bands to reduce the effect of the following high noise stages and it presents low noise figure in the first stage in the receiving chain. Fig. 2-8 shows the proposed switched dual-band LNA. M1 and M2 are input transistors of the LNA. M1 is used for 2.45-GHz band, and M2 is used for 5.2-GHz band. When the LNA operates in one band, the other one is disabled by turning the corresponding input transistor off. The matching network is similar to a single band cascade LNA, and the design method is illustrated in last section. Since there are two input transistors in the dual-band LNA, the input matching network can be independently optimized for each band.

Fig. 2-8 The schematic of the proposed dual-band LNA

The switched resonator is composed of Ld1, Ld2, M7, Rg and Rd. The band selection of the LNA is performed by turning the PMOS M7 on/off. The control voltage, Vctl, applied to the PMOS M7 through a resistor Rg. Fig. 2-9 shows that when Vctl is 1.8V, and the PMOS, M7, is turned off. The Ld2 path exhibits high impedance. Thus the output resonator is dominated by Ld1 and Rd. Design Ld1 to let the output matching network resonate at 2.45-GHz. Fig. 2-10 shows that when Vctl is 0V, and M7 is turned on at triode region, and M7 exhibits its channel resistance (Ron). Thus the output resonator is dominated by Ld1 parallel with Ld2, and Ld2 is designed to keep the output matching network resonate at 5.2-GHz.

Fig. 2-9 M7 is off and the parasitic capacitance, CM7, provides a high reactance at 2.45-GHz.

Fig. 2-10 M7 is on and provides a turn on resistance Ron at 5.25-GHz.

There exists several types of variable gain LNA solutions in the literature (e.g. [14]

~[17])： They include: i) The variance of gate bias of the common gate MOS. The gain tuning range will be limited by biasing the common gate MOS in off region and the power consumption can not be economized at low gain mode. ii) A switching control type which provides gain controllability by switching on/off active gain components. The gain control range is limited by switching the active gain components in linear region. iii) The two-stage LNA-VGA type, which achieves gain control through the use of a VGA as a second stage.

This additive gain-control functionality comes at a price of higher circuit complexity, which also results in an increase in power consumption and noise degradation.

In this work, we propose a novel gain control scheme. The gain control scheme can be performed by lowering the transconductance, gm, of the input transistor. However, lowering gm definitely causes the input impedance differ from Rs and the input equivalent tank will not resonate in the desired band anymore. Therefore, a new compensation method is proposed to overcome this shortage. The cascode transistor in the traditional LNA prototype is now extended to four shunted transistors. As shown in Fig. 2-8, M3~M6 are the compensative transistors in this gain control scheme. The gain control scheme provides four gain modes to adapt to the RF signal power and behaves the best communication quality. The gain control

signals are controlled by the base band and shown in Table 3

Vbias1 Vbias2 Mode1 0.65 0.70 Mode2 0.59 0.62 Mode3 0.55 0.55 Mode4 0.52 0.53

b1 b2 b3 b4

Mode1 1.8 1.8 1.8 1.8 Mode2 0 1.8 1.8 1.8

Mode3 0 0 1.8 1.8

Mode4 0 0 0 1.8

Table 3 Gain control signal from base band

While the RF signal power is large enough to saturate the blocks of the receiver, the baseband will sense the failure of receiving signals and sends a control signal to the gain controllable LNA. The multiple gain modes are required for the consideration of adapting to the unpredictable RF signal power. In this work, four gain control modes are planed and the gain tuning range 11.5 dB has been measured. IIP3 is the more significant parameter to identify the gain control scheme is beneficial to the receiver. The IIP3 improvement supports the LNA to adapt to the higher power signals and preserve the following blocks from saturation. The general gain tuning range is about 10 dB and it follows 10 dB IIP3 improvement. In this project, this principle has been accomplished.

2.4.3 Switched Gm Sub-Harmonic Mixer

A new prototype of sub-harmonic mixer suitable for 5.2-GHz ISM band is designed and implemented in a standard 0.18um CMOS technology. By the PMOS active load and a switched Gm prototype at LO port, the new sub-harmonic mixer achieves high conversion gain but still remain high linearity. The fully integrated sub-harmonic mixer achieves high conversion gain of 12.8dB, -1.8 dBm IIP3, and 14.0 dB noise figure at 10-MHz with 4 dBm LO power. Moreover, the proposed sub-harmonic mixer doesn’t consume dc power while there is no LO power.

2.4.3.1 Review of The Gilbert Mixer & Sub-Harmonic Mixer

Fig. 2-11 A basic Gilbert Mixer and the waveforms of output IF current

The double balanced or Gilbert-cell mixer in Fig. 2-11 is most desirable for high port-to-port isolation and spurious output rejection applications [4]~[6]. It can provide high conversion gain and low noise figure. The linearity is reasonably good. There are many design considerations about conversion gain, linearity and noise figure for a Gilbert mixer [25]. Here we only verify that the frequency conversion is attainable. By the waveform shown in Fig.

2-11, the output IF current, I_ifp, can be thought of as the superposition of I_A andI_B.We can simply model the switching on/off as a square wave and the RF signal as cosine based wave with amplitude A . The down conversion principle is derived as follow:

...}]

Eq. (2.25) shows the Gilbert mixer can execute frequency down conversion. The derivation demonstrated above will repeat for sub-harmonic mixer and we compare the difference of frequency translation between Gilbert mixer and sub-harmonic mixer.

Fig. 2-12 Traditional sub-harmonic mixer and waveforms of output IF current

The sub-harmonic mixing method is originally used in microwave circuits. The method uses a LO excitation with quadrature phase operating at a fraction of RF frequency [28]. The traditional sub-harmonic mixers can be implemented based on poly-phase LO switching, however, the circuit don’t have enough voltage headroom. Therefore, they aren’t suitable for voltage scaling down [29]. As shown in Fig. 2-12, the gate bias of the NMOS in the LO switching stage must be biased at least 1V for IIP3 well above 0dBm of a 10dB conversion gain [27]. The conventional method of operating the switching transistors at LO port in saturation region requires significant voltage headroom, thus, reducing the head room available for the load and hence limiting the achievable conversion gain. The tradition sub-harmonic mixer is similar to the basic Gilbert mixer, but the LO switching stage is driven by a quadrature LO signal such that only half of the RF frequency is needed for LO to down convert the RF signal. The RF transconductor stage translates the voltage signal to current signal by transconductance, gm. By the waveform shown in Fig. 2-12, the output IF current,

Iifp, can be thought of as superposition of currents I_A andI_B. The down conversion principle of traditional sub-harmonic mixer is derived as follow:

1 2 1 1

cos( )[ {sin[2 ] sin[6 ] sin[10 ] ...}]

2 3 5

rfp rf LO LO LO

I A ω t ω t ω t ω t

= −π + + +

The down conversion principle can be understood distinctly by the derivated results.

Comparing (2.32) with (2.25), the RF frequencies are down converted by a fundamental LO frequency and a 2^nd harmonic LO one for Gilbert mixer and sub-harmonic mixer, respectively.

By the derivation illustrated above, the operation of Gilbert mixer and sub-harmonic mixer

are understood and the new proposed switched Gm sub-harmonic mixer will be identified as the same operation.

2.4.3.2 Switched Gm Mixer

Fig. 2-13 Switched Gm mixer and the waveforms of IF output current

The switched Gm mixer was first published in 2003 [26]. Because only switches with a conductive channel connected to either Vss or Vdd are used, it requires almost no voltage headroom across the switch and does not require gate-drive voltages outside the supply rails.

As a result, the gate-oxide stress of the switch devices is low, as desired for reliability concern.

Even if oxide reliability is no issue, the conventional method of operating the switch transistors M2 and M3 in saturation requires significant voltage headroom, reducing the headroom available for the load and hence limiting the achievable conversion gain. By using low ohmic switches with a low-voltage drop compared to Vdd, almost the full supply voltage headroom can be reserved for the transconductance device and load, allowing for more conversion gain. By the time domain IF current plotting in Fig. 2-13, the same down conversion principle can be derived as (2.25). And the differential conversion gain can be obtained by multiplying 2g_mR_L to (2.25), that is:

L mR g

CG π

= 4 (2.33)

2.4.3.3 Proposed New Sub-Harmonic Mixer

Fig. 2-14 Proposed switched Gm sub-harmonic mixer

Fig. 2-15 Waveform of the switched Gm sub-harmonic mixer

In this work, we combine a switched Gm technique at LO switching stage and a PMOS active load to implement a new sub-harmonic mixer that we can alleviate the shortage of the

voltage headroom at IF output [4]. Fig. 2-14 shows the topology of the new switched Gm sub-harmonic mixer. There are four inverters in the LO switching stage which are driven by a quadratue LO signal. Therefore, no power is consumed for this mixer while there is no LO input. Only one of the inverters can be activated to let either source of M1 and M2 or source of M3 and M4 be at low voltage.

By the same derivation as illustrated in the sub-harmonic mixer, the new sub-harmonic mixer has the same down conversion principle and it can be derived as follow:

]

Also the output IF current, I , can be derived in the same skill. And we can verify that the _ifp maximum differential conversion gain of the new sub-harmonic mixer is

L mR g

CG π

= 4 (2.37)

However, the advantage of the sufficient voltage headroom at IF ports support the achievable conversion gain and keeps the mixer exhibits high linearity.

In (2.36), we can clearly identify that the proposed sub-harmonic mixer can down convert RF signal by operating the LO signal at half of the RF frequency. The maximum differential conversion gain is identical with the conventional one, but the noise and linearity is not the same case as illustrated in [27]. To acquire more conversion gain and keep the voltage head room sufficient, the PMOS active load is applied to the new sub-harmonic mixer.

For measurement consideration, there are π matching networks in front of each RF and LO

signals. And a source follower is acted as the output buffer for the 50Ω system.

The finite ON-resistance of the switches may reduce the linearity and conversion gain of the switched Gm mixer, and this undesired effect must be estimated. We can model the switch with a finite ON-resistance, R , and it “allows” for source voltage variation. This voltage _on can mix with the RF signal at the gate via the second-order term of the MOSFET, resulting in a differential output current:

I (d V ) of the transconductor MOSFET. If the switch resistance is significantly lower than _gs / 1

1 g , the linearity can be better [27].

2.5 Measurement Consideration and Results

2.5.1 Switched Dual-Band LNA

2.5.1.1 Measurement Consideration

Fig. 2-16 The layout of the proposed switched dual-band LNA

Fig. 2-17 The micrographic of the proposed switched dual-band LNA

The switched dual band LNA is designed for fully on-wafer measurement, therefore the arrangement of each pad must satisfy the probe station testing rules. By the layout shown in Fig. 2-16, two six-pin dc probes are required to feed with eight dc voltages. In addition, two RF probes are also needed for RF signals. Fig. 2-18 (a~b) shows the arrangement for dc and RF probes. The top and bottom are six-pin dc probes, while the left side is GSG RF probes for RF signal input and the right side is GSG RF probes for RF signal output.

The measurement equipments include a network analyzer ( HP8510C ), a noise analyzer ( Agilent N8975A ), a spectrum analyzer ( Agilent E4407B ), three signal generators, and several dc power supplies. Several auxiliary equipments are also required for the measurement setup, such as cables, 50Ω terminals, and power combiners. The losses of cables, combiners, and Baluns are all needed to be considered for calibration.

The S-parameter, noise figure, 1-dB compression point, IIP3 are needed to measure to verifying the switched dual-band LNA performance, and the measurement setups for each parameters are shown in Fig. 2-19 (a~c). We will show and discuss the measured results for each parameter.

(a) (b) Fig. 2-18 (a) On-wafer measurement test diagram(b) The photo for measurement environment

(a) (b)

(c)

Fig. 2-19 Measurement setups for (a)S-parameter (b) noise figure (c)IIP3 and P1dB

2.5.1.2 Measurement Results and Discussion of Dual-Band LNA

As shown in Fig. 2-20 to Fig. 2-23, the S-parameter of the four gain modes are “locked”

in band and this is a benefit for a narrowband system such as 802.11a/b/g. For high gain mode, the measured S-parameter reveals 14.40 dB and 12.02 dB power gain, -12.18 dB and -11.02 dB input return loss, -6.73 dB and -12.09 dB output return loss, and -38.73 dB and -28.64 dB reverse isolation at 2.45-GHz and 5.25-GHz, respectively. For low gain mode, the power gain reduces to 3 dB and 0.18 dB at 2.45-GHz and 5.25-GHz, respectively.

The noise figure increases as the power gain switching form high gain mode to low gain mode. The measured noise figures for high gain mode are 3.54 dB and 2.88 dB at 2.45-GHz and 5.25-GHz, respectively. For low gain mode, the noise figure behaves 5.62 dB and 5.5 dB for 2.45-GHz and 5.25-GHz, respectively. The noise figure increments between high gain mode and low gain mode are 2.08 dB and 2.62 dB for 2.4-GHz and 5.2-GHz band, respectively. The noise figure increment is as expected even with about 11 dB gain tuning.

Fig. 2-20 The measured S11 of the proposed switched dual-band LNA

Fig. 2-21 The measured S22 of the proposed switched dual-band LNA

Fig. 2-22 The measured S21 of the proposed switched dual-band LNA

Fig. 2-23 The measured S12 of the proposed switched dual-band LNA

Fig. 2-24 The measured NF of the proposed switched dual-band LNA

Fig. 2-25 The measured IIP3 at 2.4-GHz band of the proposed switched dual-band LNA

Fig. 2-26 The measured IIP3 at 5.2-GHz band of the proposed switched dual-band LNA

There are four gain modes for the proposed switched dual-band LNA, and the linearity improvement to adapting the higher input power must be considered. In the 5.2-GHz band, the measured IIP3 of the high gain mode is -16.4 dBm, and -4 dBm for low gain mode. A linearity improvement of 12.4 dB is achieved at 2.4-GHz band. On the other hand, the measured IIP3 of high gain mode and low gain mode in 5.2-GHz band are -0.8 dBm and 9 dBm, respectively. A linearity improvement of 9.8 dB is achieved in 5.2-GHz band.

2.5.1.3 Comparison with Other Literatures

This work combines two topics including switched dual-band and gain control ability, however, the published literatures discuss either dual-band or gain control ability. Hence, we compare these two topics independently, and comparison with dual-band LNA and gain controllable LNA are shown in Table 4 and Table 5, respectively.

Process Center

Frequency Vdd S11/

S22(dB) S21(dB) NF (dB)

Table 4 The comparison with published dual-band LNA

In dual-band LNA comparison, this work achieves highest power gain and performs good

noise figure at high gain mode in 5.25-GHz band although the power consumption is the highest. However, the power consumption of this work is endurable in IEEE 802.11 a/b/g application.

Table 5 The comparison with the published gain controllable LNA

In gain controllable LNA comparison, highest gain tuning range is presented in Table 5.

The noise figure of this work in 5.25-GHz band is the lowest and linearity improvement is as expected while operating in low gain mode.

2.5.2 Switched Gm Sub-Harmonic Mixer

2.5.2.1 Measurement Consideration

The proposed sub-harmonic mixer is designed to down convert the 5.25-GHz differential signal, thus a Balun for 5.25-GHz is required to translate the RF signal into a differential signals. We use a Balun offered by CIC, and the Balun can operate at 5.25-GHz.

(a) (b) Fig. 2-27 (a) The LO port quadrature hybrid (b) The LO port rat-race

In addition, a quadrature 2.62-GHz signal is also necessary for the measurement of the sub-harmonic mixer. The method we adopt here is combining a quadrature hybrid shown in Fig. 2-27 (a) with two rat-races shown in Fig. 2-27 (b). Ideally the [S] matrix for the quadrature hybrid has the following form:

⎥⎥

To realize the operation of the four port device, we excite a unit of signal with desired frequency into port1 of the quadrature hybrid and else ports are terminated by 50Ω. The signal power will be evenly divided between port2 and port3, and a phase shift of 90° appears between these two ports. There is no power coupled to port4, and it is the isolation port. The

quadrature signal required in this project is accomplished by a quadrature hybrid and two rat-races illustrated above. The quadrature signals are connected to the LO switching stage shown in Fig. 2-14. We use the two ports vector network analyzer to identify the 90° phase shift of the fabricated quadrature Balun. Each ports are terminated by a 50Ω load except the measuring two ports. Fig. 2-28 shows the fabricated quadrature Balun and we measure its S21, S , ₃₁ S₄₁, S to verify 90° phase shift between port2 and port4. Furthermore, there ₅₁ should be 180° phase shift between port2 (port4) and port3 (port5). The measured forward transmitted S-parameters for the quadrature balun are listed below:

−

∠

=0.440 53.379 S21

∠

=0.438 126.677 S31

−

∠

=0.450 146.00 S41

∠

=0.449 36.811 S51

Table 6 The measured forward transmitted S-parameter for each port

Fig. 2-28 The fabricated LO port quadrature Balun

Fig. 2-29 The measured S-parameters for the fabricated quadrature Balun

Fig. 2-30 The measured S-parameters for the fabricated quadrature Balun

The measured results show that the phase deviation less than 3° is achieved in the fabricated quadrature Balun. By the measured S-parameters, we can recognize that the fabricated quadrature Balun is suitable for our proposed sub-harmonic mixer. Fig. 2-29 and Fig. 2-30 show the magnitude in dB and phase of the measured results, respectively.

The layout of this sub-harmonic mixer is shown in Fig. 2-31, and Fig. 2-33 is the die

在文檔中應用於IEEE 802.11a/b/g之雙頻帶低雜訊放大器和偶次諧波降頻混頻器以及使用0.18um CMOS製作之Ka頻低雜訊放大器和K頻壓控震盪器 (頁 26-0)