Basic Program/Erase Mechanisms

2.2.1 Energy band diagram during program and erase operation

The program/erase physical operation of a standard SONOS memory is illustrated in Figure 2-2. In the program operation, when a positive bias relative to the p-type substrate

applied on gate electrode, substrate induces an electron channel (inversion layer). Then the electron will tunnel through the tunnel oxide into the silicon nitride film and be trapped in deep level traps. Some electrons will not be trapped in the nitride film and will tunnel through the blocking oxide into gate electrode. The trapped electrons provide the electrostatic screening of the channel from the control gate, and result in a threshold voltage (VT) shift. In the erase operation, when a negative bias relative to the p-type substrate applied on the gate electrode. The holes will tunnel through tunnel oxide into the nitride trapping layer and partially be trapped. Further, trapped electrons may be de-trapped into the nitride conduction band and then tunnel back to the channel. Thus, for SONOS memory device operation both carrier types are involved in the transport process.

Figure 2-3 illustrates schematically the write and erase operation of an n-channel nanocrystal memory. When the different bias applied on gate electrode, it causes different results. When the bias is positive relative to substrate, the electrons in the inversion layer inject in to the nanocrystal. That phenomenon is called “write operation”. On the contrary, negative bias applied to gate causes the electrons tunneling back to channel and the holes in the accumulation layer tunneling into the nanocrystal from the channel.

2.2.2 Carrier Injection Mechanisms (a) Channel Hot Electron Injection (CHEI)

The physical mechanism of CHEI is relatively simple to understand qualitatively.

An electron traveling from the source to the drain gains energy from the lateral electric field and loses energy to the lattice vibrations (acoustic and optical phonons). At low fields, this is a dynamic equilibrium condition, which holds until the field strength reaches approximately 10⁵V/cm [2-3]. For fields exceeding this value, electrons are no longer in equilibrium with the lattice, and their energy relative to the conduction band edge begins to increase. Electrons are “heated” by the high lateral electric field, and a small fraction of them have enough energy to surmount the barrier between oxide and silicon conduction band edges. Figure 2-4 shows schematic representation of CHEI MOSFET and the energy-distribution function with different fields.

In the other hand, the effective mass of hole is heavier than one of electron. It is too hard to obtain enough energy to surmount oxide barrier. Therefore, hot-hole injection rarely is employed in nonvolatile memory operation. For an electron to overcome this potential barrier, three conditions must hold [2.4].

(1) Its kinetic energy has to be higher than the potential barrier.

(2) It must be directed toward the barrier.

(3) The field in the oxide should be collecting it.

Nevertheless, a description of the injection conditions can be accomplished with two different approaches. The CHEI current is often explained and simulated following the

“lucky electron” model [2.5]. This model is based on the probability of an electron’s being lucky enough to travel ballistically in the field ε for a distance several times the mean free path without scattering, eventually acquiring enough energy to cross the potential barrier if a collision pushes it toward the Si/SiO2 interface. Consequently, the probability of injection is the lumped probability of the following events [2.6], which are depicted in Figure 2-5.

(1) The carrier has to be “lucky” enough to acquire enough energy from the lateral electric field to overcome the oxide barrier and to retain its energy after the collision that redirects the electron toward the interface (PΦb).

(2) The carrier follows a collision-free path from the redirection point to the interface (PED).

(3) The carrier can surmount the repulsive oxide field at the injection point, due to the Schottky barrier lowering effect, without suffering an energy-robbing collision in the oxide (POC).

(b) Tunneling Injection

There are several tunneling mechanisms are demonstrated in quantum mechanics.

Basically, tunneling injection must to have available states on the other side of the barrier for the carriers to tunnel into. The tunneling probability, depending on electron barrier height (φ(x) ), tunnel dielectric thickness (d), and effective mass (me) inside the tunnel dielectric, is express as [2.7]

(2-1) If we assume elastic tunneling, this is a reasonable assumption due to the thin oxide thickness involved. Namely, no energy loss during tunneling processes. Tunneling through the oxide can be attributed to different carrier-injection mechanisms. Which process applies depends on the oxide thickness and the applied gate field or voltage.

Direct tunneling (DT), Fowler-Nordheim tunneling (FN), modified Fowler-Nordheim tunneling (MFN) and trap assistant tunneling (TAT) are the main programming mechanisms employed in memory [2.8-2.10] as shown in Figure 2-6.

Direct Tunneling

For nanocrystal memories, the control-gate coupling ratio of nanocrystal memory devices is inherently small [2.11]. As a result, F-N tunneling cannot serve as an efficient program/erase mechanism when a relatively thick tunnel oxide is used, because the strong electric field cannot be confined in one oxide layer. The direct tunneling is employed in nanocrystal memories instead. And that makes the nanocrystal memory with lower operation voltage and faster program/erase speed. Generally speaking, a thinner tunnel oxide with thickness below 5 nm is used to separate the nanocrystal from channel.

In the other hand, the direct tunneling is more sensitive to the barrier width than barrier height, two to four orders of magnitude reduction in leakage current can still be achieved if large work function metals, such as Au or Pt [2.12]. Figure 2-6(a) shows the both sides barrier relative to thickness of the oxide that make electron direct tunneling through the oxide.

Fowler–Nordheim Tunneling

The Fowler–Nordheim (FN) tunneling mechanism occurs when applying a strong electric field (in the range of 8–10 MV/cm) across a thin oxide. In these conditions, the energy band diagram of the oxide region is very sharp. Hence, there is a high probability of electrons’ passing through the energy barrier itself. Using a free-electron gas model for the metal and the Wentzel–Kramers–Brillouin WKB approximation for the tunneling probability [2.13], one obtains the following expression for current density [2.14]:

⎥⎥ forbidden gap of the dielectric, h is the Planck’s constant, q is the electronic charge, and F is the electric field through the oxide. However, the exponential dependence of tunnel current on the oxide-electric field causes some critical problems of process control because, for example, a very small variation of oxide thickness among the cells in a memory array produces a great difference in programming or erasing currents, thus

∗

mOX

spreading the threshold voltage distribution in both logical states. Figure 2-6(b) shows the both sides barrier relative to thickness of the oxide that make electron Fowler–Nordheim tunneling through the oxide.

Modified Fowler–Nordheim Tunneling

Modified Fowler–Nordheim tunneling (MFN) is similar to the traditional FN tunneling mechanism, the carriers enter the nitride at a distance further from the tunnel oxide-nitride interface. MFN mechanism is frequently observed in SONOS memories.

The SONOS memory is designed for low-voltage operation (<10 V, depending on the Equivalent oxide thickness), a relatively weak electrical field couldn’t inject charges by DT or FN mechanism. Figure 2-6(c) shows the both sides barrier relative to thickness of the oxide that make electron Modified Fowler–Nordheim (MFN) tunneling through the dielectric.

Trap Assistant Tunneling

The charge storage elements with many traps may cause another tunneling mechanism. For instance, the charges tunnel through a thin oxide and arrive to the traps of nitride layer at very low electrical field in SONOS systems. During trap assisted injection the traps are emptied with a smaller time constant then they are filled. The charge carriers are thus injected at the same distance into the nitride as for MFN injection.

Because of the sufficient injection current, trap assistant tunneling may influence in retention [2.15]. Figure 2-6(d) illustrates the Trap Assistant Tunneling through the dielectric.

(c) Band to Band Tunneling (BTBT)

Band to band tunneling application to nonvolatile memory was first proposed in 1989. I. C. Chen and et al. demonstrated a high injection efficiency (~1%) method to programming EPROM devices [2.16]. Band to band tunneling (BTBT) process occurs in the deeply depleted doped surface region under the gate to drain or gate to source overlap region.

Band to Band Hot Electron Tunneling Injection

In n-type substrate, when band-bending is higher than the energy gap of the semiconductor, the tunneling electron from the valence band to the conduction band becomes significant. The electrons are accelerated by a lateral electric field toward the

channel region and some of the electrons with sufficient energy can surmount the potential barrier of SiO2 like hot electron injection [2.16-2.18]. Figure 2-7 shows device operation during the band to band tunneling induced hot electron (BBHE) injection.

Band to Band Hot Hole Tunneling Injection

The injection is applied for p-type nonvolatile memory device. The mechanism is at the situation for both negative gate voltage and positive drain voltage. Electron-hole pairs are generated by BTBT in the drain region, as shown in Figure 2-8. The holes are accelerated by a lateral electric field toward the channel region and some of them obtain high energy. The hot holes with high energy will inject into charge trapping layer through the tunnel oxide and recombine with the stored electrons. This injection is used for a new erase operation for nonvolatile memory device [2.19].