Chapter 4 High-Isolation Compensated Sub-Harmonic Mixer
4.2 Compensated Stacked-LO Sub-Harmonic Mixer
As shown in Fig. 4-7(a), the stacked-LO core (Q1-Q8) consists of two pairs of Gilbert mixing cells in cascode version with quadrature LO input, say, LOI at the top cell and LOQ at the bottom one. On the other hand, the compensation circuit (Q1a-Q8a) is a replica of the stacked-LO core but LOQ/LOI are fed at the top/bottom cells, respectively, as shown in Fig. 4-7(b).
(a) (b)
(c)
Fig. 4-7 (a) Schematic of the stacked-LO core with LOI at the top cell and LOQ at the bottom cell (b) schematic of the stacked-LO core with LOQ/LOI at top/bottom cells (c) schematic of two stacked-LO cores in parallel.
The switching mechanism of the stacked-LO core is illustrated in Fig. 4-8.
F1(t)/F2(t) represent the switching function with 0(I)/90(Q) LO input phase difference. Further, F1'(t) and F2'(t) represent the switching function after a certain
phase delay (
). Therefore, the switching function of the stacked-LO core shown inFig. 4-8 Timing diagram of the switching function. Dotted lines represent the switching function without a phase delay, i.e., F1(t) or F2(t).
On the other hand, s t2( )F1F2represents the switching function of the circuit shown in Fig. 4-7(b). The switching function s1 or s2 does not have a 50% duty cycle. If two stacked-LO cells with the same transistor sizes are in parallel as shown
in Fig. 4-7(c), the equivalent switching function becomes switching function (sC). Thus, the uncompensated switching function s1(or s2) has an equivalent dc term which results in an RF-to-IF leakage path while the compensated switching function (sC) does not.
More strictly, if the switching devices are BJT (either HBT or vertical-NPN in CMOS process), the sub-harmonic switching function s(t), defined as the ratio of the output IF current and input RF current, can be formulated as
for the SHMs w/ and w/o compensation, respectively, where X VLO 2VT and
represents the phase delay between the top and bottom cells, respectively. That is, the differential RF input current passes through s(t) and generates IF output. On the other hand, a dc imbalance (dc component of ΔIin) results in a leakage of s(t) containing a 2LO frequency component to outputs..Further following Eqn. (4.8), the emitter voltage (VE) of a stacked-LO SHM, indicated in Fig. 4-7(a), can be simplified as
ln cosh( cos )
E DC T LO
V
V
V X t
, (4.21) whose fundamental frequency is 2fLO. For the SHM with delay compensation, VEbecomes
( ) ln cosh( cos ) cosh( sin )
E C DC T LO LO
V
V
V X t
X t
, (4.22) which is the same as a top-LO SHM because both LOI and LOQ signals affect this node, as indicated in Fig. 4-7(c). To clearly validate the improvement in isolation performance, the fast Fourier transform (FFT) of VE in both SHMs at 2fLO with respect to LO voltage swing (VLO) is plotted in Fig. 4-9(a).FFT of S(t)
(
at dc/f
2LO)
Phase Delay
(
Degree)
V
LO=0.1V
(b)
Fig. 4-9 (a) Fast Fourier transform (FFT) of the VE at 2fLO with respect to LO voltage (b) FFT of the S(t) at dc and 2fLO with respect to a phase delay for both SHMs.
Ideally, the 2LO frequency component can be strongly suppressed by the proposed compensation circuit. This cancellation phenomenon has been discussed
using a graphic explanation of transient waveforms for MOS mixers but with different circuit implementations, a 4x SHM [44] and a merged LNA and I/Q mixer [45].
The FFT of the switching function s(t) for both SHMs at dc and 2fLO with respect to a phase delay (
) is shown in Fig. 4-9(b). The dc of s(t) results in an RF leaky path to output without a frequency translation. Using the compensation circuit, the dc term of s(t) can be highly suppressed while the 2LO switching performance still maintains as shown in Fig. 4-9(b). The mathematic analyses Eqns. (4.19)-(4.22) are based on the exponential transfer curve which is still preserved at different temperatures for a SiGe HBT device. Thus, the isolation improvement by the compensation core is still significant over temperature.In addition, the phase delay between the top and bottom cells can be approximated as (180 ) tan (1
f f
T) which is the current phase delay of a common-base configuration and fT is the current cut-off frequency. Conventionally, if no delay compensation is applied, the phase delay (usually >> 10 at high frequencies) greatly degrades the RF-to-IF isolation, even if the LO signal is perfectly differential-quadrature.4.3 15-GH
ZS
IG
EHBT S
UB-H
ARMONICM
IXERW
ITHD
ELAYC
OMPENSATIONFig. 4-10 shows the schematic of 15-GHz SHMs w/ and w/o delay compensation.
Each stacked-LO core (Q1-Q8/Qa1-Qa8) consists of two Gilbert cells in cascode configuration with a 90 LO input phase offset. The LOI is applied to the top cell of the main SHM and LOQ to the bottom one while the opposite connections are applied to the top/bottom cells of the compensation core. The double-balanced topology ideally achieves infinite LO-to-RF/IF isolation; however, any signal/device mismatch and substrate coupling degrade both the isolation and even-order distortion
performance. The current bleeding technique is used to boost the conversion gain by drawing out the dc current from the mixer core to allow larger loading resistances, thus resulting in a lower transistor fT. In this work, the current density of transistors in the SHM without compensation is 0.4 mA/μm2 with a 40-GHz fT. The transistor in the SHM with compensation has a current density of 0.2 mA/μm2 with a 30-GHz fT
because the two stacked-LO cells are in parallel. Note that, a wideband common-collector voltage buffer is employed at each I/Q output to validate the pure isolation performance without additional suppression of LO leakage [40], [46]-[47].
R1
C1
R2
C2
( Compensation Core )
(Main Stacked LO SHM
- )( Marchand Balun ) ( Poly Phase Filter - )
RF LO LO
I Q I Q
VE
I
RFinIFout
I
Fig. 4-10 Schematic of the SiGe HBT SHMs w/ and w/o delay compensation. (LO bias circuit is not shown for simplicity)
Differential-quadrature LO signals are generated by a two-stage poly-phase filter (PPF) from differential LO signals. For the designed center frequency of 7.5 GHz, the resistances and capacitances are 50 and 0.424 pF in the first stage and are 100 and 0.212 pF (two 0.424-pF capacitors in series) in the second stage. The progressive
increase of the resistances somewhat relaxes the voltage loss. Additionally, all the dc biases of the following mixer cores are fed from 5-k resistors. An RF Marchand balun [31], [34], [47] consisting of two quarter-wavelength spiral edge-coupled coupled lines is used to generate differential signals as shown in Fig. 4-10. Each coupled line has a line width, line spacing and outer diameter of 8 μm, 2 μm and 270 μm, respectively.
Fig. 4-11 Die photo of the SiGe HBT SHM w/ compensation.
Fig. 4-12 Die photo of the SiGe HBT SHM w/o compensation.
Die photos of the SHMs w/ and w/o delay compensation are shown in Fig. 4-11 and Fig. 4-12, respectively. The supply voltage is 3.3 V with the total current consumption of 8 mA (5mA in mixer core; 1.5 mA in each IF I/Q buffer) for both circuits. The conversion gain with respect to RF frequency is shown in Fig. 4-13.
With an LO power of −2 dBm, the SHMs w/ and w/o compensation have a peak
conversion gain of 10/11 dB at RF=8 GHz with an RF bandwidth of 5-17 GHz which is dominated by the RF Marchand balun. The EM simulated frequency response of the Marchand balun is also shown in Fig. 4-13.
Simulated S21 of Marchand Balun Simulated S31 of Marchand Balun
Conversion Gain (dB)
Fig. 4-13 Conversion gain as a function of RF frequency.
7.0 7.2 7.4 7.6 7.8 8.0 Fig. 4-14 LO-to-RF/IF isolation.
The LO-to-RF/IF isolation is shown in Fig. 4-14 and the 2LO-to-RF/IF and RF-to-IF isolation is shown in Fig. 4-15 at fLO=7.5 GHz (center frequency of the PPF) and fRF=15.001 GHz. By the compensation technique, large improvement covering a wide bandwidth is obtained. The 2LO-to-RF/IF isolation is improved by 34/35 dB, LO-to-RF/IF isolation by 8/9 dB and RF-to-IF isolation by 22 dB at 15 GHz. To verify the effect of process variation, five random samples are measured. Thus, the
2LO-to-RF/IF isolation performance of the SHM w/ compensation still shows at least 30 dB improvement than that of the SHM w/o compensation.
14.00 14.5 15.0 15.5 16.0
Fig. 4-15 2LO-to-RF/IF and RF-to-IF isolation.
-40 -30 -20 -10 0 10 20 30 40
IP1dB=-18dBm IIP3=-6dBm IIP3=-4dBm
Fig. 4-16 Power performance.
Fig. 4-16 shows the power performance of the SHMs w/ and w/o compensation at fLO=7.5 GHz, fRF1=15.001 GHz and fRF2=15.0012 GHz; thus, the IP1dB, IIP3 and IIP2
are −18/−18 dBm, −4/6 dBm, and 30/27 dBm, respectively. The input return loss of both SHMs is better than 11 dB from 5 to 30 GHz. The SHMs w/ and w/o compensation achieve conversion gain of 9/10 dB with 200-MHz IF bandwidth and double-sideband noise figure of 14/13.5 dB when fLO=7.5 GHz as shown in Fig. 4-17.
The thermal noise of an active mixer is dominated by the RF Marchand balun and the input transconductance stage; thus, the overall noise figure is similar for both SHMs because of the identical transistor sizes and bias conditions.
0.1 1 10 100
Conversion Gain w/ compensation w/o compensation
DSB Noise Figure w/ compensation
w/o compensation DSB Noise Figure (dB)
Fig. 4-17 Conversion gain and double sideband noise figure.
An SHM using a fully symmetrical LO doubler core [43] was demonstrated in our previous work [46]; however, eight extra transistors and unbalanced current density of mixer transistors in that topology limit the performance, including the maximum operating frequency and isolation performance with the same dc power consumption.
We also implemented the compensated SHM using 0.15-μm pseudomorphic high electron mobility transistor (pHEMT) technology (with peak fT of 85 GHz) [47] and the comparisons of SHMs w/ and w/o compensation are also done by using 0.15-μm metamorphic high electron mobility transistor (mHEMT) technology (with peak fT of 110 GHz). TABLE. 4.1 summarizes the circuit performance of the SHMs using 0.35-μm SiGe HBT, 0.15-μm pHEMT, and 0.15-μm mHEMT technologies.
However, the large difference in mobility between the two-dimensional electron gas (2-DEG) channel and electrons in AlGaAs donor layer cause the pHEMT device
sensitive to process variation. A small difference in gate recess etching results in a strong drain current variation. Thus, isolation performance was limited by a large device mismatch. On the other hand, the I-V curve in SiGe HBT technology depends on the material bandgap. The advance in modern epitaxial techniques improves SiGe HBT device match greatly by controlling the bandgap precisely. Due to the better device match in the SiGe HBT technology, 2LO-RF/2LO-IF/LO-RF/LO-IF/RF-IF isolation in this work is 35/37/29/37/32 dB better than that reported in [47] for the compensated pHEMT SHM. Further, as indicated in TABLE. 4.1, the isolation improvement in mHEMT technology is also valid. However, the device mismatch is much more significant than the effect of the current phase delay. Thus, the overall isolation performance is not good and the improvement is also limited .
TABLE.4.1PERFORMANCE COMPARISON OF SHMS WITH DELAY COMPENSATION
USING DIFFERENT TECHNOLOGIES
Technology 0.35-μm SiGe HBT (peak fT=67 GHz)