Driving Signal

From last paragraph we decide which matrix type used in cholesteric liquid crystal display, and in Fig. 4 we know the brief voltage strength–texture states transitional flow chart.

This section is based on the knowledge previous and introduces what types of gate and source driving signals would be applied and then the corresponding states in pixel.

The response of a typical bistable cholesteric liquid crystal reflective display to voltage pulses is shown in Fig. 7 [6]. The voltage pulse width was 40 ms in the condition of cell thickness was 5μ m. Curve a is the response of the material initially in the bright, planar texture and if the voltage pulse is below V₁, the material remains in the planar texture. When the voltage pulse in the region between V1 and V2, some liquid crystals remain in the planar texture, and the others are switched to the focal conic texture, which forms so-called “gray level” in the mixture of planar and focal conic texture. The higher the voltage pulse, the more liquid crystals are switched to the focal conic texture, and the lower the reflectance becomes.

When voltage is equal to V2, focal conic texture is acquired, and state goes into completely dark. When voltage is in the region between V₂ and V₃, some are switched to the focal conic texture, and the other are switched to the homeotropic texture during the pulse and relax back to the planar texture after the pulse. The higher the voltage, the more return to the planar texture, and the higher the reflectance becomes. When pulse is higher than V3, the material is switched to the homeotropic texture during the pulse and relaxes to the planar texture after the pulse.

V1 V2 V4V3 V5 Low

High

a

b

Fig. 8. Response in Bistable Cholesteric Reflective Display to Voltage Pulse.

(a) The material is in the planar texture before the use of voltage pulse.

(b) The material is in the focal conic texture before the use of voltage pulse.

Curve b is the response of the material initially in the focal conic texture. When the voltage is below V₄, the voltage pulse doesn’t make any effect on liquid crystal and material remains in the dark, focal conic texture. When pulse is between V4 and V5, some are switched to the homeotropic texture during the pulse and relax to the planar texture after the pulse, and others remain in the focal conic texture, which forms gray level display. The higher the voltage, the more domains are switched to the planar texture, and the higher the reflectance becomes, in other words, gray level is near to bright image. When the voltage is above V5, the material is switched to the homeotropic texture during the pulse and relaxes to the planar texture after the pulse.

The response of the material depends on the pulse width. For a shorter pulsing time, all the voltages, from V1 to V5, must be shifted to higher values based on the principles of driving liquid crystal whose two terminals rely on charge accumulation. In other words, pulsing time decreases with increasing voltage levels.

In our design, gate driving signals (G1, G2, …Gn) and source driving signals (S1, S2, …Sn) are specified as following:

Gate Driving Signals

In Fig. 8(a) and Fig. 8(b), pixels in each row are selected using equation (1), accompany with different source driving signals in equation (3),(4),(5) will generate corresponding effective voltage V_pixel across pixel to charge or discharge and then determine which texture state shows up. In Fig. 8(a), pixels are selected to write in data with pulse (black solid line) whose voltage level is equal to equation (1), if source driving signals (blue dash line) are using equation (3) that source and gate driving signals have the opposite polarities, the effective voltage V_pixel across pixel, equation (1) minus equation (3), has the equivalence to V₅ which would make liquid crystal planar texture and high reflectance display; when voltage strength in equation (4) is applied to source driving signals in Fig. 8(b), source and gate driving signals have the same polarities, and the effective voltage Vpixel across pixel is V2,

much lower than that in Fig. 8(a). In the circumstances, whenever cholesteric liquid crystal is initially in planar or focal conic texture, material has the stability at low reflectance state finally. In the gray level driving condition, whatever voltage level is specified in equation (5) which is in the region between positive polarity in equation (4) and negative polarity in equation (3), Vpixel always situates between V2 and V5, and the variation of reflectance between

lowest and highest position is observed.

In Fig. 8(c) and Fig. 8(d), pixels in each row are non-selected using equation (2), in which gate driving signals are terminated and pixels are inactivated whatever source driving signals are. In this moment, V_pixel in various pixels are always equal or smaller than the absolute value of equation (3) and (4) whose pulse magnitude is designed smaller than V1 to keep states unchanged. In other words, when G_k = 0V, whatever type of source driving signals are, the display remains its appearance since the effective voltage pulse Vpixel across pixel smaller than V₁.

½ (V5+V2)

-½ (V5+V2) -½ (V5-V2)

½ (V5-V2)

Vpixel = V5, Planar, Bright

½ (V5+V2)

-½ (V5+V2) -½ (V5-V2)

½ (V5-V2)

Vpixel = V2, Focal Conic , Dark

-½ (V5-V2)

½ (V5-V2)

Vpixel ≦ ½(V5-V2) < V1 State unchanged

-½ (V5-V2)

½ (V5-V2) Select

Non-Select

Vpixel ≦ ½(V5-V2) < V1 State unchanged

Source Gate

(a) (b)

(c) (d)

Fig. 9. Pixel States with Various Driving Voltage.

According to the document [7] released from CHUNGHWA PICTURE TUBES, LTD, the breaking point voltages (Vi , i= 1, 2, 3, 4, 5) consistent with that in Fig. 7 is 5V, 10V, 27V, 25V and 30V. When regarding the maximum required voltage of gate driving signals in equation (1), half of the addition V2 to V5 equaling to 20V is applied. Thus, in the next driving system the uppermost voltage 20V should be generated and take use in pixels driving.