Driving System

After understanding the principle of passive matrix addressing scheme and which type signals are used in gate/source driving, brief block diagram of driving system in Fig. 9 is introduced in this section.

First, Timing Controller receives input signals coming from previous stage such as microprocessor or external stimulus. After decoding in Timing Controller, Xclk , Xstart and Yclk , Y_start , Y_data , Y_latch send into Gate and Source Driver separately. X_start activates when users want to refresh Ch-LCD panel, and then addressing mechanism starts: G1 is addressed in the first high enable of X_{clk ,} and pixels in Row₁ are activated in the meanwhile G₂~ G_n are inactivated with 0V driven, and S1~ Sn write data in simultaneously; next G2 is addressed in the second high enable of X_{clk ,} andpixels in Row₂ are activated in the meantime S₁~ S_n write data in;

rows by rows until the last Rown completes data writing.

Ch-LCD Panel Source Driver (Shift Register + DAC)

Gate Driver

Input Timing Controller

Ystart Yclk

Xclk

VSH

≤ +20V

VGH (+20V) VGL (- 20V)

Power

Management VGH/VGL/VSH/VSL GND

VSL

≥ -20V

Xstart Ydata Ylatch

Fig. 9. Brief Block Diagram of Driving System in Cholesteric liquid Crystal Display.

One important thing worthy to notice is that liquid crystal should be driven by AC signals [8] shown as Fig. 8 in order not to accumulate too many charges on the two terminals of electrode to have bad impacts on physical and chemical characteristics, which generates blurred image, lifetime decreasing and unrecoverable damage on liquid crystal. Based on this concept, same magnitude but with opposite polarity voltage pairs are required. In other words, if VGH = +20V is applied to gate driver and unavoidably VGL = -20V is necessary to achieve polarity alteration on liquid crystal.

In Source Driver part, after Y_start activating, shift register starts to latch Y_data in every positive edge of Yclk. By this way, serial data array transforms into parallel array stored in storage register. When data array transformation’s done, enable of Y_latch would sends all data into DAC and buffer to driving pixels at the same time in vertical or column direction.

Accompany with gate driver signals (G₁, G₂, …G_n) sent out continuously instead of simultaneously, source driver signals vary with different Gk time slot.

From equation (1), (2) and (3), we know the determination of states in planar texture, focal conic texture and gray level display depends on electrical field strength sent by Source Driver.

And it can be found that the highest voltage VSH and lowest voltage VSL required by Source Driver are in the region between +20V and -20V, which are the same with VGH, VGL required by Gate Driver generated by Power Management. In other words, Power

Management not only produces typical +20V and -20V, but also multiple voltages inside the range to make cholesteric liquid crystal in various states. Besides, it’s necessary to have enough driving capability of VGH/VGL/VSH/VSL to satisfy the charging/discharging mechanism and speed. Next part, advantage and drawback in various power sources are discussed and analyzed, furthermore find out the most appropriate solution fit in cholesteric liquid crystal panel driving system.

1.4 Power Source

In this section, we will give a brief introduction to three types of most common regulators, linear regulators, switching capacitor circuits, and Inductor Switching Regulators.

Finally, we give a comparison about these three types of regulators.

1.4.1 Linear Regulators

As shown in Fig. 10, the linear regulator [9]-[11] consist of a error amplifier to correct input and output difference, a pass device to supply load current, and a resistive feedback network. The structure is the most compact without complex control circuit, results in smaller chip size and cost. The linear regulator utilizes the feedback network to construct shut negative feedback effect to regulate the output voltage. In this way, this kind of regulator does not need switching clock, so the output noise can be minimized and the output voltage does not exist ripple. Without dual storage components, linear regulator only can be operated in buck operation. The efficiency of linear regulator is about the output voltage dividing input voltage. The highest efficiency occurs that output voltage is near input voltage, i.e. low dropout operation. The supply load ability depends on pass device’s size.

Fig. 10. The Schematic of A Low Drop-Out Linear Regulator.

1.4.2 Switching Capacitor Circuits

As shown in Fig. 11, this is a conventional charge pump converter [12]-[15]. During ψ1 phase, the input voltage charges Cs to input voltage. During ψ2 phase, the output equals to input voltage adding voltage across Cs, and gets twice input voltage. With hysteric feedback control, the output is regulated at desired output voltage. The charge pump can also be operated in buck or boost mode, but the efficiency is higher in boost mode. The control circuit is more compact than switching converters, but more complex than linear regulators. Due to switching clock, charge pump also suffers from EMI and noise problems. But these problems are slighter than switching converters’, results from smaller switching frequency in the range of hundreds of Kilo-Hertz. The supply load ability of charge pump is weak, because this depends on capacitor size and switching frequency.

Fig. 11. The Schematic of A Close Loop Switching Capacitor Voltage Doubler.

1.4.3 Inductor Switching Regulators

As shown in Fig. 12, this is a conventional voltage mode switching buck converter [16]-[20]. It compares the output voltage with reference voltage to decide the duty cycle.

When power PMOS conducts, the supply voltage will charge the inductor and capacitor. And in the next time, the power NMOS conducts, so the inductor will be discharged to the capacitor. Due to dual storage components, inductor and capacitor, the switching converter can be operated in buck or boost operation. Generally speaking, the efficiency can be achieved above 90% under heavy load condition. Meanwhile, with higher switching frequency in the range of hundreds of Kilo-Hertz to several Mega-Hertz, the storage components can be designed smaller to save the cost. But the EMI and noise problems become critical. Depended on efficiency requirement, the control circuit is much larger than the other two and the cost is the most. The supply load ability is the largest always in the range about hundreds of milliamps to several amps.

Fig. 12. The Simple Architecture of Buck Converter.

Therefore, the switching regulators can classify into three topologies as functional works.

Listed in Table , are buck, boost and flyback converters.

The first regulator called as buck converter because its property that step down the input voltage with respect to output node. The conversion ration M(D) is written as M D( )D. The second regulator called as boost converter because its property that step up the input voltage with respect to output node. The conversion ration M(D) is written as ( ) ¹

M D 1

 D

 . The last regulator called as flyback converter also named buck-boost converter because its property that step up or down the input voltage with respect to output node. The conversion ratio M(D) is written as ( )

There are many advantages of switching regulators to compare with the linear regulators and charge pumps. Switching regulator had high current efficiency because it used power MOSFET as switches and inductor, capacitors as energy stored elements. When the switched

Table I. Three architecture of switching regulators.

Architecture Conversion Curve

transistor operated in the cutoff region, it had no power dissipation. When the switched transistor operated in triode region, it was nearly a short circuit with little voltage drop across it, and had little power dissipation. Hence, almost power dissipation was spent in output node;

high power efficiency could be achieved numerically in the range 80% to 90%.

Switching regulator also had disadvantages. There were more complexity in circuit design than the linear regulators and also required discrete components such as inductor and capacitors. Furthermore, the transition response time and output noise were larger than the linear regulators.

A comparison table between linear regulators, charge pumps and switching regulators are listed in Table II. Switching regulators are the best choices for power supplies driving portable application because of their high efficiency and high power capability.

Table II: Comparisons of the different power supply circuits.

Linear Regulators

Charge Pumps

Switching Regulators

Efficiency Low Medium High

Power Capability Medium Medium High

Footprint area Compact Moderate Large

Cost Low Medium High

Complexity Low Medium High

Noise Low Medium High

1.5 Design Motivation

When new types of display such as active matrix organic light emitting diode(AMOLED), electrochromic displays(ECD), electrophoresis displays(EPD), twisting ball displays(TBD), and cholesteric liquid crystal display(Ch-LCD) show up to change generally people’s lives, which are regarded as the next generation industry, various custom-designed panel drivers are designed and manufactured corresponding to different purposed using. Many approaches are proposed [21]-[25] to enhance speed of AMOLED, and some methods even products [26], [27] are brought up to fit panel’s characteristics.

In the previous discussion of general power supply methodology, boost dc-dc converters and switching capacitor circuits are usually applied to Ch-LCD due to their property of promoting voltage to much higher voltage levels, in which the laced of voltage multiple property in linear regulators cannot be used. The advantage of boost converters are obviously high efficiency and high driving capability mentioned in Table II. Thinking to uppermost ten pikofara of the capacitor loading in each cholesteric liquid crystal pixel, when panel’s size becomes larger, capacitance of liquid crystal and the parasitic capacitance, parasitic resistance of bonding wires are sure to cost the speed, conducing the increasing driving capability of the power supply to compensate the transient performance, which would turn into a serious requests if switching capacitor circuits are used. Besides, if the violent approach is utilized to directly enlarge the stored capacitors and area of passing transistors in order to pass more driving current through in switching capacitor structure, there’s too much energy consumes in the on-resistance of every passing transistor and lead to energy and area inefficiency. From this point of view, boost converters are the most qualified candidate for driving liquid crystal.

But considering another side, large voltage difference between two terminals of liquid crystal in Fig. 7 reaches to 40V boost converters have to supply. Under the circumstances,

high sustained, up to 40V across drain and source terminals MOSFETs both in high and low side in the right hand of inductor are unavoidably implemented. If foundry cannot support the integration circuit(IC) resources, it cannot be avoided to use two external MOSFETs to produce one channel and high voltage output, which results to the waste of area. Furthermore, conventional boost converter structure have the characteristics that one input source promote a higher voltage output counting on energy storage elements of an inductor and a capacitor.

The property leads to the result that N outputs needed in gray level driving require N sets of energy storage, which doesn’t gain any benefit to achieve numerous voltages by largely consuming area.

Summary of all, switching capacitor circuits can generate any composition of voltage level required when considering gray level display, but have the dilemma of driving capability and power efficiency. Boost dc-dc converters have the merits of high efficiency even with stronger current driving, but growing up in area waste when more outputs are produced.

Therefore, seeking one effective approach in dc-dc converters to satisfy all the demands of high efficient/driving capability and the use of multiple voltages is urgent in cholesteric liquid crystal display. In the following chapters, the optimum solution to the request will be proposed and discussed step by step.

1.6 Thesis Organization

The concept of single inductor multiple output dc-dc converter is organized in chapter 2.

Proposed single inductor dual/bipolar positive negative high voltage outputs and self biasing switching capacitor technique are illustrated in chapter 3. Circuit implementation of the proposed technique is described in chapter 4. Experimental results are shown in chapter 5.

Finally, the conclusion and future work are made in chapter 6.

Chapter 2

Introduction to Single Inductor Multi-Outputs DC-DC Converters

2.1 Concept

Today’s field of power management requires high power conversion efficiency, fast line/load transient response, and small volume of the power module. In particular, cell phones, digital cameras, MP3 players, PDAs and portable products require varied voltage levels of power supplies for delivery to different sub-modules in portable products. Thus, there are different designs that provide different voltage levels as shown in Fig. 13. Low dropout (LDO) regulator arrays are one of the designs for different voltage levels as depicted in Fig. 13(a), where the index i is from 1 to n which is used to index the n^th output. However, LDO regulator arrays sacrifice power conversion efficiency and greatly reduce battery life.

The other solution is illustrated in Fig. 13(b), which combines with different inductive switching converters. The high power conversion efficiency is ensured by the inductive switching converter. However, the large number of inductors occupies the large footprint area and increase fabrication cost.

To achieve microminiaturization and high power conversion efficiency for a power management unit, the single inductor multiple output (SIMO) DC-DC converter has been developed as a suitable solution. The conceptual SIMO DC-DC converter is shown in Fig.

13(c). It only uses one inductor component to generate multiple voltage levels for different

sub-modules in the portable products. The SIMO DC-DC converter not only reduces the footprint area and fabrication cost but also provides highly power conversion efficiency [28].

However, all load current conditions of the multiple output terminals arise in the current level of the inductor. When the load current condition of each output accumulates in the same inductor, the design challenges of the SIMO DC-DC converter such as cross-regulation, power conversion efficiency, system stability, and lack of flexibility of both the buck and boost must be seriously addressed.

V_DD1

Fig. 103. Different power management designs. (a) Use of many LDO regulators. (b) Use of many switching converters. (c) Use of a single-inductor and multiple-output converter.

2.2 Literatures Review

Several topologies and control techniques have been proposed to implement SIMO DC-DC converters [29]-[40]. The SIMO DC-DC converter in [28] uses the hysteretic continuous current mode (CCM) control method and state machine to regulate output voltage. The proposed single-inductor multiple positive/negative output dual-loop DC-DC converter in Fig. 14 operates all output voltage levels (positive and negative) independently on a cycle by cycle base. The control of the individual channels is managed by a state machine (first loop) which takes care of the power stage switching pattern and allows the hysteretic converter to run in a pseudo-continuous current mode (PCCM) to guarantee a high

power conversion capability. The second loop works as a variable peak current control to minimize the inductor current. It will be demonstrated why running with a controlled peak current also yields in a small output voltage ripple and how the state-machine can help to further control the amount of energy delivered into one output channel.

FBL Vgl

Fig. 14.The State Machine With Hysteretic CCM Control Method [28].

Vg

Fig. 15. The Charge Control Method of SIDO DC-DC Converter [29].

The work in [29] proposed the charge control method and divided one period to regulate the multiple output voltages. This converter in Fig. 15 required fewer switches than the conventional design. Comparing the simulation results of the non-inverting fly-back converter with that of the buck/boost converter, a 5% improvement in efficiency is achieved with the same load condition. Also, it can be achieved good line and load regulation and minimizes cross-regulation by a pre-defined and fixed freewheeling current level I_DC. Owing to the high freewheeling current level, the power conversion efficiency is greatly decreased in light load condition.

The works in [30] and [37] calculate the cross-regulation problem when one period is divided to regulate the multiple boost output voltages. This converter in [30]-[35] and [39]

adopts time-multiplexing (TM) control in providing two independent supply voltages using only off-chip inductor. This converter is analyzed and compared with existing counterparts in the aspects of integration, architecture, control scheme, and system stability.

Implementation of the power stage, the controller, and the peripheral functional blocks is discussed. The block diagram of SIDO DC-DC converter in [30] is shown in Fig. 16.

Furthermore, the work in [37] proposed the PCCM which involves the advantages of CCM and discontinuous conduction mode (DCM).

Sa

Fig. 16. The Block Diagram of SIDO DC-DC Converter [30].

The works in [38] are proposed to monitor freewheeling current as the inductor current control method for dual boost output voltages. Fig. 17 shows the architecture of a synchronous boost converter with freewheeling current feedback. Unlike conventional converters, an error amplifier, rather than the output voltage, is used to regulate the freewheeling current IF. Since freewheeling current does not go negative however, there should be a DC offset level for the feedback loop to be controlled properly. Slope compensation is not necessary in this control loop, although the switch current, is used for duty cycle control like in a conventional current-programmed mode (CPM) converter.

Because there exists a freewheeling period in every cycle, the operation is similar to that of a DCM converter.

Fig. 17. The synchronous boost converter with freewheeling current feedback [38].

The work in [40] orders power distribution of four boost output voltages. The ordered power-distributive control (OPDC) arranges four boost outputs V_o1, V_o2, V_o3, and V_o4 in descending order of priority to, one by one, share the charge from the inductor in every switching cycle or, more correctly, every power distribution cycle. Its first three output voltages are controlled using comparators and are thus called comparator-controlled output voltages, while the last-ordered output is proportion-integration (P-I) controlled with an error amplifier that is responsible for the converter’s total charge. Therefore, in this OPDC, all of the errors of the preceding comparator-controlled outputs are transferred and accumulated to the last, which is the only one requiring a compensation network in the feedback loop. The architecture of the five-output SIMO converter is shown in Fig. 18.

Vg L

Fig. 18.The five-output SIMO converter with ordered power-distributive control [40].

Chapter 3

Balanced Dual/Bipolar Outputs Structure Based on Switching

Capacitor Multi-Output Mechanism

Various types of SIMO are discussed in chapter 2, from where we can find out and conclude the most appropriate topology to meet the requirement of power supply for cholesteric liquid crystal. Besides, according to our design for energy-saving electronic paper, the proper minimum switch number structure will be used in power delivery path.

Furthermore, additional function of switching capacitor multi-output mechanism is proposed in order to make the structure workable.

3.1 Balanced Dual/Bipolar Outputs Structure

In Chapter 1, we have a conclusion that using boost converter is more efficient comparing with the use of switching capacitor circuits even with larger current driving capability. But it consumes footprint area to generate high enough voltage output using external energy passing transistors and if we want to produce multiple outputs. Thus, the more attractive way to use in my opinion is to apply a SIMO topology having positive and negative outputs which turns uppermost +40V single output and ground into +20V and -20V bipolar outputs. The merit largely lower down the requests of anti-over stress elements and make

energy passing transistors, or power mosfet, fully integrated possible. The idea is the same as SIMO with peak current state-machine control [28] which takes use of a diode attached in the

energy passing transistors, or power mosfet, fully integrated possible. The idea is the same as SIMO with peak current state-machine control [28] which takes use of a diode attached in the