Electrical Characteristics of Nonvolatile Nickel-Silicon-Nitride (Ni-Si-N)

4.2.1 Introduction

Nonvolatile nanocrystal memories have recently been one of promising candidates to take the replace of conventional floating gate nonvolatile memory, because the discrete traps as the charge storage media have effectively improved data retention under endurance test for the device scaling down [4.19-4.21]. In past years, the requirements of next-generation nonvolatile nanocrystal memory are the high density cells, low-power consumption, high-speed operation and good reliability.

Hence, the nonvolatile metal nanocrystal memory devices were extensively investigated over semiconducting nanocrystals, because of several advantages, such as stronger coupling with the conduction channel, higher density of states (transport perspectives) than semiconductor (i.e. larger charge storage) and a wide range of available work functions (faster programming time and better data retention) [4.22, 4.23]. A nonvolatile memory device with metal nanocrystals has been formed by several experiment techniques, for instance, self-assembled of tungsten (W) nanocrystal by using thermal oxidation process [4.24], separation of nickel (Ni) or gold (Au) nanocrystal by direct thermal annealing [4.25, 4.26], and formation of platinum (Pt) or cobalt (Co) nanocrystal by using molecular beam epitaxy (MBE) [4.27, 4.28]. Besides, the charge trapping layer also can contain some Si-N bonds which increase trapping states to improve charge storage capacity and program/erase efficiency for the nonvolatile metal nanocrystal memory devices, such as metal-oxide-nitride-oxide-semiconductor (MONOS) structure or silicon-germanium-nitride (SiGeN) structure [4.29, 4.30].

formation will be proposed by sputtering a commixed target (Ni0.3Si0.7) in the argon (Ar) and nitrogen (N2) environment at room temperature. It was found that the Ni-Si-N nanocrystals embedded in the silicon nitride (SiNx), due to larger Gibbs free energy of chemical bond of Si-N than Ni-N at the room temperature [4.31, 4.32]. In addition, high resolution transmission electron microscope (HRTEM) and x-ray photoelectron spectroscopy (XPS) were adopted for the micro-structure analysis and chemical material analysis of Ni-Si-N nanocrystals. Furthermore, these electrical characteristics of Ni-Si-N nanocrystals would be compared with the performance of Ni-O-Si nanocrystals nonvolatile memory.

4.2.2 Experiment

This memory-cell structure in this section was fabricated on a 4 in. p-type silicon (100) wafer. After a standard RCA process, 3-nm-thick tunnel oxide was thermally grown by a dry oxidation process in an atmospheric pressure chemical vapor deposition furnace (APCVD). Subsequently, a 10-nm-thick nitrogen incorporated Ni0.3Si0.7 layer was deposited by reactive sputtering of Ni0.3Si0.7 commixed target in the Ar (24 standard cubic centimeters per minute (sccm)) and N2 (10 sccm) environment at room temperature, and the DC sputtering power was set to 80 W. Then, a 30-nm-thick blocking oxide was deposited by the plasma enhanced chemical vapor deposition (PECVD) system at 300^oC. Hence, these ternary nanocrystals could be found to precipitate and embed in SiNx during the foregoing process. Al gate electrodes on back and front side of the sample were finally deposited and patterned to form a metal/oxide/insulator/oxide/silicon (MOIOS) structure. The formation flow of MOIOS structure was shown in Fig. 4-8. Electrical characteristics, including the capacitance-voltage (C-V) hysteresis, current density-voltage (J-V), and retention characteristics, were also performed. The J-V and C-V characteristics were measured

by Keithley 4200 and HP4284 Precision LCR Meter with high frequency of 1 MHz.

4.2.3 Results and Discussion

4.2.3.1 Material and electrical analyses of Ni-Si-N nanocrystals

Figure 4-9 exhibits a cross-sectional TEM image of the nitrogen incorporated Ni0.3Si0.7 film containing spherical and separated nanocrystals embedded in the SiNx

matrix. It is found that the thickness of tunnel oxide is larger than 3 nm, due to the contribution of SiNx matrix by TEM analysis.This SiNx matrixcan be used to improve charge storage ability for nonvolatile memory application [4.30]. Moreover, the average diameter of the nanocrystals is approximately 5-6 nm and the area density of the nanocrystals is estimated to be about 1.08×10¹² cm^-2 by HRTEM analysis.

To further investigate the nanocrystals, we have performed XPS analysis by using an Al Kα (1486.6 eV) X-ray radiation to demonstrate the chemical composition of the nanocrystals. To correct possible charging effect of the film, the binding energy was calibrated using the C 1s (284.6 eV) spectra of hydrocarbon that remained in the XPS analysis chamber as a contaminant. Figure 4-10(a) shows the XPS Ni 2p core-level photoemission spectra which consist of two main peaks, 2p3/2 (~ 855 eV) and 2p1/2 (~ 873 eV), with two small satellite peak. According to the values of other literature, Ni 2p3/2 binding energies are at 852.3 eV and 853.4 eV for metallic nickel (Ni–Ni) and Ni-silicide (Ni–Si), respectively [4.33]. However, it cannot be found that the above-mentioned peak signals are observed at the Ni 2p3/2 peak by XPS analysis.

Due to the strong electronegativity of nitrogen atom, it is reasonably assumed that the larger Ni 2p3/2 binding energy (~ 855 eV) of the nanocrystals can be assigned to Ni–Si–N ternary bond. This result is also supported by the XPS N 1s photoemission spectra, as shown in Fig. 4-10(b). By the fitting result of binding energy, it is found

397 eV corresponding to Si–N bond and Ni–N bond, respectively [4.34, 4.35].

For chemical characteristics of Si–N and Ni–N, the enthalpies (-ΔH) at room temperature, are 470 and 70~85 kJ mol^-1, respectively [4.31, 4.32]. Hence, because of the higher enthalpy of Si–N compared with Ni–N, the N radicals can interact with Si atom easier than Ni atom during the sputtering process. It could be considered that a nitridation reaction will induce self-assembled phenomenon of Ni-Si-N nanocrystal, as shown in Fig. 4-11. In the previous research, Ni atom can diffuse in the SiNx even at room temperature and formation of a Ni-Si-N ternary solid solution [4.36].

Therefore, the nanocrystals are simple and uniform to be formed at low temperature by sputtering a commixed target in the Ar/N2 environment due to different Gibbs free energy of chemical bond of Si-N than Ni-N.

The typical capacitance-voltage (C-V) hysteresis obtained with gate voltage from accumulation to inversion and in reverse is shown in Fig. 4-12. It is clearly observed that 1.5 V and 3.5 V memory windows can be obtained under ±10 V and ±12 V operation, respectively. The MOIOS structure with the Ni-Si-N nanocrystals embedded in SiNx matrix exhibits clear counterclockwise hysteresis by a flat band voltage shift (VFB), indicating the significant memory effect. We consider that the charges can be stored in both the Ni-Si-N nanocrystal and the SiNx traps. Moreover, the hysteresis loops follow the counterclockwise due to injection of electrons from the deep inversion layer and discharge of electrons from the deep accumulation layer of Si substrate. Hence, this memory window of Ni-Si-N nanocrystals embedded in SiNx

matrix is enough to be defined “1” and “0” states. In addition, current density-voltage (J-V) characteristics in the inset of Fig. 4-12 shows the current density of the MOIOS structure by gate voltage sweeping from 0 V to 10 V and 0 V to -10 V. It is evident that the high quality of blockingoxide can avoid the stored carriers of charge trapping layer to leak into gate electrode.

Retention characteristics of the memory structure with Ni-Si-N nanocrystals are illustrated in Fig. 4-13. The retention measurements are performed at room temperature by operating a ±10 V gate voltage stress for 5 s. The VFB is obtained by comparing the C-V curves from a charged state and a quasi-neutral state. When carriers are stored in the nanocrystals, the stored charges will raise the nanocrystal potential energy and increase the probability of escaping from the nanocrystal to the silicon substrate [4.37]. Moreover, carriers trapped in the shallow traps are unstable and can easily leak back to the silicon substrate. It is found that the window of VFB

significantly reduces during the first 1000 s, and then becomes more stable for long retention time. This result is consistent with partial carriers trapping in the shallow trap state of the SiNx matrix around the nanocrystals. However, we use an extrapolation to give a long-term predictable result (dotted line) after 1000s (stable region of retention) and extrapolate a memory window of 1.8V (total charge hold ratio 57%) after ten years. The majority carriers stored in the deep trapping states of Ni-Si-N nanocrystals surrounding with SiNx matrix exhibit good retention characteristics.

Endurance characteristics for Ni-Si-N nanocrystals embedded in SiNx matrix is shown in Fig. 4-14. Pulses (VG - VFB = ± 5 V, 0.1 ms) were applied to evaluate endurance characteristics for the P/E operations. An obvious difference of two logical states can be maintained until 10⁴ P/E cycles. Subsequently, the closure of window between two logical states appears after 10⁴ P/E cycles. We consider that this closure was caused by the degradation of SiNx dielectric. However, this memory structure exhibits better endurance characteristics than Ni-O-Si nanocrystals nonvolatile memory. It retained a memory window of 1.0 V after 10⁶ P/E cycles which was enough to define “1” and “0” of memory state.

4.2.3.2 Comparison of Electrical Characteristics between Ni-O-Si and Ni-Si-N Nanocrystals Nonvolatile Memory

The comparisons of memory window and nanocrystal density for the Ni-O-Si and Ni-Si-N Nanocrystals nonvolatile memory devices are listed in Table 4-1. The estimated density of Ni-O-Si nanocrystal by TEM analysis is close to that of Ni-Si-N nanocrystal. To compare with Ni-O-Si nanocrystal embedded in SiOx, Ni-Si-N nanocrystal embedded in SiNx as charge trapping layer exhibits lager memory window under ±10V operation. Additional accessible charge trap states in SiNx matrix cause the much larger memory effect [4.30]. From an electrostatics consideration, SiNx

matrix with a higher dielectric constant than SiOx will cause a smaller voltage drop across the charge trapping layer and a greater voltage drop across the tunnel oxide.

This effect will result in increasing of the electric field across the tunnel oxide, and stored charges can tunnel more efficiently from substrate into the trapping layer under the same gate operation voltage.

The current density-voltage (J-V) characteristics of different MOIOS structure by gate voltage sweeping from 0 V to 10 V and 0 V to -10 V are shown in Fig. 4-15.

In this experiment result, it is found that the leakage current of the memory structures containing Ni-O-Si or Ni-Si-N nanocrystals is significantly reduced as compared to that of control sample. This result can verify our proposed in-situ internal oxidation (nitridation) for the dielectric layer of charge trapping layer and be also explained that the coulomb blockade effect was caused by the stored charges trapped in the nanocrystals and its surrounding dielectric. The trapped charges would raise the nanocrystal potential energy and reduce the electric field across the tunnel oxide, resulting in reduction of the tunneling current density.

Table 4-2 lists the retention characteristics after 10ys for the Ni-O-Si and Ni-Si-N nanocrystal nonvolatile memory. The Ni-Si-N nanocrystal embedded in SiNx

shows better retention characteristics, that is, a larger long-term extrapolated window of 1.8V (charge remained ratio of 57%) is maintained after 10ys. According to previous research [4.30], the charges can be shared among the nitride trap and hence the electric field across the tunneling oxide can be reduced by separated stored charges (reduction of Coulomb repulsive force). This result decreases the probability of charge escaping from the nanocrystal. Moreover, charges are likely to be relaxed to the nitride traps. Charge loss through the intermediate medium can also be inefficient due to Coulomb blockade effect. Therefore, carriers stored in nanocrystals embedded in nitride layer cannot easily leak back to the silicon substrate by our investigation.

4.2.4 Conclusion

The nonvolatile memory structure of Ni-Si-N nanocrystals embedded in the SiNx layer was fabricated by sputtering a commixed target (Ni0.3Si0.7) in an Ar/N2

environment at room temperature. It would be considered that the nitrogen played a critical role during the sputtering process for the formation of nanocrystal. The self-assembled phenomenon of Ni-Si-N nanocrystals was explained that the released energy will induce Ni atoms to diffuse in the SiNx during the fabrication process. The high density (~10¹²) nanocrystal was also simple and uniform to be fabricated on the tunnel oxide in this study. The memory window of Ni-Si-N nanocrystals enough to define “1” and “0” states is clearly observed for the nonvolatile memory application.

The retention and endurance characteristic are good enough to be maintained after 10 years and 10⁶ P/E cycles. A larger memory window of 1.5 V was observed after ±10V voltage sweep as compared with Ni-O-Si nanocrystals NVM. This improvement was attributed to the additional accessible charge trap states in the SiNx matrix. In addition, the charge trapping layer combined with Ni-Si-N nanocrystals and SiNx exhibited

Figure 4-8 Schematic sketches of the experimental procedures. Nitrogen incorporated Ni0.3Si0.7 layer as charge trapping layer was fabricated the nanocrystal nonvolatile memory.

Figure 4-9 Cross-sectional TEM image of the MOIOS structure with nanocrystals during our proposed fabrication. The inset was a schematic sketch of MOIOS.

Figure 4-10 (a) Ni 2p XPS analysis of the charge trapping layer. The Ni 2p3/2 peak can be assigned to Ni-Si-N ternary bond (~ 855 eV).

Figure 4-11 (b) N 1s XPS analysis of the charge trapping layer. Empty circles and straight line indicate experimental and fitting results, respectively.

Figure 4-12 Capacitance-voltage (C-V) hysteresis of the fabricated MOIOS structure with the Ni-Si-N nanocrystals embedded in SiNx matrix as a charge trapping layer.

The inset shows current density-voltage (J-V) characteristics.

Figure 4-13 Retention characteristics of the memory structure with Ni-Si-N nanocrystals embedded in SiNx matrix using a ±10 V gate voltage stress for 5 sec at room temperature. The dotted line is the extrapolated value of retention data after 1000 sec.

Program/Erase Cycles

10⁰ 10¹ 10² 10³ 10⁴ 10⁵ 10⁶ 10⁷

Flat band Voltage ( V )

-8.5 -8.0 -7.5 -7.0 -6.5 -6.0

Program state

Erase state 1.0 V

Program/Erase Cycles

10⁰ 10¹ 10² 10³ 10⁴ 10⁵ 10⁶ 10⁷

Flat band Voltage ( V )

-8.5 -8.0 -7.5 -7.0 -6.5 -6.0

Program state

Erase state 1.0 V

Figure 4-14 Endurance characteristics of the Ni-Si-N nanocrystal nonvolatile memory.

The memory window is about 1.0 V after one million P/E cycles operation.

Gate Voltage ( V )

-10 -8 -6 -4 -2 0 2 4 6 8 10

J ( A / cm

)

10^-11 10^-10 10^-9 10^-8 10^-7 10^-6 10^-5

10^-4 Control sample

Ni-O-Si nanocrystals Ni-Si-N nanocrystals

Figure 4-15 Current density-voltage (J-V) characteristics of the MOIOS nonvolatile memory structures with the control sample, Ni-O-Si nanocrystals and Ni-Si-N nanocrystals.

Table 4-1 Comparisons of memory window and nanocrystal density for the Ni-O-Si and Ni-Si-N nanocrystals nonvolatile memory devices.

Nonvolatile Memory

Memory window

under ±10V operation NC density (cm^-2 ) Ni-O-Si Nanocrystals

embedded in SiO_x

0.8V 1.33×10

Ni-Si-N Nanocrystals embedded in SiNx

1.5V 1.08×10

Table 4-2 Comparisons of retention for the Ni-O-Si and Ni-Si-N nanocrystals nonvolatile memory devices.

Nonvolatile Memory Memory window after 10 years

Remained Charge Ratio Ni-O-Si Nanocrystals

embedded in SiOx

1.2V 40%

Ni-Si-N Nanocrystals

embedded in SiN_x

1.8V 57%

4.3 Enhancement of charge storage Performance of Ni-Si-N Nanocrystals