• 沒有找到結果。

Chapter 5 Conclusions and Future Works

5.2 Future Works

The proposed ZTSCR is for PA with output voltage swing higher than 2 × VDD. However, it may not be suitable for class-E PA. Since the output voltage swing of a class-E PA would higher than 3.6 × VDD, the trigger voltage of the proposed ZTSCR is too low to avoid being mistriggered. Unfortunately, boosting the trigger voltage of SCR will decrease its ESD level.

In order to apply the ZTSCR to class-E PA, the ZTSCR still needs some modification.

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173-183, Jan. 1999.

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[4] S. Hyvonen, S. Joshi, and E. Rosenbaum, “Comprehensive ESD protection for RF inputs,” in Proc. EOS/ESD Symp., 2003, pp. 188-194.

[5] B. Huang, C. Wang, C. Chen, M. Lei, P. Huang, K. Lin, and H. Wang, “Design and analysis for a 60-GHz low-noise amplifier with RF ESD protection,” IEEE Trans.

Microwave Theory and Techniques, vol. 57, no. 2, pp. 298-305, Feb. 2009.

[6] M.-D. Ker, C.-I. Chou, and C.-M. Lee, “A novel LC-tank ESD protection design for gigahertz RF circuits,” in Radio Frequency Integr. Circuits Symp. Dig., 2003, pp.

115-118.

[7] D. Linten, S. Thijs, M. Natarajan, P. Wambacq, W. Jeamsaksiri, J. Ramos, A. Mercha, S.

Jenei, S. Donnay, and S. Decoutere, “A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS,” IEEE J. Solid-State Circuits, vol. 40, no. 7, pp.

1434-1442, Jul. 2005.

[8] M.-D. Ker and K.-C. Hsu, “Overview of on-chip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits,” IEEE Trans. Device Mater. Reliab., vol. 5, no. 2, pp. 235-249, Jun. 2005.

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[13] W. Soldner, M. Streibl, U. Hodel, M. Tiebout, H. Gossner, D. Schmitt-Landsiedel, J.

Chun, C. Ito, and R. Dutton, “RF ESD protection strategies-Codesign vs. low-C protection,” Microelectron. Reliab., vol. 47, no. 7, pp. 1008-1015, Jul. 2007.

[14] S. Voldman, ESD: RF Technology and Circuits. Hoboken, NJ: Wiley, 2006.

[15] B.-S. Huang and M.-D. Ker, “New matching methodology of low-noise amplifier with

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ESD protection,” in Proc. IEEE Int. Symp. Circuits Syst., 2006, pp. 4891-4894.

[16] M.-D. Ker and B.-J. Kuo, “Decreasing-size distributed ESD protection scheme for broadband RF circuits,” IEEE Trans. Microwave Theory and Techniques, vol. 53, no. 2, pp. 582-589, Feb. 2005.

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Vita

姓 名:蔡 翔 宇 學 歷:

台北市立建國高級中學 (91 年 9 月~94 年 6 月) 國立交通大學電子工程學系 (94 年 9 月~99 年 6 月) 國立交通大學電子研究所碩士班 (99 年 9 月~101 年 9 月)

研究所修習課程:

類比積體電路 吳介琮 教授

數位積體電路 周世傑 教授

積體電路之靜電放電防護設計特論 柯明道 教授

類比濾波器設計 陳巍仁 教授

半導體物理及元件(一) 汪大暉 教授

射頻積體電路 郭建男 教授

數位通訊 林大衛 教授

奈米電子元件 荊鳳德 教授

永久地址:新北市板橋區國慶路 149 巷 10 號 3 樓 Email:kplus.ee94@nctu.edu.tw

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Publication

(A) Referred Journal Paper:

[1] C.-Y. Lin, L.-W. Chu, Shiang-Yu Tsai, and M.-D. Ker, “Design of compact ESD protection circuit for V-band RF applications in a 65-nm CMOS technology,” IEEE Trans. Device Mater. Reliab., vol. 12, no. 3, pp. 554-561, Sep. 2012.

[2] C.-Y. Lin, Shiang-Yu Tsai, L.-W. Chu, and M.-D. Ker, “Large-swing-tolerant ESD protection circuit for giga-Hz power amplifier in a 65-nm CMOS process,” submitted to IEEE Trans. Microwave Theory and Techniques.

Tseng, M.-H. Tsai, T.-L. Hsu, P.-F. Hung, and T.-H. Chang, “Compact and low-loss ESD protection design for V-band RF applications in a 65-nm CMOS technology,” in Proc.

IEEE International Symposium on Circuits and Systems, 2012, pp. 2127-2130.

[3] L.-W. Chu, C.-Y. Lin, Shiang-Yu Tsai, M.-D. Ker, M.-H. Song, C.-P. Jou, T.-H. Lu, J.-C.

Tseng, M.-H. Tsai, T.-L. Hsu, P.-F. Hung, T.-H. Chang, and Y.-L. Wei, “Design of ESD protection cell for dual-band RF applications in a 65-nm CMOS process,” in Proc.

Electrical Overstress / Electrostatic Discharge Symposium, 2012, in press.

[4] Shiang-Yu Tsai, C.-Y. Lin, L.-W. Chu, and Ming-Dou Ker, “Design of ESD protection for RF CMOS power amplifier with inductor in matching network,” submitted to IEEE Asia Pacific Conference on Circuits and Systems, 2012.

(C) Local Conference Paper:

[1] 竹立煒、林群祐、蔡翔宇、柯明道、盧澤華、許村來、洪彬舫、宋明相、曾仁洲、

張子恒、蔡銘憲, “以改良式電感電容共振腔實現之60-GHz射頻靜電放電防護電路,”

in Proc. Taiwan ESD and Reliability Conference, 2011, pp. 50-53.

(D) Patent:

[1] L.-W. Chu, C.-Y. Lin, Shiang-Yu Tsai, M.-D. Ker, M.-H. Tsai, T.-L. Hsu, C.-P. Jou,

“ESD protection design for high-speed interfaces,” U.S. and R.O.C. patent pending.

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