SCR with Different Lengths of Anode to Cathode

Fig. 4.1 shows the cross-sectional views of the single SCR devices under different positions of NBL implantation. In Fig. 4.1 (a), the parameters DC,NPN and D_C,PNP represent the collector length of NPN transistor where measured form the HVNW/PBODY junction to the P+ diffusion in the anode and the collector length of PNP transistor where measured form the HVNW/PBODY junction to the N+ diffusion in the cathode, respectively. In fact, the DC, NPN also represents the base width of PNP transistor. Similarly, the D_{C, PNP} also represents the base width of NPN transistor.

In this proposed SCR devices with different lengths of anode to cathode (DAC), the widths of all SCR devices are 100µm. The SCR devices with different positions of NBL implantation and different DAC where DC, PNP are kept 1.3µm are investigated and verified in the TLP and DC measurement results.

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Figure 4.1 The cross-sectional views of single SCR devices (a) without NBL and (b) with NBL under cathode and (c) with NBL under anode and cathode and (d) with NBL under anode.

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Figure 4.2 The (a) TLP-measured I-V characteristics of SCR with different D_AC and (b) the comparisons of holding and trigger voltages under different DAC under the absence of NBL implantation.

Fig. 4.2 shows the TLP-measured I-V characteristics and the comparisons of holding and trigger voltages of SCR with different DAC under the absence of NBL implantation. In Fig. 4.1 (a), the D_AC is the sum of D_C,NPN and D_C,PNP. Actually, the parameter DC,NPN is adjusted while increasing the DAC. From the results, the TLP-measured trigger and holding voltages can be increased by enlarging the parasitic collector resistance of NPN transistor. And no severe degradation on It2 current is observed. In fact, the I_t2 current are all measured to over 6V.

Figs. 4.3 (a) and (b) show the TLP-measured I-V characteristics of SCR devices with different positions of NBL while D_AC are 5µm and 20µm, respectively. In Fig. 4.3 (a), the TLP-measured trigger and holding voltages are roughly the same while DAC are 5µm. In other words, inserting the NBL implantation at different positions has less impact on the SCR devices while DAC are 5µm. On the contrary, in Fig. 4.3 (b), the TLP-measured trigger and holding voltages are significantly changed while D_AC are 20µm. From the results, the SCR with NBL under anode has the highest TLP-measured trigger and holding voltages, which are 42.11V and 18.38V, respectively. Besides, in Fig. 4.3 (b), no severe It2 degradation is observed even at the high holding voltages measured by TLP.

Figure 4.4 shows the comparisons of the holding and trigger voltages and the HBM level and MM level among the single SCR devices under different positions of NBL implantation while DAC are 20µm. The TLP-measured trigger voltages of SCR devices with NBL under cathode and under anode and cathode are reduced due to the earlier turn-on of the parasitic vertical NPN transistors. And the ESD robustness of all the SCR devices are measured to over 2kV (HBM) and 200V (MM) while D_AC are 20µm.

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Figure 4.3 The (a) TLP-measured I-V characteristics of the single SCR devices with different NBL positions while DAC are 5µm and (b) SCR devices with different NBL positions while D_AC are 20µm.

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Figure 4.4 Comparisons of the holding and trigger voltages and (b) the HBM level and MM level among the single SCR devices under different positions of NBL implantation while D_AC are 20µm.

In this work, the SCR with NBL under anode while D_AC is 20µm has the highest TLP-measured holding voltage. There are two perspectives to explain the phenomenon. One is the ignition of the parasitic vertical SCR device and the other way is the migration of the avalanche region.

The parasitic conduction path of the vertical SCR can be developed when applying the NBL implantation. When applying the NBL, the lateral and vertical current paths can be formed within the SCR device. However, it can not ensure the turn-on of the vertical SCR even though the NBL has been implanted. In this work, enlarging the D_AC can promote the turn-on of the vertical SCR device and leads to the higher holding voltage in the TLP measurement result. As a result, both lateral and vertical bipolars are in competition with each other. The vertical or lateral conduction path within the SCR can be selected by an appropriate design. To accomplish a higher holding voltage, the vertical bipolar should be triggered on to take the current.

The other explanation is the migration of the avalanche region, as shown in Fig.

4.5. In Figs. 4.5 (a) and (b), the avalanche regions of the SCR without NBL and SCR with NBL under cathode occur at the highly-doped junction in the anode, which leads to a higher avalanche multiplication factor (M). In fact, the holding voltage of SCR with NBL under cathode is slightly higher than that of SCR without NBL due to the current-dividing through the vertical SCR device. But, it is still restricted to greatly increase the holding voltage for both structures. In Fig. 4.5 (C), the avalanche region of the SCR with NBL under anode and cathode occurs at the NBL/HVNW junction. A new avalanche generated current source is shifted towards the NBL/HVNW junction due to Kirk effect. Because the concentration of NBL is lower than that of N+

diffusion in the anode, the avalanche multiplication factor reduces. Hence, the holding voltage is further increased for the SCR with NBL under anode and cathode. In Fig.

4.5 (d), the avalanche generated current source still locate at the NBL/HVNW

junction. However, the length of NBL reduces, which causes the much lower avalanche multiplication factor than that in Fig. 4.5 (c). Therefore, such a lower avalanche multiplication factor within the SCR with NBL under anode has the highest holding voltage in the TLP measurement results.

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Figure 4.5 Migrations of avalanche region in SCR (a) without NBL and (b) with NBL under cathode and (c) with NBL under anode and cathode and (d) with NBL under anode while D_AC are 20µm.

As discussed above, the SCR with NBL under anode has the highest holding voltage in the TLP measurement results. However, in Fig. 4.6, the DC-measured holding voltage greatly decreased to 2.4V due to the joule heating effect. From the results, the DC-measured holding current can be increased from 15mA to 98mA when applying the NBL implantation under the anode.

Table 4.1 The measurement results of SCR with different positions of NBL implantation while DAC are 20µm.

Table 4.1 shows the measurement results of SCR with different positions of NBL implantation while DAC are 20µm. The ESD robustness can be measured to over 2kV

(HBM) and 200V (MM).

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Figure 4.6 The DC-measured I-V characteristics of the single SCR devices (a) without NBL and (b) with NBL under anode while D_AC are 20µm.