Design and Implementation of a High Efficiency
Digitally Controlled DC-DC Boost Converter
Wan-Rone Liou
National Taipei University, Taiwan, ROC
Email: wrliou@mail.ntpu.edu.tw
Walton B. Lacorte, Chi-Yu Liou National Taipei University, Taiwan, ROC
Email: waltonlacorte@hotmail.com, aniki1023@hotmail.cow
Abstract―A digitally controlled dc-dc boost converter
operating in CCM mode is implemented and presented in this thesis. The digital controller of the converter system is realized with an 8-bit (G6053) microcontroller configured as digital compensator to perform compensation on the voltage control loop of the system. The minimum resolu-tion requirement for A/D conversion is discussed to meet the condition of tight output voltage regulation. Also, the analog module feature of G6053 microcontroller is confi-gured to produce PWM signal instead DPWM. It is ob-served that the digitally controlled converter system achieves the main objectives of power conversion – regu-lation and high efficiency. The prototype converter has 91% efficiency with a 200mV ripple voltage performance. Additionally, the converter system operates in a wider input voltage range of operation.
Index Terms―digitally controlled, boost converter, 8-bit
microcontroller
I. INTRODUCTION
IGITAL control of switching dc-dc power supply provides a better solution than the analog control as the cost of most digital circuits has been reduced significantly recently. Compared with analog circuit control, digital controllers pro-vide a quite number of advantages, including flex-ibility, less susceptible to environmental noise, fewer passive components, portability and pro-grammability. Fig.1 shows a diagram of a typical digitally controlled switching dc-dc converter. It consists of ADC (Analog-to-Digital converter), processing unit, and a digital pulse width modula-tion (DPWM). The processing unit acts as a regu-lator of the controller that implements control law. In this architecture fast implementation of a dis-crete-time control law is necessary in order to achieve dynamic characteristics comparable with analog PWM controllers. VIN Switching Converter L O A D VOUT(t) A/D + - Regulator (Processing Unit) Digital Pulse Width Modulator VREF[n] VOUT[n] d(t) d[t] e[n]
Fig.1. Typical block diagram of a digitally con-trolled switching converter
II. THE PROPOSED ARCHITECTURE
Fig.2 shows the diagram of the digitally con-trolled voltage mode dc-dc boost converter proto-type operating in CCM.
Fig.2. Digital controlled dc-dc switching boost converter prototype
The prototype utilized an 8-bit microcontroller (G6053) from INNO-TECH CO., as its digital con-troller. The purpose of power feedback system is regulating the output voltage to match a precise, stable voltage reference over a range of input vol-tage and load current. From Fig.2, we can see that a digital controlled converter contains three major components/modules that are totally not available in most analog controlled converter, which compo-nents are ADC, Digital PID and PCA/PWM. In the voltage mode boost converter, the output voltage is sampled by an analog-to-digital converter and
D
compared to the reference then produced digital error signal e[n]. The error signal is passed to the digital compensator which is to take the e[n] and previous e[n-1] samples of the error signal and compute the new value of d[n]. The output of digi-tal PID is the input to the programmable counter array (PCA) configured as PWM generator, which in turn produces the duty ratio signal to control the switching power transistors. The operation iterates until the output voltage is approaching to the refer-ence voltage.
A. ADC (analog-to-digital converter)
In the case of dc-dc regulated power supply, its main function is to quantize the regulated signal (feedback) into a digital word. The process of ana-log-to-digital conversion often involves two im-portant actions which are extremely essential to system performance and control design. The ADC module of G6053 microcontroller utilized succes-sive approximation ADC type architecture which is using binary search algorithm continues to repeat the searching process until all N bits are determined. Literature [2] employ digital controller (MCU) with successive approximation A/D converter architec-ture for its ADC operation. Generally, the binary search algorithm divides the search space in two each clock cycle, and the desired data can be sought in N steps for a set of sorted data of size 2N. Thus, the implementation of successive approxima-tion ADC requires N clock cycles to complete an N-bit conversion.
Fig.3 Flow graph for SAR approach
Fig.3 shows the flow graph of successive ap-proximation approach pattern from binary search algorithm. To ensure the ADC maintains the accu-racy of the output signal the ADC clock source is configured to generate 77 kHz as its operating sampling frequency. For this sampling frequency the conversion time of the on-chip ADC is fixed at 13μs.
The ADC module takes as its input signal a por-tion of the output voltage through a feedback net-work, which is composed of two resistors con-nected in series. Literature [3], clearly pointed out that equation (1), with a given ΔVO the minimum
requirement of ADC is 10-bit, which is exactly the featured resolution of G6053 microcontroller.
(1)
As a result, for a voltage level set to the maxi-mum voltage requirement of the ADC and with a 10-bit resolution or 1024 discrete levels, the ADC can generate a base resolution of 3.3/1024 or 3.2mV between levels. However, for this prototype the on-chip ADC module takes half of the mini-mum voltage requirement as its input voltage, which is then compared to a numerical voltage ref-erence to produce an error signal. For the given reference voltage, which corresponds to 1.65V, the voltage divider network produces an output voltage resolution of 48/1024 or 46.8mV between levels.
B. Digital PID Controller
The difference between the feedback signal and numerical voltage reference serves as the control-ling signal for driving the duty cycle of the conver-ter. The duty cycle was then calculated using a dis-crete proportional-integral-derivative (PID) con-troller. Fig.4 illustrates the typical PID structure of a digital compensator.
Fig.4 Diagram of digital PID compensator ∆ ⋅ = O O REF MAX d a V V V V n a /d 2 / int log
The continuous time transfer function of a PID controller is given as:
(2)
The transfer function in equation (2) is converted to a difference equation for digital implementation using bilinear or backward transformation method. Once it has been converted to difference equation it is now suitable for computation by a computer. The difference equation of equation (3) can take the form of:
(3)
Equation (3) can be further written as:
(4)
However, due to the presence of set-point in the derivative term, which will cause an unwanted change in duty cycle due to disturbances, equation (4) is modified to:
(5)
Now here, KP, KI, and KD are digital proportional
gain, digital integral gain and digital derivative gain, respectively. The variable d(k) is the computed duty cycle for the kth sample of the output voltage. The variable T is the sampling period and e(k) is the er-ror signal between the measured output voltage (process value) and the desired output value (set point value). Furthermore, the gain constants of each term of the PID controller are properly chosen to ensure the prevention of the output voltage from oscillation and guarantee the optimal control of the system (system’s stability). Finally, for this proto-type KP = 1/16, KI = 1/32 and KD = 1/64 are
se-lected.
C. PWM Using Programmable Counter Array
Most systems relating to power converter utilize pulse width modulation technique in regulating the output voltage. As for digital controlled power converters the technique of digital pulse width modulation is the most widely implemented me-thod in realizing voltage regulation. The imple-mentation of DPWM in generating discrete duty cycles is never opted and realized due to complexi-ties in handling quantization effects as well as fre-quency limitations of the G6053 microcontroller. Instead, it utilized the analog module in the micro-controller which is the programmable counter array (PCA) configured as PWM generator. The PWM signal of the microcontroller is 8-bit resolution. Fig.5 shows the internal architecture of the PCA register using module 1 (n = 1) of the G6053 mi-crocontroller.
Fig.5 Use of PCA to produce PWM output
The PCA register is configured into PWM mode by setting ECOM1 and PWM1 to logical bit 1. The ECOM1 and PWM1 registers are located in CCAPM1 special function register or SFR. Fig.6 shows the comparison between the low byte CL of the PCA Timer/Counter and the low byte CCAP1L. The high byte is utilized to automatically reload the CCAP1L every time it goes to zero. It goes to zero when CL has incremented up to its value. The CCAP1H register, on the other hand, serves as a marker fixing the on (e.g. 3.3V) off (0V) ratio of the PWM signal. Since the PWM is 8-bit, cycle time of the PWM is 256 PCA time clock cycles. In addition, the 8-bit PWM controls the output voltage to a resolution of 0.390 percent (%) or written as:
(6) In one PWM cycle CL increases from zero up
s
K
s
K
K
s
G
I D P C(
)
=
+
+
[
]
∑
+ − − + = j DA IA PA e k e k T K j e T K k e K k d( ) ( ) ( ) ( ) ( 1)[
]
∑
+ − − + = j D I Pe k K e j K e k e k K k d( ) ( ) ( ) ( ) ( 1)[
]
∑
+ − − + = j D I Pe k K e j K PV k PV k K k d( ) ( ) ( ) ( ) ( 1) bits of number N solutionPWM = N ×100% = 2 1 Re
towards the value of CCAP1L, which is automati-cally loaded from CCAP1H. During this period, when CL < CCAP1L, the PWM output is logic 0 (0V). When CL = CCAP1L it momentarily goes to zero but is immediately reloaded from the contents of CCAP1H. During this time CL continues to in-crease for the period CL >= CCAP1L and the PWM output goes to logic 1 (3.3V). The effect of this operation is illustrated in Fig.6.
Fig.6 Effect on output logic level as CL increases from 0 to 255.
III. DESIGN EXAMPLE AND SIMULATION RESULT
To demonstrate closed-loop operation, the con-troller is used with boost converter shown in Fig.7. Furthermore, using the state space averaging model, the small-signal transfer function from the duty cycle (D) of the switch to the boost converter out-put (Vo) can be derived below:
(7)
The allowable input voltage range for each oper-ating load condition is between 8V – 20Vdc. In Fig.2, the desired output voltage is 24Vdc and is desired to keep constant under all operating condi-tions and disturbances, such as input voltage and load variations. The operating switching frequency is equal to a software selectable value of 46 kHz. It is generated internally by an 8-bit microcontroller, which has a crystal-oscillator based clock frequen-cy of 12MHz. Further, the inductance and capacit-ance of this prototype were 1mH and 100uF, re-spectively. The 1mH inductance was chosen to be greater than the minimum required value to ensure the current is operating in continuous mode.
Fig.7 Model of closed-loop control system
By the employment of MATLAB for the fre-quency-domain simulation, Bode plot of the control to output transfer function is shown in Fig.8. From the result, the close-loop phase margin is 63.7 deg, which indicates the control loop is stable.
Fig.8 Bode plot of close-loop transfer function The loop behavior has been carried out with MATLAB/SIMULINK, base on the small-signal model and transfer functions. The model system simulation for the voltage mode controlled boost dc-dc converter operating at the switching fre-quency of 46kHz. The block diagram of the system and output signal versus time result of boost con-verter shown in Fig.9 and Fig.10.
Fig.9 Circuit simulation block diagram using MATLAB/SIMULINK
Fig.10 Simulation of Vout and IL versus time IV. EXPERIMENTAL RESULTS
The PCB layout of the digitally controlled dc-dc boost converter is shown in Fig.11. Here, two knobs are placed in front of the PCB for easier control of the system. The first knob on the left side serves as the tuning apparatus for the feedback re-sistor in order to get an appropriate voltage level for the ADC input of the microcontroller. Once the tuning of the desired output level is satisfied, it is then replace by a fixed resistor. The second knob on the right side serves as the load resistor selector.
Fig.11 PCB Layout of the prototype circuit
It can be observed from Fig.12 and Fig.13, the measurement result shows the vout=24.2V between line and load transient. The waveform show in the Fig.12 is categorized as follows: output voltage (top), pwm signal (middle) and inductor current (bottom). Under these conditions, the value of the output voltage is unaffected by the disturbances
occurred in the load. Moreover, the duty cycle of the pwm signal has displayed an almost constant width value all throughout the transition.
Fig.12 Converter system waveforms for load regu-lation at RL= 571Ω to RL= 115Ω transition
Fig.13 Transient response at 12V-13V transition
Fig.15 Efficiency of the digitally controlled dc-dc boost converter
V. SUMMARY
The design circuit of the system including G6053 microcontroller voltage is 3.3V, ADC is 10-bit, and allowable input voltage range for each operating load condition is between 8V – 20Vdc. The desired output voltage is 24Vdc and is desired to keep constant under all operating conditions. The operating switching frequency is 46 kHz. Fig.14 and Fig.15 shows the prototype converter has 91% efficiency with a 200mV ripple voltage perfor-mance.
VI. CONCLUSION
In this thesis, the practical design and imple-mentation of a simple digitally controlled dc-dc switching boost converter operating in continuous current mode (CCM) is presented. As for keeping the boost converter invulnerable to switching noise, the pulse width modulation technique (PWM) is being utilized due to its fixed frequency behavior. In realizing a better performance on the system, the boost converter prototype utilized an 8-bit micro-controller (G6053) from INNO-TECH CO., LTD as the digital controller compensator, which is confi-gured to provide sufficient compensational para-meters to the system. The implementation of the digital compensator is purely based on the concept of proportional-integral-derivative (PID) algorithm. As for the performance of this prototype, the G6053 microcontroller provides a one-chip solu-tion for a voltage mode control switching dc-dc converter.
ACKNOWLEDGMENT
The authors would like to thank INNNO-TECH CO., Ltd, for its sponsorship of the research project.
REFERENCE
[1] B. J. Patella, A. Prodic, A. Zirger, and D. Maksimovic, “High-Frequency Digital Controller IC for DC-DC Converters”, IEEE Transactions on Power Electronics, vol. 18, no. 1, pp. 438-446, January 2003.
[2] R. R. Boudreaux, R. M. Nelms and J. Y. Hung, “Simula-tion and Modeling of a DC-DC Converter Controlled by an 8-bit Microcontroller”, Applied Power Electronics
Conference and Exposition, 1997, vol. 2, pp. 963-969,
February 1997.
[3] Z. Zhao and A. Prodic, “Continuous-Time Digital Con-troller for High-Frequency DC-DC Converters”, IEEE
Transactions on Power Electronics, vol. 23, no. 2, pp.
564-573, March 2008.
[4] A. Prodic, D. Maksimovic, and R.W Erickson, “Design and Implementation of a Digital PWM Controller for High-Frequency Switching DC-DC Power Converter”,
IEEE IECON’01, 2001, pp. 893-898.
[5] C. Kranz, “Complete Digital Control Method for PWM DC-DC Boost Converter”, 2003 IEEE Power
Electron-ics Conference, PESC’03, Acapulco, Mexico, June 2003.
[6] P. Mattavelli, “Digital Control of DC-DC Boost Con-verters with Inductor Current Estimation”, Applied
Power Electronics Conference and Exposition, 2004, vol.
1, pp. 74-80, 2004.
[7] J. Biela, U. Badstuebner, and J. W. Kolar, “Impact of Power Density Maximization on Efficiency of DC-DC Converter Systems,” IEEE Transactions on Power
Elec-tronics, vol. 24, no. 1, pp. 288-300, January 2009.
[8] M. M. Islam, D. R. Allee, S. Konasani and A. A. Rodri-guez, “A Low-Cost Digital Controller for a Switching DC Converter with Improved Voltage Regulation”, IEEE
Power Electronics Letters, vol. 2, no. 4, pp. 121-124,
December 2004.
[9] S. Chattopadhyay and S. Das, “A Digital Current Mode Control Technique for DC-DC Converters”, IEEE
Transactions on Power Electronics, vol. 21, no. 6, pp.
1718-1726, 2006
[10] D. M. Van de Sype, K. De Gusseme, A. R. Van den Bossche and J. A. Melkeebeek, “Small-Signal Z-Domain Analysis of Digitally Controlled Converters”, 2004
Power Electronics Specialists Conference, PESC ’04,
vol. 6, pp. 4299-4305. June 2004.
[11] A. Prodic and D. Maksimovic, “Design of a Digital PID Regulator Based on Look-Up Tables for Control of High-Frequency DC-DC Converters”, Computers in
Power Electronics, 2002. Proceedings on 2002 IEEE Workshop, pp. 18-22, June 2002.
[12] R. W. Erickson and D. Maksimovic, Fundamentals of
Publishers, 2001.
[13] K. K. Sum, Switch Mode Power Conversion – Basic
Theory and Design, New York: Marcel Dekker, 1984.
[14] R. Shaffer, Fundamentals of Power Electronics with
MATLAB, Boston: Charles River Media, 2007.
Wan-Rone Liou received the B.S. and M.S. degrees in
electric-al engineering from Nationelectric-al Cheng-Kung University, Tainan, Tai-wan, R.O.C., in 1984 and 1986, respectively, and the Ph.D. degree in electrical engineering from the Ohio State University, Columbus, in 1993.
From 1994 to 2006, he was an Associate Professor in the Depart-ment of Electrical Engineering, National Taiwan Ocean University, Keelung. In 2006, he joined the Graduate Institute of Electrical En-gineering, National Taipei University, Taipei, Taiwan. He is a con-sultant for several IC design houses in Taiwan. His current research interests include high-efficiency power management integrated cir-cuits, low-EMI pulse-width modulation integrated circir-cuits, RF pow-er amplifipow-ers for wireless communication applications, and A/D converters design.
Dr. Liou received the Research Award three times from the Na-tional Science Council, Taiwan.
Walton B. Lacort was born in Cebu City, Cebu, Republic of Philippines in 1978. He received the M.S. degree in electrics and communications engineering from University of San Jose Recoletos,
Philippines, in 2000.
He is presently an IC Design Engineer with INNO-TECH Corpo-ration, Taipei, Taiwan.
Chi-Yu Liou was born in Taipei, Taiwan, R.O.C., in 1985.
He received the M.S. degree in electrical engineering from Ming-Chi University of technology, Taipei, Taiwan.
