高介電常數金屬-絕緣層-金屬電容電性及其可靠度之研究

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(1)國立交通大學電子工程學系電子研究所碩士論文高介電常數金屬-絕緣層-金屬電容電性及其可靠度之研究. The Research of Electric Characteristics and Reliability of High-κ MIM Capacitors. 研究生：陳冠麟指導教授：荊鳳德教授. 中華民國九十六年六月.

(2) 高介電常數金屬-絕緣層-金屬電容電性及其可靠度之研究 The Research of Electric Characteristics and Reliability of High-κ MIM Capacitors 研究生：陳冠麟. Student：Guan Lin Chen. 指導教授：荊鳳德. Advisor：Dr. Albert Chin. 國立交通大學電子工程學系電子研究所碩士論文. A Thesis Submitted to Department of Electronics Engineering & Institute of Electronics College of Electrical and Computer Engineering National Chiao Tung University in Partial Fulfillment of the Requirements for the Degree of Master In Electronics Engineering June 2007 Hsinchu, Taiwan, Republic of China. 中華民國九十六年六月.

(3) 高介電常數金屬-絕緣層-金屬電容電性及其可靠度之研究. 研究生：陳冠麟. 指導教授：荊鳳德教授國立交通大學電子工程學系電子研究所碩士班. 摘要. 在射頻積體電路中，其阻抗匹配電路、濾波器和類比頻率調節電路都會用到金氧金電容。而對於動態隨機存取記憶體來說，金氧金電容是為了用於儲存電荷，並且會影響到記憶體的一些參數，像是工作電壓、元件速度和資料保留的時間。然而不管是射頻積體電路還是動態隨機存取記憶體的電容，都會占掉大量的晶片面積。所以為了減少晶片面積和成本，我們必須縮小金氧金電容的尺寸。在這次研究中，我們作出以高介電常數鈦鉭氧化物為介質層的金氧金電容。從元件的量測結果中，我們得到非常高的電容密度值為 23 fF/um2、從十萬赫茲（100K Hz）到一百億赫茲（10G Hz）只 1.8 %的電容損耗。同時在十億赫茲頻率下（1G Hz），從量測的散射參數計算出低於 550ppm 的電壓相關電容值。由上述數據可知，此金氧金電容可適用於工作在射頻頻率的高精密積體電路上。同時，我們也研究了此電容在固定偏壓一段時間後的電容值、漏電流以及電壓相關的電容值。. i.

(4) The Research of Electric Characteristics and Reliability of High-κ MIM Capacitors Student: Guan Lin Chen. Advisor: Dr. Albert Chin. Department of Electronics Engineering & Institute of Electronics National Chiao Tung University. Abstract In RF integrated circuits, MIM capacitors are used for impedance matching, filter and analog frequency tuning circuits. For DRAM, MIM capacitors are used to storage charges; they will influence some parameters of the memory, such as work voltage, device speed, and the data retention time. However, the capacitor area of above all usually consumes a large portion of the whole chip size. In order to reduce chip size and cost, we must continue scaling down the size of MIM capacitors. In this study, we have fabricated MIM capacitors using high-κ TiTaO dielectrics. From the measurement of devices, a very high capacitance density of 23 fF/µm2 is obtained, with small capacitance reduction of 1.8 % from 100 KHz to 10G Hz. And Small voltage dependence of capacitance < 550 ppm, mathematical derived from S-parameters, is obtained at 1G Hz, which ensures this MIM capacitor useful for high precision circuits operated at RF regime. We also have investigated the characteristic of capacitance, leakage, and ∆C/C0 before and after constant-voltage stress.. ii.

(5) 誌. 謝. 首先，要感謝的是我的指導老師荊鳳德教授，在這兩年的碩士研究生涯裡所給予熱心的指導和教誨，使得我不論在研究上或是待人處事上都有很大的收穫，在此衷心的表達感謝之意。再來，我要感謝鄭淳護學長以及江國誠學長，謝謝你們對我在實驗儀器上的訓練以及研究上所提供的意見和幫助，讓我得以順利的完成碩士學業。此外，軍宏學長、彬舫學長、建宏學長、存甫學長以及實驗室的學長姊們，感謝你們對我的教導和鼓勵。接下來我還要感謝的是實驗室的同學，俊全、懿範、偉倫、哲偉、俊賢、建弦。有了你們，才讓我的研究生活充滿了歡樂與色彩，使我有動力繼續研究下去，感謝大家的支持與鼓勵，謝謝你們。最後，我要對我的父母以及家人獻上最深的謝意與祝福，有了你們的栽培、支持與鼓勵，才讓我有今日的表現。. iii.

(6) Contents Abstract (in Chinese)……………..….…………….……….…………………………..i Abstract (in English) ……………..……..…………….……….………………………...ii Acknowledgement (in Chinese)…..……………….…….……….…………………...iii Contents………………………….…………………….……….…………………......……iv Figure Captions………………………………………….……….………….………….v Chapter 1 Introduction 1-1 Motivation to study high-κ materials………....………………...……………………....1 1-2 High-κ materials for MIM…………………….………....……………………………..3 1-2.1 High-κ MIM for RF analog application and DRAM……..………………………....3 1-2.2 Background of high-κ dielectrics……...………………………………………….…4 1-3 The deposition technologies of high-κ dielectrics……………………………………...8 1-4 Thesis………………………………………………………………………………….10 Chapter 2 The Experimental Steps and Measurement 2-1 MIM capacitors fabrication………….…………….…………………………..............13 2-2 The measurements of MIM capacitors………….…….……….……….……..................15 Chapter 3 Result & Discussion 3.1 Low frequency characteristics…………………………………………...…………….23 3.2 High frequency characteristics………...……………………………........…………….25 3.3 Reliability………………………..………………………….…………................27 Chapter 4 Conclusion……………………………………………………................43 References…………………………….…….……………………………………….......44 Vita……………..…..…………………………………..……………….……...................49. iv.

(7) Figure Captions Chapter 1 Introduction Fig. 1-1 The International Technology Roadmap of SIA for semiconductor 2006 Fig. 1-2 Static dielectric constants versus energy band-gap for candidate gate oxides. Chapter 2 The Experimental Steps and Measurements Fig. 2-1 Silicon substrate. Fig. 2-2 Silicon dioxide growth. Fig. 2-3 Photoresist deposition and lithography patterned. Fig. 2-4 Deposited TaN/Ta bottom electrode and lifted out the photoresist. Fig. 2-5 Deposited TEOS. Fig. 2-6 Lithography patterned and etched. Fig. 2-7 Deposited TiTaO followed with oxidation and annealing at 400oC and O2. Fig. 2-8 Lithography patterned, and etched. Fig. 2-9 Deposited Al top electrode. Fig. 2-10 Lithography patterned, etched and the complete device cross-section. Fig. 2-11 Top cell view of a RF MIM capacitor. Chapter 3 Result & Discussion Fig. 3-1 C-V and J-V characteristics of the TiTaO MIM capacitors measured from 10 kHz to 1 MHz. The data were measured by HP4156A and HP4284A precision LCR meter.. Fig. 3-2 The C-V characteristics of TiO2 and TiTaO MIM capacitors measured at different frequency. High capacitance density of 23 fF/µm2 of TiTaO MIM capacitors were measured at 1 MHz with small capacitance variation.. Fig. 3-3 The J-V characteristics of TiO2 and TiTaO capacitors. The leakage current is lower v.

(8) for the TiTaO capacitors.. Fig. 3-4 The characteristics of ∆C/C0 for the TiTaO MIM capacitors with dielectric thicknesses of 17nm and 29nm. The data were measured at 1 MHz.. Fig. 3-5 The polts of ∆C/C0 versus electric field (E) with different dielectric thickness. The reason for no matching together is that there are different gauge of trapped charges in the interface of the different thicknesses.. Fig. 3-6 The characteristics of the Normalized capacitance of the TiTaO MIM capacitors as an approximate linear function of temperature.. Fig. 3-7 The measured scattering parameters of TiTaO MIM capacitors from 50 MHZ to 10 GHz.. Fig. 3-8 The equivalent circuit model for capacitor extraction. The C and RP are the capacitance and its parallel resistance, and the LS and RS are the parasitic inductance and resistance from transmission lines connected between capacitor body and probing pads.. Fig. 3-9 Frequency dependent capacitance density, ∆C/C0, α and β for a TiTaO MIM capacitor.. Fig. 3-10 The ∆C/C0-V characteristics of a TiTaO MIM capacitor.. The data for. frequencies >1 MHz were obtained from the S-parameters.. Fig. 3-11 The J-V characteristics of Al/TiTaO/TaN capacitors, measured at 1 MHz. The inserted figure is the band diagram of Al/TiTaO/TaN MIM structure.. Fig. 3-12 The C-V characteristics of a TiTaO MIM capacitor were measured at 1 MHz before and after constant-voltage stress.. Fig. 3-13 The ∆C/C0-V characteristics of a TiTaO MIM capacitor were obtained from the formula (6).. Fig. 3-14 The characteristics of VCC-α versus stress time of a TiTaO MIM capacitor at different frequency. vi.

(9) Chapter 1 Introduction 1-1. Motivation to study high-κ materials Silicon oxide is the conventional dielectric material in semiconductor and is used. broadly, because it can be manufactured easily and has a great isolated performance. Since 1994, International Technology Roadmap for Semiconductors (ITRS) has made a roadmap for steady reduction in silicon device size, with an accompanying improvement in device performance, measured predominantly by circuit speed. However, in the scaling of CMOS devices, reducing the thickness of gate stack will cause two problems. One is that the tunneling effect will be occurred when the thickness of silicon dioxide is below a certain thickness. Therefore, the leakage current density of device will increase exponentially with the continuing scaling thickness of the gate dielectric film. The other is that the larger leakage current will cause that electrons can not be accumulated in the channel, and let the driving current of the device degrade. This problem will cause the circuit speed down. For maintaining high driving current of the CMOS devices without large leakage current, it can be achieved by applying the dielectric with high dielectric constant (high-κ). It can increase the physical thickness of the high-κ dielectric film of the device without the reduction of capacitance density. Since the leakage current is related greatly to the physical thickness, the increasing thickness of high-κ dielectric film can reduce the leakage current of the devices. Although there are several drawbacks about the high-κ dielectrics, such as smaller band gap, weaker bond, and higher defect density than SiO2, the high-κ dielectrics with the same effective oxide thickness (EOT) with SiO2 still shows lower leakage current than SiO2 by several orders [1-1][1-2]. That’s why high-κ dielectrics have drawn much attention for future technology. 1.

(10) According to the ITRS of SIA (Semiconductor Industry Association) as shown in Fig. 1-1[11-3], it shows that the thickness of gate oxide has to be below 10 Å after 2008. Besides, the bias voltage and gate length reduces by 11 % every year while the drive current has to be maintained. Therefore, it is necessary to continue to scale down the size of the gate dielectric in proceeding CMOS technology. However, at the generation of sub-100nm, the operation frequency of the device will be over GHz, and the performance of high-κ dielectrics over GHz is a key point for the use of high-speed devices. Even some high-κ dielectrics show good electrical characteristics at low frequency, the performance of those at RF regime could possibly degrade. Therefore, it is important to find out the high-κ materials that exhibit superior characteristics at both high and low frequency. Many material systems are currently under consideration as potential replacements for SiO2 as the gate dielectric for sub-100 nm COMS technology. A systematic consideration of the required properties of the high-κ gate dielectric indicates that the key guidelines are (a) permittivity, band-gap and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Especially, it becomes more and more important about the aspect of device reliability. Many dielectrics appear favorable in some of these fields, but very few materials are promising with respect to all of these guidelines. Recently, some high-κ dielectrics have been researched widely. The characteristics and issues of those materials have also been reported. The high-κ dielectrics which show good performances are always with some defaults. Finding out the most suitable high-κ dielectrics as the gate dielectrics of devices and altering the structures of devices or process to meet the requirements of the high-speed devices are significant tasks to the next VLSI generation.. 2.

(11) 1-2. High-κ materials for MIM. 1-2.1 High-κ MIM for RF analog application and DRAM To extend the scaling of the device size with less power consumption is the most significant application for high-κ materials. Once the scaling is stopped due to the unacceptable power consumption and bad device reliability, the operation frequency of the devices cannot have chances to be raised to higher value. Not only the bandwidth of communication cannot be broadened, but also the limits of operation speed of microprocessors appear. The gate dielectrics, no doubt, are the core of CMOS devices, which are the main devices of any integrated circuits. Therefore, to replace conventional oxide with high-κ dielectric is an inevitable and significant application in the next generation of VLSI technology. At the moment, the high-κ MIM (metal-insulator-metal) capacitors have attracted great attention in silicon IC applications because of their high conductive electrode and low parasitic capacitance. The RF MIM capacitors are extensively used for filter, coupler, network matching and mixed-signal IC. But the total capacitor area usually consumes a large portion of the whole chip size. The requirements for RF MIM capacitors include high capacitance density, less leakage current, low VCC and TCC, low parasitic effect, precision control of value at high frequency and good reliability [1-4]. However, in order to increase the capacitance density for reducing the area occupied by capacitors, utilizing thin dielectrics with high dielectric constant is a best method of all. Recently, some kinds of dielectrics and deposited approaches have been proposed to achieve the goal of high capacitance and the other good performance. For example, instead of SiO2 dielectric with Si3N4 deposited by plasma enhanced chemical vapor deposition (PECVD) has been studied in the past years [1-5] [1-6]. Although Si3N4 shows good linearity and reliability, the capacitance density still needs to be increased. However, 3.

(12) Si3N4 fabricated by PECVD has the minimum thickness limit and the defect density of nitride is high. Therefore, finding high-κ dielectrics with good linearity and quality is a front-burner issue to develop the innovative and useful RF capacitors [1-7]. There are also the same problems in DRAM. The basis of DRAM is one transistor and one MIM. A MIM capacitor of a memory cell is used to storage charges to analyze the signal which is 0 or 1 and it will influence some parameters of the memory, such as work voltage, device speed, and the data retention time. It is difficult to determine the data exactly when the scaling of the device is going on. Because the smaller area of a memory cell causes the smaller signal. If we want to maintain the charge in the capacitor, it is must to raise the value of capacitance density. For this issue, the best way is also to use high-κ materials as the dielectrics of MIM. The merits and demerits of various high-κ materials will be discussed in the next section.. 1-2.2 Background of high-κ dielectrics There are two methods to achieve higher capacitance density (ε0κ/tκ) for scaling down device size. One is to decrease the dielectric thickness (tκ) and the other is to use high-κ materials. The former way will rapidly increase the undesired leakage current, loss tangent, voltage dependence of capacitor (∆C/C0) and reliability. So, the latter one is the only method to make it without increasing leakage current. To achieve this goal, the high-κ dielectric in RF MIM capacitor is continuously changed from SiON (κ~4-7), Al2O3 (κ~10) to Ta2O5 (κ~25), TiO2 (κ~80) or HfO2 (κ~25), ZrO2 (κ~25) [1-8] [1-9]. Recently, HfO2 and ZrO2 have attracted much attention due to their thermal stability with poly silicon, TiN and TaN [1-10] [1-11]. In addition, they not only exhibit suitable dielectric constant (25~30) and high energy band gap (see Fig. 1-2) as the dielectrics of the devices, but also can be deposited on silicon without the use of the barrier layers [1-12]. 4.

(13) However, oxygen tends to diffuse though HfO2 and form oxide interlayer after high temperature process and it becomes difficult to achieve the effective oxide thickness below 10 Å. Furthermore, the boron penetration effect is occurred when a single HfO2 layer serves as gate dielectric of transistors, while ZrO2 reacts with poly silicon to form Zr silicide after post implant annealing. The above problems will cause low capacitor value and high leakage current. In addition, HfO2 and ZrO2 will crystallize at the temperature higher than 500oC. After source/drain activation, this property increases the leakage current and power dissipation of the CMOS devices. The methods to improve these characteristics of HfO2 and ZrO2 can be divided into three parts. First of all, dense and thin capping layer was formed on the top of HfO2 or ZrO2 by sputtering thin metal film (Hf, Zr) on the top of these dielectrics followed by rapid thermal annealing (RTA) at 600oC in N2 to oxidize the nitride layer. Not only boron penetration can be reduced effectively, but also the oxygen diffusion can be suppressed [1-10]. Secondly, to overcome the thermal unstable properties and to remain the amorphous phase for HfO2 and ZrO2 after high temperature process, doping some thermal stable material into high-κ dielectrics has been proposed and shows the promising results [1-13] [1-14]. Finally, the NH3-based interfacial layer can be effective in suppressing the diffusion of O2 and subsequent growth of interfacial oxide [1-15]. Among the high-κ dielectrics using simple metal oxide, Ta2O5 and TiO2 have the higher dielectric constants 25 and 80 respectively [1-16] [1-17]. In addition, Ta2O5 still exhibits other merits including the better capacitance linearity than that of SiO2, the lower process temperature. However, some other issues about Ta2O5 should be noticed. First of all, crystallization and interface state will cause from post implant rapid thermal annealing. Moreover, interface oxide layer between Ta2O5 and Si occurs after crystallization. Thus, effective oxide thickness increases while interface oxide layer occurs and capacitance density also decreases [1-18]. It has been reported that TiO2 has some better properties than other dielectrics in 5.

(14) addition to the higher dielectric constant value (~80). One of those is the good thermal stability when it was integrated with TiN electrode. It allows TiO2 to show good dielectric characteristics after high temperature process for silicide formation [1-17]. Besides, the heat conduction rate of TiO2 is higher than that of SiO2. The issue of heat dissipation should also be considered with the scaling of integrated circuits. Although TiO2 exhibits the above merits, there are still some other issues that should be considered and overcome such as the higher leakage current than that of other dielectrics with the same effective oxide thickness, lower breakdown voltage and interface oxide layer formation after RTA oxidation. According to the report, the thickness of the interfacial oxide layer can be reduced by using NH3 plasma treatment, but the flat-band voltage shift and the degradation of channel mobility still occurred [1-19]. Therefore, the main problem of the TiO2 is that its leakage current is too high to be used for dielectric. From detailed characterization, such large leakage current causes from the poly-crystallization of TiO2 from amorphous state after annealing, which generates a high current conduction pass through the poly-grain boundaries. However, the high annealing temperature (>500oC), which is required to crystallize these high-κ materials, not only increases the roughness of the film but also results in lower breakdown voltage, and higher leakage current. It is also incompatible with the existing VLSI backend process integration. So, the difficult technology challenge for high capacitance density of MIM is to search suitable high-κ dielectric with good dielectric integrity when fabricated at a low process temperature (<400oC) for VLSI backend process integration. Another difficult challenge for RF MIM capacitor is to achieve small voltage dependence of capacitance used for precision circuit application. In addition, it is highly important to measure the voltage dependence of capacitance at RF frequency (>0.8 GHz). This is because the operation frequency of precision circuits is increasing into GHz range as continuous technology evolution. The most important requirement of the MIM capacitors is that the oxide’s κ value 6.

(15) should be high. There is a trade off with the band offset condition, which requires a reasonably large band gap. Figure 1-2 shows that the κ of candidate oxides tends to vary inversely with the band gap, so we must accept a relatively low κ value to keep out the leakage current. To achieve the high capacitance density (>10 fF/µm2), the dielectric TiO2 is a potential candidate, since it can display very high κ value (~80). But, the large leakage current from crystallization of the TiO2 is a major limitation for device applications. In order to improve the leakage current problem, we dope the high-κ material which has higher band gap and higher κ value to suppress the leakage current [1-20]. Here we report the use of TiTaO as the dielectric, and show capacitors with lower leakage current after backend processing. We report devices with a record high density of 23 fF/µm2 at 0 V, a κ value of 45, and low leakage current of 1.89×10-6 A/cm2 at -1 V. This performance of the TiTaO MIM capacitors is accompanied by a small voltage-dependence of capacitance (∆C/C0) of only 550 ppm at 1GHz.. 7.

(16) 1-3. The deposition technologies of high-κ dielectrics Recently, several methods to deposit ultra thin high-κ dielectrics on substrates have been. reported and each of them exhibits the merits as well as some other issues that have to be solved. Among the methods of the deposition of ultra thin high-κ film, metal organic chemical vapor deposition (MOCVD) is the method extensively used in VLSI fabrication. The deposition of high-κ film has been achieved by using metal organic precursor vapor. The precursors are introduced into low-pressure chamber and the substrate is heated to the suitable process temperature. The uniform and conformal deposition of dielectrics can be obtained. That is the reason why MOCVD process is integrated into fabrication process flow extensively [1-21]. Although MOCVD has so many merits, it still exist some issues such as the carbon contamination and the impact of precursors to the environment, health and safety. Atomic layer chemical vapor deposition (ALCVD) is the another way used extensively in fabrication to deposit high-κ film and has attracted much attention due to its self-limit and mono-layer deposition properties [1-22]. ALCVD is the method using MCl4 (M: Hf, Ti, Zr…) and H2O as sources to deposit high-κ film (ie. HfO2, TiO2, ZrO2…). The precursors are introduced into the heated chamber and substrates. The reaction only happens on the substrate surface instead of the deposited layer and one layer is deposited at a time. Thus, the thickness of dielectrics can be controlled precisely and is dependent on the process cycles linearly. The excellent uniformity of deposition can be achieved on SiO2 and Si3N4 films, but the deposition on H-terminated Si substrate can lead to rough surface. However, H-terminated Si substrate is inevitable after HF dipping. Therefore, the improvement of process precursor is the key point to overcome the issues of ALCVD. Depositing the metal or metal oxide directly on the substrate using physical vapor deposition (PVD) method followed by thermal oxidation and annealing is the another. 8.

(17) approach to deposit high quality dielectrics [1-12]. In the recent years, there have been many reports about this technology. The process flow is described as follows. The pre-processed wafer is loaded into high vacuum chamber. Then, the metal layer is deposited using reactive dc magnetron sputtering with oxygen modulation technique or the metal oxide is sputtered directly followed by annealing. Although this method is compatible with the modern VLSI process, the formation of interlayer oxide and crystallization are still the issues that should be solved. By combining the nitridation and dielectric doping techniques, both of the problems mentioned above can be minimized. Therefore, this method is still promising due to the merits. In this study, we used the PVD method to fabricate the high-κ dielectrics. Instead of nitridation, we utilized NH3 plasma treatment to prevent from the formation of interface oxide. The pre-processed wafer was loaded into E-beam evaporator under high vacuum condition to deposit dielectric and then annealed at 400oC in O2 ambient for complete oxidation. The devices using TiTaO are fabricated and measured at low and high frequencies. More detailed fabrication process of high-κ TiTaO as the dielectric can be found elsewhere.. 9.

(18) 1-4. Thesis In this thesis, we use the process of PVD technique for the deposition of high-κ. dielectrics. By altering the sources of deposition, various dielectrics can be deposited on the substrates. Moreover, this simple process technique is able to integrate with front-end or back-end process. So, we take the above way to fabricate the Metal-Insulator-Metal capacitor using TiTaO material as the dielectric. At low frequency, the results shows that TiTaO as the thin film of the dielectric can make the capacitance density up to 23 fF/µm2 at 0 V and the leakage current is 1.89×10-6 A/cm2 low at -1 V. Beside the measurement of leakage current density and capacitance at low frequency, we measured the S-parameters to investigate the characteristics of the MIM capacitors at RF regime. We also use an equivalent circuit model to derive the voltage-dependent capacitance coefficient (VCC) at RF frequency regime. TiTaO dielectric provides the special advantage, such as a higher permittivity (~45); low normalized capacitance change (∆C/C0) with a small value ~550 ppm at 1 GHz; and low temperature-dependent capacitance coefficient (TCC). The good MIM capacitor integrity is suitable for precision circuit application at RF measurements. In addition, few studies of the stress reliability of the analog characteristics of MIM devices have been reported [1-23] [1-24], beyond considerations of the simple time-dependent dielectric breakdown, despite its importance for circuit applications. This stress degradation is a concern in low-breakdown field and small-band-gap materials, which will lead to high leakage currents because of the small conduction band discontinuity (∆ΕC) with respect to Si [1-25]. Here we also described the stress reliability of the analog characteristics of TiTaO MIM capacitors in this thesis.. 10.

(19) Fig.1-1 The International Technology Roadmap of SIA for semiconductor 2006.. 11.

(20) Fig.1-2 Static dielectric constants versus energy band-gap for candidate gate oxides.. 12.

(21) Chapter 2 The Experimental Steps and Measurements 2-1. MIM capacitors fabrication The MIM capacitor in this work, we used a standard 4-in p-type silicon wafer (100) as. the substrate and pre-processed with RCA clean. Additional 5000 Å thermal oxide was first deposited on the substrate for VLSI back-end process integration. Then coplanar transmission lines with GSG probe were fabricated on oxide-isolated silicon substrates using deposited TaN/Ta bi-layer followed by subsequent patterning [2-1] [2-2]. The bottom TaN/Ta metal electrode and transmission line are formed. And then we use NH3 plasma treatment on the bottom electrode to suppress the diffusion of O2 and the generation of the interfacial layer. Next, a plasma-enhanced chemical vapor deposition (PECVD) passive oxide was deposited for isolation and followed by patterning the major capacitors and the transmission lines region. Then TixTa1-xO (x~0.6) was deposited on bottom TaN/Ta metal. electrode and transmission. line in a high vacuum chamber by Dual E-Gun Evaporation System, fallowed by subsequent oxidation and annealing at 400oC in a furnace.. The oxidation was performed only using dry. O2. This low temperature of 400oC is due to the VLSI back-end process integration limitation. Two TiTaO thicknesses of 17nm and 29nm are formed, respectively. For comparison, the TiO2 dielectric was also deposited. The motivation of using TiTaO is to use higher κ (~80) property of TiO2 and reduced low DC leakage using mixed dielectric similar to previous AlTaO study. So, we chose Ta2O5 as the dopant, which has better VCC and TCC in the present materials, in order to meet the ITRS roadmap requirement (VCC-α < 100ppm/V2). Finally, Al metal was deposited and patterned to form both top capacitor electrode and RF transmission line. The process of MIM will show in Fig. 2-1~ Fig. 2-10. The structure of the RF MIM 13.

(22) capacitor and the layout of this device are showed in Fig. 2-10 and Fig.2-11.. 14.

(23) 2-2. The measurements of MIM capacitors To analyze the electrical characteristics of these devices, we have measured the leakage. current and stress-induced leakage current using HP 4156A semiconductor parameter analyzer. Besides, HP4284A precision LCR meter was used to evaluate the capacitance before and after constant voltage stress over a frequency range from 100 kHz to 1 MHz. Furthermore, to investigate the characteristics of our devices at the frequency above 1 MHz, we measured the scattering parameter using HP8510C network analyzer from 50MHz to 10GHz and de-embedded from a dummy device [2-1]-[2-4]. Network analyzer generates a calibrated RF signal and has three input measuring channels, which are commonly called the R, the A, and the B channels, respectively. The R channel is used to measure the incident voltage, and the A and B channels measure reflected and transmitted voltages. Then, we obtain S11 and S21 by calculating A/R and B/R in polar form, respectively. The S12 and S22 also are obtained using the same way except changing the input voltage channel. Next, the high frequency capacitance was extracted by using a physically based equivalent circuit model reported previously [2-3]. The ∆C/C0 and quadratic voltage coefficient at RF frequency are derived mathematically from measured S-parameters and circuit theory.. 15.

(24) Si. Fig.2-1 Silicon substrate.. SiO2. Si. Fig.2-2 Silicon dioxide growth.. 16.

(25) MASK#1. PR lithography patterning. SiO2. Si. Fig.2-3 Photoresist deposition and lithography patterned.. Bottom electrode + TL. SiO2. Si. Fig.2-4 Deposited TaN/Ta bottom electrode and lifted out the photoresist.. 17.

(26) Bottom electrode + TL TEOS. SiO2. Si. Fig.2-5 Deposited TEOS.. MASK#2. Bottom electrode + TL. TEOS. SiO2. Si. Fig.2-6 Lithography patterned and etched.. 18.

(27) Bottom electrode + TL. Dielectric. TEOS SiO2. Si. Fig.2-7 Deposited TiTaO followed with oxidation and annealing at 400 o C and O2.. MASK#3. Bottom electrode + TL. Dielectric TEOS. SiO2. Si. Fig.2-8 Lithography patterned, and etched.. 19.

(28) Bottom electrode + TL. Top electrode + TL. Dielectric TEOS SiO2. Si. Fig.2-9 Deposited Al top electrode.. 20.

(29) MASK#4. Capacitor device 30 um. Top electrode + TL. Bottom electrode + TL Dielectric. TEOS SiO2. Si. Fig.2-10 Lithography patterned, etched and the complete device cross-section.. 21.

(30) Capacitor Active area. Top electrode + TL. Bottom electrode + TL. Fig.2-11 Top cell view of a RF MIM capacitor.. 22.

(31) Chapter 3 Result & Discussion 3-1 Low frequency characteristics We first measured the low-frequency capacitance ranging from 10 KHz to 1 MHz. Figure 3-1 shows the C-V and the J-V characteristics of TiTaO MIM capacitors with two different high-κ dielectric thicknesses. In Fig 3-1, capacitance densities of ~23 and ~14 fF/µm2 were measured at 0 V for respective 17 nm (EOT~1.5nm) and 29 nm (EOT~2.45nm) thickness of physics. The dielectric constant (κ) can be obtained by physical thickness and capacitance value. Therefore, we get a κ value of 45 in TiTaO dielectric. Figure 3-2 shows the C-V characteristics of TiTaO and TiO2 MIM capacitors. However, the TiO2 MIM capacitor showed an abnormal capacitance variation at voltages above ±0.75 V. In contrast, constant capacitance values at -1 V~1 V region, with little voltage and frequency dependence, were found for the TiTaO MIM capacitor. In Fig 3-1, the leakage current increases with decreasing the thickness of the TiTaO film, by trading off the increasing capacitance density. Leakage currents of 1.89×10-6 and 6.06×10-7 A/cm2 were measured at -1V for respective 17nm and 29 nm thickness of physics. To investigate the abnormal large capacitance variation in TiO2 capacitors at applied voltage > 0.75 V (or < -0.75 V), we have also plotted the characteristics of DC Current-Density versus Voltage (J-V) of the TiO2 capacitors. The poor C-V for the TiO2 MIM capacitor is related to its large leakage current, as shown in Figure 3-3. It may be due to the current conduction through grain boundaries of the poly-crystalline of TiO2 [3-1]. The TiTaO MIM capacitors have ~5-7 orders of magnitude lower leakage current than that for the TiO2 devices. We also can find out the J-V curves shown in Fig. 3-1 and Fig. 3-3 of the TiTaO MIM capacitors are asymmetrical. Although the work function of top Al electrode (4.1eV) is lower than that of 23.

(32) bottom TaN electrode (4.5eV), the leakage current, injecting electrons from the Al contact, is lower than that from the TaN bottom electrode. This is due to the better interface for the Al, which also gives better voltage and frequency dispersion in the C-V curves. Because after oxidation and annealing at 400 o C in a furnace, there will have a generant interfacial layer (TiTaON) and more defects between the bottom electrode and the dielectric film. The TCC and quadratic VCC (VCC-α) are important figures of merit for the MIM capacitors. The voltage non-linearity is classically described by the polynomial law: C(V) = C0 ( αV2 + βV +1 ). (1). ∆C/C0 = αV2 + βV. (2). where ∆C = C(V) - C(0), C0 is the capacitance at 0V, and α and β are the quadratic and linear coefficients of capacitance[3-2]. Figure 3-4 shows the characteristics of the normalized capacitance density (∆C/C0) versus V of the TiTaO MIM capacitors with physical thickness of 17nm and 29nm. But according to Fig. 3-5, ∆C/C0 is almost related with quadratic electric field inversely [3-3]. Therefore, we can find that the ∆C/C0 becomes better (smaller) for thinner TiTaO thickness at the constant voltage. It is the key point to choose the thickness to obtain the lower leakage current and better ∆C/C0. There are several mechanisms to discuss the varying ∆C/C0 and capacitance value with increasing frequency, such as the presence of traps near the metal-insulator interface, the occurrence of free carrier space charge relaxation, or nonlinearities of the metal-oxygen bond polarizability [3-4] ~ [3-6]. Fig. 3-6 shows the ∆C/C0 of the 17-nm dielectric thickness of the TiTaO MIM capacitors as a function of temperature. C(V) = C0 ( TCC×V +1 ). (3). The measured temperature coefficient of capacitance (TCC) is 429, 354 and 329 ppm/oC for respective 10 kHz, 100 kHz and 1 MHz. It is noticed that both TCC and ∆C/C0 decrease monotonically with ln(1/C), and comparable values are obtained with previous HfO2 data at the same 1/C by extrapolation[3-7]. 24.

(33) 3-2. High frequency characteristics We have measured the S-parameters to further investigate the RF frequency. characteristics, beyond the 1 MHz upper limit of precision LCR meter. Fig. 3-7 shows the measured S-parameters for TiTaO MIM capacitors. The RF frequency capacitors can be extracted from S-parameters by using the equivalent circuit model shown in Fig. 3-8 [3-8]. The C, RP, LS, and RS in this model are the capacitor, parallel resistance, parasitic series inductance, and parasitic series resistance respectively. The shunt RP and C are the basic equivalent models for high-κ capacitor and small series RS and LS are formed the model of the connected transmission lines. The capacitance value were measured directly using the LCR meter from 10 KHz to 1 MHz and calculated up to 10 GHz from the measured S-parameters by using the following equation (4) and equation (5) [3-9]. S 21 =. 2 2 + Z(ϖ). (4) Z0. Z(ϖ) = R s + jϖ(L S1 + L S 2 ) +. RP. j ϖC RP + 1 j ϖC. (5). where Z0 is the characteristic impedance of transmission line and Z(ω) is the total impedance between two ports shown in the equivalent circuit model of Fig. 3-8, which is frequency-dependent. From known S21, equation (4) and equation (5), the capacitance of TiTaO MIM capacitors at high frequency were obtained, as shown in Fig.3-9. The small capacitance reduction of 1.8% from 100 kHz to 10 GHz indicates good device performance over the IF to RF range. The ∆C/C0 below 1 MHz can be calculated from C values measured by precision LCR meter, as shown in Fig. 3-1. However, the accuracy for ∆C/C0 obtained from the C-V data is not enough for RF frequency region. To achieve high precision ∆C/C0 at RF frequency, we have used equation (6) for this purpose [3-9]:. 25.

(34) ∆C = C. Z 0 ⎛⎜ 2 + Z(ϖ ) ⎞⎟ 2 Z0 ⎠ ⎝ 2⎛ ⎞ 1 j C R ∆(S 21 ) ϖ + ⎜ P jϖC ⎟⎠ ⎝ 2R 2P. (6). Based on the circuit theory derived equation (6), the high precision of ∆C/C0 shown in Fig. 3-10, can be obtained by differentiating the measured S21, i.e., ∆S21 to enhance the small variation from S-parameters. The ∆C/C0 data, below 1 MHz and obtained from the precision LCR meter, is also plotted for comparison. Fast decreasing ∆C/C0 is observed with increasing from 1 MHz to 0.05 GHz (50 MHz). To further study the frequency dependence, we also have plotted ∆C/C0, first order voltage linearity β and quadratic voltage linearity α from 100 kHz to 10 GHz, as shown in Fig3-9. A rapid decreasing ∆C/C0 (or α or β) with increasing frequency from 1 MHz to 100 MHz is observed as compared with other frequency range of either 100 KHz to 1 MHz or 100 MHz. to. 10. GHz.. Because. the. typical. carrier. lifetime. from. trapped-related. Shockley-Read-Hall (SHR) recombination is in a range from ms to µs, the fast reduction ∆C/C0 within the 1MHz to 100 MHz range may be due to the trapped carriers unable to follow the high frequency signals. The small ∆C/C0 of 550 ppm, low α of 81 ppm/V2 and β of 98 ppm/V at 1 GHz are sufficient to meet the requirements of analog/RF IC applications.. 26.

(35) 3-3. Reliability The effects of constant-voltage stress on capacitance, leakage current and ∆C/C0 of. Al/TiTaO/TaN capacitor were investigated. After constant-voltage stress, the leakage current of a TiTaO MIM capacitor was lower than fresh one, as shown in Fig. 3-11. It was supposed that there is generation of the electron traps in the high-κ TiTaO dielectric and in the TaTiO/metal interface. And then, the trapped charges decrease the carrier mobility of electrons in the dielectric and lower the charge injection from the top electrode by electrostatic scattering, which in turn produces a smaller leakage current, according to a free-carrier-injection model [3-10]. Fig.3-11 also shows the thermal equilibrium-band diagram of Al/TiTaO/TaN structure after the constant-voltage stress. Fig. 3-12 shows the C-V characteristics of the TiTaO MIM capacitors before and after constant-voltage stress. It can be seen that the capacitance density decreases with increasing stress time for the TiTaO MIM capacitors, and the curves have positive shift along voltage axis. Because the trapped charges in the dielectric will cause the voltage shift. Fig. 3-13 shows the ∆C/C0 characteristics below 1 MHz obtained from the data shown in Fig. 3-12 before and after constant-voltage stress. We can also find out that the ∆C/C0 decreases with increasing stress time as the same as the capacitance values. For this phenomenon, we can use electrode polarization mechanism that implies hopping carriers whose mobility is field dependent to clearly explain it [3-11]. The equation of this mechanism will be. ∆C 2 = C 0 (ε 0 ε )2 n. ⎛ L ⎜⎜ ⎝ LD. ⎞ ⎟⎟ ⎠. 1− 2 n. 1. (ρ + 2). 2 (1− n ). 1 2 n ⎡ ⎛ nqEs ⎞ − 1⎤ σ 0 × ⎢exp⎜ ⎟ ⎥ 2n κ T B ⎠ ϖ ⎣ ⎝ ⎦. (7). where L is the film thickness and LD = (ε0εκBT / Nq2 )0.5 is the Debye length, where N is the density of the mobile charges. Parameter ρ is the “blocking parameter,” that accounts for electrode transparency. For ohmic contacts, ρ is large (no space charge). On the contrary, for blocking contacts, ρ is weak (no charge transfer at the electrodes in ac). σ0 is the factor of conductivity σ = σ0 × exp(nqEs / κBT), where E is the high field (dc bias) in dielectric, s is the 27.

(36) hopping distance of mobile charges and n is about the empirical Jonscher universal law, where 2n = 0~1 [3-11]. These are all verified experimental factors. This equation (7) predicts that ∆C/C0 should decrease with frequency (ω-2n) and should increase with the leakage current (σ0). Fig. 3-14 shows the characteristics of the VCC-α values versus constant-voltage-tress time at different frequencies. We can find out that the VCC-α becomes worse after constant-voltage stress and becomes better at higher frequency. Altogether, the leakage current of a TiTaO MIM capacitor was lower, its capacitance and ∆C/C0 became smaller and the VCC-α was worse than before after the constant-voltage stress.. 28.

(37) 5. 10. 2. Al/TaTiO/TaN;C=23 fF/µm 2 Al/TaTiO/TaN;C=14 fF/µm Capacitor Size=30µm x 30µm. 3. 30. 2. Current density (A/cm ). 10. 25 CH (fF /um ). 1. 2. 10. 20 15. -1. 10 kHz 100 kHz 1M Hz. 10. 10. 5. 0 -2.0 -1.5 -1.0 -0.5 0.0 Voltage(V). -3. 10. 0.5. 1.0. -5. 10. Gate injection. -7. 10. -5. -4. -3. -2. Bottom injection. -1 0 1 Voltage(V). 2. 3. 4. Fig.3-1 C-V and J-V characteristics of the TiTaO MIM capacitors measured from 10 kHz to 1 MHz. The data were measured by HP 4156A and HP4284A precision LCR meter.. 29. 5.

(38) Capacitance Density (fF/µm2). 24 20 16 12. Al/TiTaO/TaN MIM at 1 MHz Al/TiTaO/TaN MIM at 500 kHz Al/TiTaO/TaN MIM at 100 kHz Al/TiO2/TaN MIM at 1 MHz. 8 4 0 -2. -1. 0 Bias (V). 1. Fig.3-2 The C-V characteristics of TiO2 and TiTaO MIM capacitors measured at different frequency. High capacitance density of 23 fF/µm2 of TiTaO MIM capacitors were measured at 1 MHz with small capacitance variation.. 30. 2.

(39) 0. Current Density. (A/cm 2). 10. Al/TiO2/TaN Al/TaTiO/TaN. -2. 10. -4. 10. -6. 10. Top Al electron Injection. BottomTaN Electron Injection. -8. 10. -4. -2. 0 Bias (V). 2. Fig.3-3 The J-V characteristics of TiO2 and TiTaO MIM capacitors. The leakage current is lower for the TiTaO capacitors.. 31. 4.

(40) 4. 3x10. 2. 2. C=23 fF/µm α =1983 (ppm/V ) 2 2 C=14 fF/µm α =1459 (ppm/V ). 4. ∆C/C (ppm). 2x10. 4. 1x10. 0 0.0. Gate injection @1MHz. -0.5. -1.0 Bias (V). -1.5. Fig.3-4 The characteristics of ∆C/C0 for the TiTaO MIM capacitors with dielectric thicknesses of 17nm and 29nm. The data were measured at 1 MHz.. 32. -2.0.

(41) 4. 3x10. 2. 2. C=23 fF/µm α =1983 (ppm/V ) 2 2 C=14 fF/µm α =1459 (ppm/V ). ∆C/C (ppm). 4. 2x10. 4. 1x10. 0. 0.0. -0.2. -0.4 -0.6 -0.8 -1.0 Electric field (MV/cm). -1.2. Fig.3-5 The polts of ∆C/C0 versus electric field (E) with different dielectric thickness. The reason for no matching together is that there are different gauge of trapped charges in the interface of the different thicknesses.. 33. -1.4.

(42) -11. 80000. 10. 70000 60000. -12. 10. 50000. ∆C (F). Nomalized capacitance(ppm). o. 429 ppm/ C (10KHZ) o 354 ppm/ C (100KHZ) o 339 ppm/ C (1MHZ). 40000 30000. -13. 10. 20000 10000 Capacitor Size=30µm x 30µm 2 C=23 fF/µm ; Vg=~0 V. 0 20. 40. 60 80 100 o Temperature( C). 120. Fig.3-6 The characteristics of the Normalized capacitance of the TiTaO MIM capacitors as an approximate linear function of temperature.. 34. -14. 10 140.

(43) 1.0j 2.0j. 0.5j. S21. 0.5. 1.0. 5.0j. 2.0. 5.0. S12. -5.0j. -2.0j. -0.5j -1.0j. Fig.3-7 The measured scattering parameters of TiTaO MIM capacitors from 50 MHZ to 10 GHz.. 35.

(44) LS1. RS. RP. LS2. C. Fig.3-8 The equivalent circuit model for capacitor extraction. The C and RP are the capacitance and its parallel resistance, and the LS and RS are the parasitic inductance and resistance from transmission lines connected between capacitor body and probing pads.. 36.

(45) 5. 25. 4. 10. 20. ∆C/C 3. 10. α. β. 15 10. 2. 10. 5 1. 10 100k. 1M. 10M 100M Frequency (Hz). 1G. 2. C. Capacitance Density(fF/µm ). 30. 2. 23 fF/µm. 2. ∆C/C (ppm), α (ppm/V ), β (ppm/V). 10. 0 10G. Fig.3-9 Frequency dependent capacitance density, ∆C/C0, α and β for a TiTaO MIM capacitor.. 37.

(46) 5. 10. 2. 23 fF/µm 4. ∆C/C (ppm). 10. 100 kHz 500 kHz 1 MHz. Increasing Frequency 3. 10. 2. 50 MHz 100 MHz 1 GHz 10 GHz. 10. 1. 10 0.0. 0.5. 1.0 Bias (V). 1.5. 2.0. Fig.3-10 The ∆C/C0-V characteristics of a TiTaO MIM capacitor. The data for frequencies >1 MHz were obtained from the S-parameters.. 38.

(47) -2. C onst voltage stress. electron trapping. 2. Gate current density (A/cm ). 10. -3. 10. 1.5V. -4. 10. Al. T aTiO x. TaN. -5. 10. stressed @-1.5V for first time stressed @-1.5V after 5 hours for second time stressed @-1.5V after 10 hours for thrid time. -6. 10. 0. 100. 200 300 Stress Time (s). 400. 500. Fig.3-11 The J-V characteristics of Al/TiTaO/TaN capacitors, measured at 1 MHz. The inserted figure is the band diagram of Al/TiTaO/TaN structure.. 39.

(48) 24.0. Capacitor Size=30µm x 30µm 2 C=23 fF/µm @1MHz As-stressed Stressed @-1.5V 500s Stressed @-1.5V 1000s Stressed @-1.5V 2000s. 2. CH (fF/um ). 23.5. 23.0. Positive shift along the voltage axis. 22.5. 1.0. 0.5. 0.0 -0.5 Voltage(V). -1.0. -1.5. -2.0. Fig.3-12 The C-V characteristics of a TiTaO MIM capacitor were measured at 1 MHz before and after constant-voltage stress.. 40.

(49) 4. 4x10. As-stressed Stressed @-1.5V 500s Stressed @-1.5V 1000s Stressed @-1.5V 2000s. 4. ∆C/C (ppm). 3x10. 2. α=1983 (ppm/V ) 2. α=2241 (ppm/V ) 2. α=2743 (ppm/V ) 2. α=4203 (ppm/V ). 4. 2x10. 4. 1x10. 0 1.0. 0.5. 0.0. -0.5 -1.0 Voltage(V). -1.5. -2.0. Fig.3-13 The ∆C/C0-V characteristics of a TiTaO MIM capacitor were obtained from the formula (6).. 41.

(50) 7000. Capacitor Size=30µm x 30µm 2 6000 C=23 fF/µm ;Stressed@-1.5V. VCC α. 5000 4000 3000 2000 100 kHz 500 kHz 1M Hz. 1000 0. 0. 500. 1000 1500 Stress time(sec). 2000. Fig.3-14 The characteristics of VCC-α versus stress time of a TiTaO MIM capacitor at different frequency.. 42.

(51) Chapter 4 Conclusion According to ITRS roadmap (2006), the typical requirements for year 2010 of RF (0.8G ~ 10G) capacitor are capacitance density of 5 fF/µm2, voltage linearity of less than 100 ppm/V2 ,. and leakage current of less than 10-8 A/cm2, respectively. We have achieved high. 23 fF/µm2 capacitance density, < 1.8% capacitance reduction to RF frequency range from 100 kHz to 10 GHz, and ∆C/C0 ≦ 550 ppm, low α of 81 ppm/V2 and β of 98 ppm/V at 1 GHz by using high-κ TiTaO MIM capacitors and processed at 400oC. It can also provide a low leakage current of 1.89 × 10-6 A/cm2 at -1V. All this indicate that it is very suitable for use in silicon IC applications, although the leakage current of the Al/TiTaO/TaN MIM capacitor structure is higher than 10-8 A/cm2. However, we can solve this problem by replacing top metal electrode which have higher work function than Al, or increase thickness to improve the leakage current at the cost of the degraded capacitance density. The effects of constant voltage stress on capacitance, leakage current and VCC-α of Al/TaTiO/TaN capacitor were also investigated. We can find out that the decreasing leakage current, decreasing capacitance at low voltage, and increasing VCC-α during the stress time.. 43.

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(57) Vita 姓名：陳冠麟性別：男出生年月日：民國 70 年 10 月 22 日籍貫：台灣省彰化市住址：彰化縣彰化市台化街 86 巷 14 號學歷：國立中山大學電機系 (民國 89 年 9 月~民國 94 年 6 月) 國立交通大學電子研究所固態電子組 (民國 94 年九月~民國 96 年 6 月). 論文題目：高介電常數金屬-絕緣層-金屬電容電性及其可靠度之研究. The Research of Electric Characteristics and Reliability of High-κ MIM Capacitors. 49.

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