540 IEEE ELECTRON DEVICE LETTERS, VOL. 31, NO. 6, JUNE 2010
On the Origin of Hole Valence Band Injection
on GIFBE in PD SOI n-MOSFETs
Chih-Hao Dai, Ting-Chang Chang, Ann-Kuo Chu, Yuan-Jui Kuo, Shih-Ching Chen, Chih-Chung Tsai,
Szu-Han Ho, Wen-Hung Lo, Guangrui Xia, Osbert Cheng, and Cheng Tung Huang
Abstract—This letter systematically investigates the mechanism of gate-induced floating-body effect (GIFBE) in advanced partially depleted silicon-on-insulator metal–oxide–semiconductor field-effect transistors. Based on different operation conditions, we found that the hole current collected by the body terminal is strongly dependent on electrons in the inversion layer under a source/drain ground. This implies that GIFBE can be attributed to anode hole injection (AHI) rather than the widely accepted mech-anism of electron valence band tunneling. Moreover, GIFBE was also analyzed as a function of temperature. The results provide further evidence that the accumulation of holes in the body results from the AHI-induced direct tunneling current from the gate.
Index Terms—Electron-valence band (EVB) tunneling, gate-induced floating-body effect (GIFBE), linear kink effect, silicon-on-insulator (SOI).
I. INTRODUCTION
W
ITH the scaling down of metal–oxide–semiconductor field-effect transistors (MOSFETs), the aggressive shrinking of gate oxide thickness results in an increase of direct gate tunneling current, which is responsible for the increase of power consumption in CMOS circuits [1]. The increasing tun-neling current in advanced silicon-on-insulator (SOI) devices has been reported to cause a new floating-body (floating) effect in the linear operation region [2], a phenomenon referred to as “linear kink effect” (LKE). Some previous research has also found that LKE gives rise to a second peak of transconductance (gm), particularly in partially depleted (PD) SOI MOSFETs with an FB condition, as well as in fully depleted ones with back gate bias [2], [3]. In addition, numerous studies havere-Manuscript received January 15, 2010; revised March 3, 2010. Date of publication April 26, 2010; date of current version May 26, 2010. This work was supported by the National Science Council under Contracts NSC-98-3114-M-110-001 and NSC-97-2112-M-110-009-MY3. The review of this letter was arranged by Editor A. Ortiz-Conde.
C.-H. Dai, A.-K. Chu, and Y.-J. Kuo are with the Department of Photonics, National Sun Yat-Sen University, Kaohsiung 80424, Taiwan.
T.-C. Chang is with the Department of Photonics, the Department of Physics, and the Center for Nanoscience and Nanotechnology, National Sun Yat-Sen University, Kaohsiung 80424, Taiwan (e-mail: [email protected]. nsysu.edu.tw).
S.-C. Chen, C.-C. Tsai, and W.-H. Lo are with the Department of Physics, National Sun Yat-Sen University, Kaohsiung 80424, Taiwan.
S.-H. Ho is with the Department of Electronics Engineering, National Chiao Tung University, Hsinchu 300, Taiwan.
G. Xia is with the Department of Materials Engineering, The University of British Columbia, Vancouver, BC V6T 1Z4, Canada.
O. Cheng and C. T. Huang are with the Device Department, United Micro-electronics Corporation, Hsinchu 300, Taiwan.
Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LED.2010.2046131
ported that LKE increases the low-frequency noise and strongly impacts the history effects in digital circuits [4]–[7].
LKE differs from the well-known kink effect that occurs at a high drain voltage due to impact ionization. It is closely related to the vertical electrical field. Therefore, LKE is also referred to as gate-induced FB effect (GIFBE) [3]. The mechanism of electron-valence band (EVB) tunneling through an ultrathin oxide is widely accepted as an explanation for GIFBE [2]–[7]. However, there are few studies that confirm the validity of this mechanism in an SOI device by using systematic operation conditions. The aim of this letter is to clarify the mechanism of GIFBE for PD SOI nMOSFETs. The experimental results demonstrate that anode hole injection (AHI) from the poly gate is the main dominant mechanism responsible for GIFBE rather than EVB tunneling.
II. EXPERIMENT
Using 65-nm SOI CMOS technology, PD SOI n-type MOSFETs are employed with a T-gate structure to investigate the GIFBE mechanism. The distance from the body contact to the active region is 0.35 µm. The silicon film and buried oxide thicknesses for the devices are 75 and 145 nm, respectively. The gate oxide with a thickness of 12 Å was grown by in situ steam generation, with the channel doping concentration being about 3× 1018cm−3. The channel currents follow in the110 direc-tion on (100) substrates. In this letter, devices with a channel width(W ) of 1 µm and a length (L) ranging from 1 to 0.2 µm were selected. The devices with an FB or a grounded body (GB) were measured to study the phenomenon of LKE. To further in-vestigate the GIFBE mechanism, temperature-dependent elec-trical characteristics were performed at temperatures ranging from 303 to 453 K. All experimental curves were measured using a Keithley 4200 semiconductor parameter analyzer.
III. RESULTS ANDDISCUSSION
Fig. 1 shows the gm in the linear region(VD= 50 mV) for the PD SOI n-type MOSFETs under FB and GB operations. It can be clearly observed that a second gm peak appears in the FB device. In addition, the body current (IB) under GB operation increases rapidly beyond the gate voltage of 0.9 V, corresponding to the second gm peak. This phenomenon indi-cates that, under FB operation, additional carriers (holes) ac-cumulate in the body beyond this voltage. Therefore, the body potential increases exponentially, which causes a reduction in the threshold voltage(VT), resulting in a higher drain current
and the second gm peak in the linear region.
DAI et al.: ON THE ORIGIN OF HOLE VALENCE BAND INJECTION 541
Fig. 1. gm as a function of gate voltage for PD SOI n-MOSFETs under GB and FB operations in the linear region(VD= 50 mV). IBis measured under GB operation.
Fig. 2. IG–VGand IB–VGcurves for different N+poly-gate areas. The inset displays the linear relationship between IBand IGfor different N+poly-gate areas.
To examine the origin of additional carriers (holes) caused by the gate leakage current(IG), Fig. 2 shows IG and IB versus gate voltage(VG) for different N+poly-gate areas (1–0.2 µm2), while the source/drain (S/D) are grounded. Clearly, IBhas sig-nificant enhancement as IG increases, meaning that the source of IB is strongly dependent on IG. Furthermore, the linear relationship between IBand IGis also obtained and shown in the inset of Fig. 2. The IB–VG curve in Fig. 2 shows that VG corresponding to the rapid increase of IBfor different N+ poly-gate areas is always located around 0.9 V. This indicates that additional carriers can only be generated at a certain vertical electrical field (∼4.5 MV/cm) regardless of the poly-gate area.
It was proposed that IG consisted of three components: electron tunneling from the conduction band, electron tunneling from the valence band (EVB), and hole tunneling from the valence band (HVB) [8]. In fact, the hole accumulation in the p−substrate has been explained due to EVB and HVB tunneling currents under an FB condition. However, the EVB tunneling model was widely accepted to explain the LKE phenomenon because the HVB component is typically very small for NMOS. In the inset of Fig. 3, the EVB tunneling schematic band diagram shows that the electrons tunnel from the valence band of the Si substrate to the poly-gate conduction band under
Fig. 3. IG–VGand IB–VGcharacteristics for a PD SOI n-MOSFET under floating and grounded S/D operations. The inset shows the schematic diagrams of EVB tunneling and AHI model for an ultrathin gate oxide of a PD SOI n-MOSFET.
a sufficiently large vertical electric field. As a result, holes accumulate in the body due to FB, which leads to a rise in body potential. However, the other mechanism, i.e., that of AHI [9], also shown in the inset of Fig. 3, is also a possible model to explain LKE. In AHI, when the gate oxide is thin enough, electrons can tunnel from the inversion layer to the poly gate (anode) and generate hot holes by impact ionization in the poly-depletion region. Then, these hot holes can inject over or through the anode/oxide interface energy barrier and traverse the oxide layer to the body (cathode). Consequently, the HVB tunneling current becomes significant due to the increase of AHI tunneling current from the poly gate to the p−substrate. Both mechanisms generate holes that accumulate in the body, but there are two key differences between the EVB tunneling and the AHI model. One is the source of electrons: The electrons in the EVB tunneling model come from the valence band, but the source of electrons in the AHI model is from the conduction band. The other difference is that the intensity of the vertical electric field in the EVB tunneling model is larger than that in the AHI model. This is because the VGin the EVB tunneling model needs to be larger than the silicon band gap (1.1 V) to make the valence band energy level in the silicon substrate align with the gate conduction band [8]. Our experimental results that identify the rapid increase of IB for different N+poly-gate areas located at around 0.9 V imply that the AHI model is more likely to be responsible for GIFBE. To further verify that the AHI model is the dominant mech-anism of GIFBE, two operation conditions are performed to distinguish the different sources of IG that result in hole accu-mulation. We measured the IGand IBversus VGof the device under floating and grounded S/D operations. The result under S/D floating operation is shown in Fig. 3, where it can be clearly observed that the gate leakage current becomes insignificant be-cause the S/D cannot supply sufficient minority carriers (elec-trons) to the inversion layer. The IB is not evident (∼0.1 pA) in this operation. On the contrary, both currents show very pro-nounced increases under grounded S/D operation. The results prove that the origin of GIFBE can be attributed to the elec-trons in the inversion layer rather than the electron–hole pair
542 IEEE ELECTRON DEVICE LETTERS, VOL. 31, NO. 6, JUNE 2010
Fig. 4. (a) Transfer characteristics as a function of temperature varying from 303 K to 453 K under FB operation. (b) IB–VGcharacteristics of the PD SOI n-MOSFET with body contact for different temperatures. The inset shows the
IB–VGafter VT correction, where VT is obtained from linear extrapolation from gmmax.
separated in the valence band of the p−substrate. Therefore, the AHI model is the dominant mechanism responsible for GIFBE. The second gm peak shown in Fig. 1 was also analyzed as a function of temperature in the range of 303 K to 453 K. Fig. 4(a) shows that the second peak amplitude becomes smaller and shifts left as temperature increases. This reduction is ascribed to an increase in recombination rate in the source and drain junctions as temperature increases [10]. To investigate the second gm peak shift, the IB–VG curve as a function of temperature was also measured and is shown in Fig. 4(b) for comparison. It shows that the left-shift trend of IB against temperature is similar to that of the second gm peak. However, IBhas no significant change after a VT correction for different temperatures, as shown in the inset of Fig. 4(b). The results provide further evidence that hole injection from the anode is direct tunneling because it is independent of temperature.
IV. CONCLUSION
In this letter, we have demonstrated that the EVB tunneling model is not the dominant mechanism for GIFBE. Even if oxide thickness is reduced to only 12 Å, EVB still cannot occur in S/D floating operation. Therefore, GIFBE can be attributed to the electrons of the inversion layer supplied from the S/D. This result indicates that the increase of HVB tunneling current induced by AHI is the dominant mechanism responsible for GIFBE. By analyzing IBas a function of temperature, we also prove that the hole current(IB) is direct tunneling from the poly
gate. This is because IB is independent of temperature after a VT correction.
ACKNOWLEDGMENT
Part of this letter was performed at United Microelectronics Corporation.
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