• 沒有找到結果。

Single-chip FPGA implementation of a sensorless speed control IC for permanent magnet synchronous motors

N/A
N/A
Protected

Academic year: 2021

Share "Single-chip FPGA implementation of a sensorless speed control IC for permanent magnet synchronous motors"

Copied!
6
0
0

加載中.... (立即查看全文)

全文

(1)

Single-chip FPGA Implementation of a Sensorless

Speed Control IC for Permanent Magnet

Synchronous Motors

Yen-Chuan Chang and Ying-Yu Tzou, Member, IEEE

Power Electronics Systems and Chips Lab. Advanced Power Electronics Center Department of Electrical and Control Engineering

National Chiao Tung Univ., Hsinchu, Taiwan

AbstractThis paper presents a single-chip FPGA

implementation of a speed sensorless control IC with flux-linkage estimation algorithm for permanent-magnet synchronous motors (PMSM) with sinusoidal flux distribution. By using hierarchical and modular realization strategy, each functional block for the digital sensorless IC is designed as a reusable IP with FPGA implementation. The digital sensorless IC is configurable with its modular blocks and is programmable with its control registers via a serial interface to fit various applications without complicated software programming as realized by using conventional DSP or microcontrollers. The sensorless algorithm implemented uses the incremental values of flux linkage, the normalized back-EMF voltage, and the estimated peak back-EMF value to estimate the incremental rotor position. An internal closed-loop correction mechanism within this algorithm can automatically correct the rotor position estimation drift, which could be resulted by the quantization error, circuit nonlinearities, and sampling noises. An initial rotor position detection scheme with ramping speed control has been developed for startup control. Experimental verification has been carried out on a sensorless spindle motor drive system for DVD applications.

Index Terms—sensorless operation, start-up, FPGA, PMSM,

digital control IC.

I. INTRODUCTION

Permanent-magnet synchronous motors (PMSM), due to its high ratio of torque to weight, low noise, fast response, high efficiency and easy maintenance, are wildly used in many high-performance speed and position controlled applications. Usually, absolute encoders or Hall effect sensors are attached to the shaft of the motor to detect the rotor position. However, there also exists some disadvantages such as additional installation of the sensors and signal conditioning circuit, sensitive to magnetic noises, and unsuitable for high temperature application environment. To prevent the above problems, many sensorless techniques are presented to develop reliable and low cost control strategies for PMSMs [1].

With the rapidly development of integrated circuit, digital motor control systems have been widely implemented with software based on microcontrollers or digital signal processors [2]. These approaches provide flexibility and are suitable for

many applications. However, this control scheme suffers from a long period of development and requires a high sampling rate to achieve a wide bandwidth performance. In recent years, FPGA-based hardware implementation technology has been used to motor control systems due to the advantages of their programmable hard-wired feature, fast time-to-market and reusable IP (Intellectual Property) cores. Besides, the FPGA-based system can get a very high speed level, since it can carry out parallel processing by means of hardware mode. Therefore, many research in ac motor drives have been developed with FPGA [3]-[5].

The research goal of this paper is to design a programmable speed sensorless control IC, which can be used for not only speed spindle motor drives, but also other high-performance applications with PMSMs. Fig. 1 shows the system block diagram of the speed control system using the proposed sensorless IC. It contains all the blocks needed for realization a PMSM drive system, such as sinusoidal PWM modulation, sensorless position estimator, digital controller, initial position estimator and analog-to-digital read-out interface. By using the hierarchical and modular realization strategy, every block in FPGA is designed toward a specific function of control law, and has its own registers which can be configured by users to build up a control system according to different applications. Unlike traditional DSP or microcontrollers, users do not need to design software programs to develop control algorithms. Therefore, it takes

Vdc S1 S2 S3 S4 S5 S6 A/D S1 S2 S3 .S4 S5 .S6 PMSM Host Register Interface Sinusoidal PWM Modulator Digital Controller Sensorless Speed Estimator ADC Serial Interface Initial Position Derection and Start-up A/D FPGA-Based Control IC Host Controller Vdc S1 S2 S3 S4 S5 S6 A/D S1 S2 S3 .S4 S5 .S6 PMSM Host Register Interface Sinusoidal PWM Modulator Digital Controller Sensorless Speed Estimator ADC Serial Interface Initial Position Derection and Start-up A/D FPGA-Based Control IC Host Controller

Fig. 1. Block diagram of a sensorless speed control system with the proposed FPGA implementation architecture.

This work was supported by the National Science Council, Taipei, Taiwan, R.O.C. Project no. NSC 95-2221-E-009-338-MY3.

(2)

little effort building up a control system, and provides a flexible and fast time-to-market solution for high-performance PMSM motor drives without Hall effect sensors.

II. ARCHITECTURAL REALIZATION AND DESIGN

CONSIDERATIONS

A. System Configuration

Fig. 2 shows the internal architecture of the FPGA-based sensorless control IC. The developed sensorless control IC consists of four major control blocks: a speed controller, a field-oriented torque controller, a sensorless position estimator, and an initial position estimator. The speed controller is used to regulate the desired speed and generate the torque command which is multiplied by the estimated back-EMF to produce phase current command. In this way, the flux-oriented torque control is achieved by generating current references in the three-phase stationary frame without the stationary-to-rotating reference frame transformation and its inverse.

The rotor position information is obtained by the sensorless algorithm based on the incremental flux-linkage and the speed is calculated by differentiate the position. The initial rotor position estimator and start-up block is used to make a smooth sensorless starting process. The rotor position at standstill is estimated first, and then an open-loop control is used to speed up the motor. Moreover, in order to configure the registers in the control IC, a host register interface by serial communications is made. System constructers can setup registers of every block in the control IC by a Graphical User Interfaces (GUI) program in Matlab on PC. Fig. 3 shows the functional block diagram of the sensorless speed control IC. B. Principle of Position Sensorless Estimation

The sensorless algorithm realized in the control IC uses the incremental values of flux linkage, the normalized back-EMF functions and the estimated back-EMF peak value to calculate incremental rotor position [6]. An internal closed-loop correction mechanism within this algorithm can correct rotor position estimation drift, which could due to quantization error of digital processing or measurement noise. Form [6], the incremental rotor position value can be obtained as

) ˆ ( ) ˆ ( ) ˆ ( ) ˆ ( ) ˆ ( ) ˆ ( ) ˆ ( ) ˆ ( ) ˆ ( ˆ e a e c e c e b e b e a e a c e c b e b a E e e e e e e e e e e K P T T T T T T T \ T \ T \ T   '  '  ' '    (1)

where P is the number of pole pairs, KEis the back-EMF

constant,!'\a,'\band'\care defined as the flux linkage

increments within the sampling interval of each phase, Tˆ is e

the estimated electrical rotor position, ea, eb and ec are the

normalized estimated back-EMF functions that vary with rotor position. For a sinusoidal back-EMF three-phase motor,

  ea(Tˆe)eb(Tˆe)eb(Tˆe)ec(Tˆe)ec(Tˆe)ea(Tˆe) 0.75   (2)

is always valid, Hence, (1) becomes

)] ˆ ( ) ˆ ( ) ˆ ( [ 75 . 0 ˆ e a c e c b e b a E e e e e K P T \ T \ T \ T ' ' '  '   (3)

The incremental electrical rotor position can also be calculated by E est e K E P T ˆ ˆ 'T (4)

where Test is the sampling time and Eˆ is the estimated peak

back-EMF voltage. By combining (4) with (3), the estimated rotor position can be expressed as

>

@

E T e e e K P est e a c e c b e b a E e ˆ ) 1 ( 75 . 0 ) ˆ ( ) ˆ ( ) ˆ ( 75 . 0 ˆ O T \ T \ T \ O T   '  '  '  ' (5)

where Ȝ is a weighting factor. Assuming that the previous value

of rotor position is known, an updated value of the rotor position estimation can be written as

) ( ˆ ) 1 ( ˆ ) ( ˆ k k k e e e T T T  ' . (6)

After the position is estimated, the normalized back-EMF

functions ea, eb and ec are acquired from a sine look-up table

and feed back to (5) to calculate the incremental position during the next sampling time. This forms a closed-loop correction mechanism which can correct the estimated rotor position at each sampling period.

C. Initial Position Detection and Start-up

The digital realization of a simple initial position detecting method has been developed to fulfill low-cost sensorless PMSM drive applications [7]. The principle of the method is based on the variation of the DC-link current response caused by the magnetic saturation of the stator core. When applying a DC voltage to the windings and producing a magnetic field aligned with the rotor field. The inductance of the wildings will decrease. Therefore, the rising time of the current will increase.

Sensorless Speed Estimator PWMmode Deadtime PWMperiod CKp CKi CLim SKp SKi Accel Rate Decel Rate A B ө

SHigh SLow SLim

ADC_CLK PWM1 PWM3 PWM4 PWM5 PWM6 PWM2 ADC_CS ADC_DIN ADC_DOUT Speed Feedback BackEmf Function Phase Voltage Phase Current Speed Controller Current Controller Command Generator DC-Link Current Configuration Registers ADC Serial Interface Sinusoidal PWM Modulator Host Register Interface TxD RxD CLK GND VDD Initial Position Detection and Start-up C 

Fig. 3. Functional block diagram of the sensorless speed control IC.

Phase Current Command Modulators Back-EMF Function Generator Rotor Position Estimator * I * a i * b i * c i ˆ e T c i b i a i Speed Controller Current Controllers * a v * b v * c v

Sensorless Speed Estimator

A/D Interface Offset and Scaling A/D (ADS7844) PMSM Host register interface Configuration Registers Initial Rotor Position Detection and Start-up DC-Link Current iDC-Link SPWMDeadtime SPWMDeadtime FPGA-Based Control IC Host Controller Host Controller * Z Zˆ a e eb ec d/dt

(3)

The initial position of the magnetic pole can be determined by this rule. Fig. 4 shows the twelve voltage vectors applied in the initial estimation process. The voltage vector which maximum value of the DC-link current occurs represents where the permanent magnetic pole is located.

This method does not depend on the motor model, and is robust to motor parameter variations. Thus, it is suitable to the control IC for different applications. After the initial rotor position is determined by the proposed method, an open-loop starting method is used to speed up the motor until a given speed at which the rotor position estimation is sufficiently accurate. The starting procedure is shown in Fig. 5.

III. DIGITAL REALIZATION OF THE FUNCTIONAL BLOCKS

A. PWM Generator

A 12-bit digital three-phase complementary PWM generator with configurable PWM frequency and deadtime is

implemented in the control IC. Three compare registers Da, Db

and Dc are used to hold the modulating values, and they are

constantly compared with the value of the timer counter TCNT as shown in Fig. 6. In this way, the output pulse is generated whose on (or off) duration is propositional to the value in the compare registers. The PWM generator can be set as asymmetric or symmetric mode, and once the PWM mode is selected the period is determined by the maximum value that the timer counter counts. Fig. 7 shows the hardware circuit of the PWM generator. In order to prevent short circuit in the DC-link voltage, the deadtime should be inserted when a transistor is turning on. A 7-bit deadtime generator is implemented, and for a 40 MHz system clock, it can generate a time delay from 0

to 3.2 ȝs. Fig. 8 shows the hardware circuit of the deadtime

generator.

B. Speed Controller

The speed loop is regulated by the digital PI control law, which is formulated as ] [ ] [ ] [k Pk I k u  (7)

where the proportional term is

)] ( ˆ ) ( [ ] [k K * k k P ps˜Z Z (8)

and the integral term is

] 1 [ )] ( ˆ ) ( [ ] [ *    ˜ k k I k K k I is Z Z . (9) In (8) and (9), *

Z is the speed command, Zˆ is the feedback

estimated speed and Kps, Kis are the proportional and integral

gain, respectively.

Fig. 9 shows the hardware structure of the PI controller. In order to reduce the whole chip size, a scheduling strategy for realizing the PI controller by using finite-state-machine is used. Only one multiplier and one adder are required to execute the

PI control. The bit length of the PI controller is 16-bit, and Kps,

Kis are in Q-10 format. There are two saturation limiters in Fig.

9. The anti-windup limit at the output of the integrator is to

Va Vb Vc 0V Ȑ2ȑ VDC Va Vb Vc Va Vb Vc 0V Ȑ2ȑ VDC Va Vb Vc 0V 0V Ȑ3ȑ VDC Va Vb Vc Va Vb Vc 0V 0V Ȑ3ȑ VDC 0V Va Vb Vc Ȑ4ȑ VDC 0V Va Vb Vc Va Vb Vc Ȑ4ȑ VDC 0V Va Vb Vc Ȑ6ȑ VDC 0V Va Vb Vc Va Vb Vc Ȑ6ȑ VDC 0V 0V Va Vb Vc Ȑ7ȑ VDC 0V 0V Va Vb Vc Va Vb Vc Ȑ7ȑ VDC Va Vb Vc 0V Ȑ8ȑ VDC Va Vb Vc Va Vb Vc 0V Ȑ8ȑ VDC 0V Va Vb Vc Ȑ5ȑ VDC VDC 0V Va Vb Vc Va Vb Vc Ȑ5ȑ VDC VDC Va Vb Vc 0V Ȑ9ȑ VDC VDC Va Vb Vc Va Vb Vc 0V Ȑ9ȑ VDC VDC Va Vb Vc 0V Ȑ10ȑ VDC Va Vb Vc Va Vb Vc 0V Ȑ10ȑ VDC Va Vb Vc 0V 0V Ȑ11ȑ VDC Va Vb Vc Va Vb Vc 0V 0V Ȑ11ȑ VDC Va Vb Vc 0V Ȑ12ȑ VDC Va Vb Vc Va Vb Vc 0V Ȑ12ȑ VDC Va Vb Vc VDC 0V Ȑ1ȑ VDC Va Vb Vc Va Vb Vc VDC 0V Ȑ1ȑ VDC 

Fig. 4. Twelve voltage vectors used in the estimation process.

Speed Time (3) Closed-Loop (2) Open-Loop (1) Estimation Speed Time (3) Closed-Loop (2) Open-Loop (1) Estimation

Fig. 5. The starting procedure.

Da Upper PWM Lower PWM Deadtime PWM1 PWM2 PWM_period PWM_mode TCNT ON Off 

Fig. 6. Timing diagram of the PWM generator.

register Less_Than clk Servo Da, Db, Dc 12 12

Mux Upper PWM output

PWM_period PWM_mode 12 bits Up/Up-down Counter Mux 0 1 1 0 0 0 0 0 register Lower PWM output A B TCNT

Fig. 7. Hardware circuit of the PWM generator.

PWM_in A B deadtime 7 7 7 7 7 7 7 00 PWMx 0 0 D Q D Q Mux 1 0 Mux 1 0 Mux 0 1 7-bit Counter clk register register Less_Than

(4)

prevent unwanted overshoot caused by the inertial property of the integrator. The output limit of PI the regulator is directly sent to the current regulator, thus it limits the maximum torque command.

C. Field-oriented Torque Controller

Fig. 10 shows the block diagram of field-oriented torque control loop with PI controller. The phase current should be aligned in phase with the back-EMF waveforms so as to

achieve high torque/current ratio. The current command I* from

speed controller is first multiplied by ea , eb and ec, where ea , eb

and ecare the estimated back-EMF functions that vary with

rotor position, then PI controllers are used to generate the duty

Da, Db and Dc, which will be sent to the PWM generator and

sensorless position estimator.

In order to reduce the whole chip size, a scheduling strategy for realizing the field-oriented torque control is used by using finite-state-machine. Only one multiplier and one adder are required to execute the PI control law as shown in Fig. 11. D. Sensorless Position Estimator

In the algorithm of the sensorless position estimation, the

incremental flux linkage '\a in (5) can be represented as

an a

est a

a v Ri ˜T L'i

'\ . (10)

The line-to-neutral voltage

v

an,

v

bnand

v

cnis indispensable in

computing the increased flux linkage. However, it is inconvenient and increases cost if we obtain them by feeding

back line voltage and neutral voltage. Thus, in (10),

v

an is

calculated by the Duty of PWM generator alternatively. Then (10) can be written as » ¼ º « ¬ ª '  ˜ ¸ ¹ · ¨ © §  ' v a a(AD) est a(AD) c c a T i L R i D K R K K L \ (11)

where van DauKv, Da is the duty of phase a, Kvis the

inverter gain, Kcis the current sensing gain and ia( AD)is the

result read from A/D converter. The flux linkage '\b and

c \

' can be represented in the same manner as (11), then (5)

becomes

@

>

^

@

>

@

>

`

DZ T ˆ ) ( ) ( ) ( ˆ ) ( ) ( ) ( ) ( ) ( ) (  ˜ '  ˜   ˜ '  ˜   ˜ '  ˜  ˜ ' a AD c AD c c c AD b AD b b b AD a AD a a e e i A i CD e i A i CD e i A i CD B (12) where   LTest R A          KEKc PL B 75 . 0  O  v c K R K C u        ) 1 ( O D PTest    

Fig. 12 shows the block diagram of the sensorless position

estimator. The four parameters A, B, C and Į should be

calculated in advance to simplify the estimation process. The unit of

e

' in (12) is in radians, and one revolution (0~2ʌ) is

- X * I a I X + + Lim ) 1 (k a ) (k a Lim a e X b I b e X -X X + Lim + Lim Lim ) (k b ) 1 (k b a D b D c D S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 Idle Idle pc K pc K ic K ic K 0 - -

Fig. 11. The computation steps of the current control loop.

a \ ' b \ ' c \ ' Flux Linkage Increments Calculation Rotor Position Increment Estimation Back-EMF Function Generation a i 1  z b i ic ˆ e T ' Tˆe d dt a e D b e ec a DDbDc A C B Zˆ

Fig. 12. Block diagram of sensorless position estimator.

S0 S1 Da ia(k) A A A B S2 S3 S4 S5 S10 S11 S12 S13 S14 ǩ Db Dc ib(k) ic(k) eb ec ea Zˆ -) ( ˆ k T ' ) 1 ( ˆk T ) ( ˆ k T + + + -S6 S7 S8 S9 -ia(k-1) ib(k-1) ic(k-1) C X C C X X X X X X X X X X Idle Idle + S0 S1 Da ia(k) A A A B S2 S3 S4 S5 S10 S11 S12 S13 S14 ǩ Db Dc ib(k) ic(k) eb ec ea Zˆ - --) ( ˆ k T ' ) 1 ( ˆk T ) ( ˆ k T + + ++ + + --S6 S7 S8 S9 --ia(k-1) ib(k-1) ic(k-1) C X C C X X X X X X X X X X Idle Idle + +

Fig. 13. The computation steps of the sensorless position estimator.

] [ * k Z Zˆ k[ ] Kis X Limiter X Limiter + + + + + + + + + -+ -z-1 ] [k u ] [k e ps K ] [k P I[k]

Fig. 9. Hardware structure of the PI controller.

a D b D c D a I b I + + -PI PI -X * I ea X b e

(5)

scaled to 0~8000 in the sensorless estimator. Thus, the

parameter B and Į should multiply by 8000/2ʌ. The normalized

estimated back-EMF function ea, eb and ec are generated from a

500 points sine-table with Q-9 format. Fig. 13 shows the computation steps of the sensorless position estimator. A binary format is used with a variable word-size approach [8], which permits to reduce truncation errors through calculation process. Besides, by using finite-state-machine method, only one 32-bit multiplier and one 32-bit adder are needed in the sensorless position estimator. To verify the sensorless estimator design in VHDL, a co-simulation with Matlab, PSIM and Modelsim is applied. A sensorless motor drive system is constructed in Matlab by linking PSIM and Modelsim. The parameters of tested motor and sensorless estimator in simulation are in Table I and Table II respectively. Fig. 14 shows the simulation result under 2000 rpm operation with or without noise on three phase current. The estimated error is about 3 electric degrees and the noise on phase current has little influence on the estimated results.

E. Initial Position Detection

The initial rotor position is detected by comparing the DC-link current after injecting twelve directions of voltage vectors successively. Fig. 15 shows the timing diagram of the testing voltage vectors. The time interval between the voltage vectors is 1 ms and the whole estimation time is about 12 ms. A counter CNT1 is used to count the time interval and two registers V1_time and V2_time are compared with it to determine the time duration of the voltage vectors. At the end of the voltage vector, the ADC is enabled by the signal ADC_CS to sample the peak current at DC-link side. No motor parameters have to be known during the detection process

except that the output time of the voltage vectors should be determined by user. Fig. 16 shows the hardware structure of the initial position detection circuit.

IV. EXPERIMENTAL RESULTS

The proposed control IC has been realized by an Altera EP1C12F256C8, and the total logic cells are about 5550 of total 12060 (46%). The designed IC can operate at 40MHz system clock, and all control parameters are configured via the serial communication port by a host PC. A program designed by GUI in Matlab is used to setup the registers as shown in Fig. 17. 0.170 0.18 0.19 0.2 0.21 0.22 0.23 0.24 0.25 0.26 200 400 Thet a (e le c. degr ee) 0.170 0.18 0.19 0.2 0.21 0.22 0.23 0.24 0.25 0.26 2 4 6 Thet a err or (el e c . de gree )

Estimated Theta Real Theta

0.17 0.18 0.19 0.2 0.21 0.22 0.23 0.24 0.25 0.26 -0.5 0 0.5 Time(sec) P hase Cur rent (A ) 20% noise 40% noise without noise

Fig. 14. Simulation results of the sensorless estimator with or without noise on the phase current.

CNT1 CNT2 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 ADC_CS 1 ms V1_time V2_time CNT1 CNT2 PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 ADC_CS 1 ms V1_time V2_time ON Off

Fig. 15. The timing diagram of the twelve testing voltage vectors.

IDC_link IDCpeak detect if CNT1=40000 if CNT1=39950 clr clr clr clk D Q CNT1 adder D Q Less_Than CNT2 adder D Q D Q D Q Less_Than 1 0 D Q ADC_CS CNT2[0] D Q Less_Than D Q CNT2 PWM 12 16 16 16 16 16 16 16 16 16 6 6 6 6 4 4 EN EN reset reset reset Initial_Position 1 A A A A B B B B A B 0 1 0 1 0 1 0 1 0 1 0 12:1 Mux Mux Mux Mux Mux Mux cs clk clk clk clk clk clk clk 12 P W M P at te rns 0 0 register 0 0 register 0 0 register 4 12 1 1 register 1 1 register V1_time V2_time 12 4

Fig. 16. Hardware circuit of the initial position detection.

Fig. 17. Graphical user interface in Matlab. TABLE I

PARAMETERS OF THE TESTED MOTOR

3-phase permanent magnet synchronous motor

Type Y-connection, 12 poles

Rated voltage 12 V Stator resistance 0.6 : Stator inductance 0.102 mH Back-EMF constant 0.423 mV/rpm Rotor inertia 1.056u10-6 kg

˜

m2

Mech. time constant 0.27 sec TABLE II

PARAMETERS SETTING FOR SIMULATION

Real value Implement value Error

A 0.049 100 (Q11) 0.39%

B 0.1889 193 (Q10) 0.23%

C 6.347 53 (Q3) 0.38%

(6)

To test the performance of the servo controller, a DVD spindle PMSM is driven under 20 kHz PWM frequency. The sampling rate of the current loop and speed loop are 20 kHz and 2 kHz respectively. The estimated speed is compared with the speed calculated from linear Hall sensor signals. Fig. 18 shows the steady state speed response under speed command 1000, 3000 and 6000 rpm. The estimated speed is compared with the statistics of the average speed calculated from linear Hall sensor in a random period of time. Fig. 19 shows the start-up response form standstill to 2000 rpm, where the open-loop control scheme is used below 500 rpm. It can be seen that the error between the real and estimated position is large at low speed, and it decreases during the accelerating procedure. By detecting the motor position at standstill, the start-up process is smooth without temporary reversing rotation. Fig. 20 shows the response of a ramp command from 500 to 7000 rpm with the acceleration rate of 40 rpm per millisecond. Fig. 21 shows the response of a step command from 5500 to 6000 rpm where the transient time is about 30 ms without overshoot.

V. CONCLUSION

This paper presents a digital sensorless speed control IC, which can provide a simple and feasible solution for PMSM motor drives from standstill to full speed operation with fast and robust responses. The proposed control IC has been realized by an Altera EP1C12F256C8 FPGA device, and the total logic cells are about 5550 of total 12060 (46%). This provides the possibility of manufacturing low-cost digital

sensorless PMSM/BLDC motor control ICs using ASIC technology. Experiment results show that the starting process is smooth without reversing rotation, and the speed ripple is about 1% under steady-state operation. By using the GUI interface, it is easy to setup the parameters in the control IC, and is suitable to different motors. A fully digital speed sensorless control system for PMSMs from standstill to high speed has been achieved by the proposed control IC.

REFERENCES

[1] P. P. Acarnley and J. F. Watson, “Review of position-sensorless operation of brushless permanent-magnet machines,” IEEE Trans. Ind. Electron., vol. 53, no. 2, pp. 352-362, Apr. 2006.

[2] T. M. Jahns, “Motion control with permanent-magnet AC machines,”

IEEE Proc., vol. 82, no. 8, pp. 1241-1252, Aug. 1994.

[3] J. Moutinho, R. E. Araujo, and V. Leite, “Low cost control and monitoring motion control ICs,” IEEE Electrotechnical Conf., pp. 1138-1141, May 2006.

[4] L. Charaabi, E. Monmasson, M. Nassani, and I. Slama-Belkhodja, “FPGA-based implementation of DTSFC and DTRFC algorithms,” Industrial

Electronics Society,IECON 2005. 32nd, pp. 245-250, Nov. 2005.

[5] Zhaoyong Zhou, Tiecai Li, T. Takahashi, and E. Ho, “FPGA realization of a high-performance servo controller for PMSM,” IEEE APEC, vol. 3, pp. 1604-1609, 2004.

[6] L. Ying and N. Ertugrul, “A novel, robust DSP-based indirect rotor position estimation for permanent magnet AC motors without rotor saliency,” IEEE Trans. Power Electron., vol. 18, no. 2, pp. 539-546, Mar. 2003.

[7] Yen-Chuan Chang and Ying-Yu Tzou, “A New Sensorless Starting Method for Brushless DC Motors without Reversing Rotation,” IEEE

PESC Conf., in press, 2007.

[8] S. Ferreira, F. Haffner, L. F. Pereira, and F. Moraes, “Design and prototyping of direct torque control of induction motors in FPGAs,”

Integrated Circuits and Systems Design,SBCCI Proc, pp. 105-110, 2003.

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 5900 5950 6000 6050 6100 Time(sec) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 2960 2980 3000 3020 3040 S peed( rp m ) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 990 995 1000 1005 1010

Estimated Speed Average Speed from Statistics

Fig. 18. Steady-state speed response.

0.4 0.5 0.6 0.7 0.8 0.9 1 0 1000 2000 S p ee d( rp m ) 0.4 0.5 0.6 0.7 0.8 0.9 1 0 200 400 Th e ta (e le c . de gr ee ) Estimated Speed Speed from Hall Speed command

Position from Hall Estimated Position 0.4 0.5 0.6 0.7 0.8 0.9 1 0 100 200 Time(sec) T h et a er ro r (e le c . d egr ee )

Fig. 19. Start-up response from standstill to 2000 rpm.

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0 2000 4000 6000 S p ee d( rp m ) Estimated Speed Speed from Hall Speed Command 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -1 -0.5 0 0.5 1 Time(sec) Phase Cuerr ent(A)

Fig. 20. Ramp response from 500 to 7000 rpm.

0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 5400 5600 5800 6000 S p eed (r pm ) 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 -1.5 -1 -0.5 0 0.5 1 1.5 Time(sec) P h as e C u rr e nt (A ) Speed command Estimated Speed Speed from Hall

數據

Fig. 1.    Block diagram of a sensorless speed control system with the proposed  FPGA implementation architecture.
Fig. 3.    Functional block diagram of the sensorless speed control IC.
Fig. 9 shows the hardware structure of the PI controller. In  order to reduce the whole chip size, a scheduling strategy for  realizing the PI controller by using finite-state-machine is used
Fig. 14.    Simulation results of the sensorless estimator with or without noise  on the phase current
+2

參考文獻

相關文件

Type case as pattern matching on values Type safe dynamic value (existential types).. How can we

“IEEE P1451.2 D2.01 IEEE Draft Standard for A Smart Transducer Interface for Sensors and Actuators - Transducer to Microprocessor Communication Protocols

This paper proposes a set of graph algorithm to improve the application of hill-climbing, Tested to speed up the program execution time is about 3.5 times speed up

This thesis makes use of analog-to-digital converter and FPGA to carry out the IF signal capture system that can be applied to a Digital Video Broadcasting - Terrestrial (DVB-T)

This thesis adopts GUI (Graphic User Interface ) user's figure interface method, to created a figure interface that integration testing, correspondent with the change that digital

Then, these proposed control systems(fuzzy control and fuzzy sliding-mode control) are implemented on an Altera Cyclone III EP3C16 FPGA device.. Finally, the experimental results

H..  In contrast to the two traditional mechanisms which all involve evanescent waves, this mechanism employs propagating waves.  This mechanism features high transmission and

(A) AGP ( advanced graphics port ) (B) IDE ( integrated drive electronics ) (C) SATA ( serial at attachment ). (D) SCSI ( small computer system interface