• 沒有找到結果。

CHAPTER 5 CONCLUSIONS

5.2 F UTURE W ORK

In this thesis, we have two versions of the A/D converter circuit design. We just send the first version A/D converter for tape-out and there are some design considerations which are not paid an attention. We give some recommendations and improvement in this section. First, circuit simulation time is too long to waste a lot of time. In order to eliminate the long simulation time by HSPICE or SPECTRE, the behavior model can be constructed by MATLAB/SIMULINK to understand the influence on the A/D converter due to device mismatches and also realize the dynamic performance of the A/D converter. Second, the high speed testing is difficult for digital output. In order to have a better measurement performance, the digital output signal can be decimated at A/D converter output for measurement or design low-voltage differential signaling (LVDS) drivers at digital outputs for high speed digital applications. Finally, the second version of the A/D converter circuit design will be for next time tape-out and will get better performance in the future work.

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Appendix

The first cross-coupling type S/H configuration

Figure A. 1 The first cross-coupling type S/H Configuration

Gain analysis:

Figure A. 2 The small signal of the first cross-coupling type S/H for gain calculation

2

From figure, use superposition method and then the single output voltage is given by

2

Figure A. 3 The small signal of the first cross-coupling type S/H for 3db frequency calculation

)

The second cross-coupling type S/H configuration

V

Figure A. 4 The second cross-coupling type S/H Configuration

Gain analysis:

Figure A. 5 The small signal of the second cross-coupling type S/H for gain calculation

From figure, use superposition method and then the single output voltage is given by

'

1 )

Figure A. 6 The small signal of the second cross-coupling type S/H for 3db frequency calculation

)

and 3db frequency is given by

)

簡 歷

姓 名: 陳世基

性 別: 男

籍 貫: 台灣省新竹縣

生 日: 西元1973 年 2 月 7 日

地 址: 新竹縣竹北市新光街 31 巷 6 號

學 歷: 國立交通大學 電機學院 電子與光電學程 碩士班 2003/09 ~ 2007/06

私立高雄工學院 電子工程學系 1992/09 ~ 1996/06 經 歷: 鈺創科技股份有限公司 測試工程師 2000/06 ~ 2006/09 科榮股份有限公司 設備工程師 1998/06 ~ 2000/04 論文題目: A Low-Power High-Speed A/D Converter Design for UWB Wireless

Applications

超寬頻無線網路應用之低功率高速類比數位轉換器設計

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