Direct-conversion Receiver

The direct-conversion receiver (DCR) [Fig. 2.1] is also called “homodyne” or

“zero-IF” architecture because that the RF signal transfers to output and is down- converted to zero-frequency. Shown in Fig. 2.2 is a simple frequency conversion of DCR, where the local oscillator (LO) frequency is equal to the input radio frequency (RF) carrier and the channel selection requires only a low-pass filter with relatively sharp cutoff characteristics [2]. This architecture was invented many decades ago, and was improved greatly in recent years. The reasons that this architecture has recently become the topic of active research, perhaps to a much greater extent than before are accounted for this renaissance:

subsequent down-conversion stages are replaced with low-pass filters, in principle, lends itself to monolithic integration much more easily than heterodyne receivers;

(2). The problem of image is circumvented because of ω_IF =0. As a result, no image filter is required, and the LNA need not drive a 50- load for off-chip SAW filters;

(3). Direct-conversion architecture’s past failures arose primarily from effects that could not be removed in discrete implementations, but may be controlled and suppressed in integrated circuits.

In other words, direct-conversion architecture is one of few reception techniques whose drawbacks can be remedied through the use of only more transistors [3].

Nevertheless, the DRC direct translation of the spectrum to zero frequency entail a number of issues that do not exist or are not as serious in a heterodyne receiver. One of the most serious issues is the DC-offset issue.

2.1.1 DC-Offset Issue in Direct-Conversion Receiver

Since in the direct-conversion topology, the down-converted band extends to zero frequency, extraneous offset voltage can corrupt the signal and, more importantly, saturate the following stages. To understand the origin and impact of DC-offsets, consider the receiver shown in Fig. 2.3, where the LPF is followed by an amplifier and an A/D converter. The LPF would not decrease the DC-offset value, and it can easy saturate the following stage. The DC-offset is caused by three sources mainly.

(1). Self-mixing due to LO Leakage [Fig. 2.3(a)]:

The isolation between the LO port and the input of the mixer and the LNA is finite. This effect arise from capacitive feed-through and substrate coupling and, if the

LO signal is provided externally, bond wire coupling. The LO signal leaks into point A or point B, and is reflected at the output port of RF amplifier and at the antenna connector. The reflected LO signal is self-mixed at the mixer and results in DC-offset [4]. In most receiver architectures, the LO signal power level is much greater than RF signal power level. That means, in designing of DCR, it always considers the restriction of the mixer LO-to-RF input isolation and the low-noise amplifier (LNA) reverse isolation to avoid the base-band output with large DC-offset which will saturate the following stage. This is the main DC-offset generator in DRC architecture.

(2). Self-mixing due to large interferer in RF port [Fig. 2.3(b)]:

This is similar to former because that isolation between the LO port and the input of the mixer and the LNA is finite. The effect occurs if a large interferer leaks from the LNA and mixer LO input, point C, and is multiplied by itself to result in DC-offset.

(3). Mismatch of component:

The mismatch of differential pair also cause DC-offset in output. This can be solved by mismatch compensation circuit design.

For example: the total gain from the antenna to point X is typically around 80 to 100 dB so as to amplify the microvolt input signal to a level that can be digitized by a low-cost, low power analog-to-digital converter (ADC). Of this gain, typically 25 to 30 dB is contributed by the LNA/mixer combination.

With the above observations, we can obtain a rough estimated of the offset resulting from self-mixing to appreciate the problem. Suppose in Fig. 2.3 (a) the LO signal has a peak-to-peak swing of 0.63V (0 dBm in a 50 system) and experiences an attenuation of 60 dB as it couples to point A. If the gain of the mixer is on the order

of 10mV, we also note that the desired signal level at this point can be as low as approximately 30 Vrms. Thus, if directly amplified by the remaining gain of 50 to 70 dB, the offset voltage saturates the following circuits, there by prohibiting the amplification of the desired signal [2].

2.1.2 Quantification of Self-Mixing DC-Offset

Fig. 2.4 shows the self-mixing mechanism. The LO frequency is set at the same frequency as the received signal frequency, and the received signal is down-converted to base-band directly. The LO signal leaks to the RF signal input port of the mixer and is reflected at the output port of the low noise amplifier (LNA) and at the antenna.

The reflected LO signal is down-converted at the mixer and results in a DC-offset.

The offset voltage at the mixer output due to self-mixing V is described by _self

BB amplifier output port, and G_LO−BB is the conversion gain of the mixer from LO signal frequency to base-band. The RF amplifier gain is often switched depending on received signal strength. Therefore, the self-mixing output is not a stable DC-offset.

The equation (2.1) suggests three ways to reduce the offset V . The first is _self reducing LO signal leakage V . The second is reducing _leak R_amp. Note that the R_amp is varied depending on the electromagnetic environment of the antenna and the reverse and/or forward gains of the RF amplifier, and it is difficult to realize extremely small R_amp practice. The last is reducing the conversion gain G_LO−BB. In the usual direct-conversion case, reducing conversion gain does not improve desire-

signal to undesired-signal ratio, therefore a raw output offset voltage cannot be a

describe the efficient realization of these conditions by this thesis.

For example, in a typical direct-conversion receiver, assuming the LO signal is -10dBm, -50dBm V from the RF input port (i.e. 40dB isolation), and the -14dB _leak reflection factor at the RF amplifier output (VSWR≈1.5), reflected LO signal is -64dBm (140µV_rms) at mixer input. This is 57dB higher than thermal noise in 200kHz bandwidth from 50 resistor.

2.1.3 To Avoid DC-Offset: Harmonic Mixer

Fig.2.5 (a) shows that the LO self-mixing problem in a DCR arises due to the

situation that LO signal resides at the same frequency as the RF signal. As DC-offset

can’t be easily filtered out without removing any base-band signal because most

modulation schemes contain significant DC and low frequency components. Because

DC-offset is caused by self-mixing of LO signal mainly, one should apparently

separate the RF and LO frequencies in order to avoid the problem.

That means: if LO frequency is separated far away from RF frequency, there is

no DC-offset problem. For the harmonic mixer shown in Fig.2.5 (b), it is the second

harmonic of the LO signal that takes part in the mixing process. In equation (2.2), the

V is zero because the LO leakage in receiving frequency in RF input is zero. As a eq

result, the LO leakage generates no DC component but an output the LO frequency

and can be easily filtered out with a low-pass filter (LPF).

Fig.2.6 shows the typical working principal of a direct-conversion harmonic

mixer. The LO frequency is just in the 1/n of RF frequency. It not only simplifies the

oscillator design consideration but solves the DC-offset issue of DCR. The CMOS

balance harmonic mixer proposed by Zhang [6] generates the second harmonic of LO

frequency by odd harmonic cancellation and mixes it with RF signal in the NMOS

pair which is operating in sub-threshold region. It adopts current injection to decrease

transistor’s current and lower flicker noise. The harmonic mixer proposed by Fang [7]

receives quadrature LO signal with two cascaded transistors and operation as a switch

at twice frequency of LO signal. These works, however, suffer from the low

third-order input intercept point (IIP3) problem and fixed conversion gain.

2.1.4 Others Way to Avoid DC-Offset

This section shows some DC-offset cancellation scheme. DC free coding and DC-offset compensation will be introduced in following paragraph.

2.1.4.1 DC-Free Coding with High Pass Filter

The base-band signal in the transmitter can be encoded such that, after modulating and down-conversing to base-band, it contains little energy near DC. With accessing a high pass filter, the DC-offset problem can be solved by wasting few of signals. Called “DC-free coding,” this is particularly suited to wideband channel, for example, in DECT, where a few kilohertz of the channel can be wasted with no significant drop in the data rate.

2.1.4.2 DC-Offset compensation

This technique exploits the idle time intervals in digital wireless standards to carry out offset cancellation. Shown in Fig.2.7 is an example, where a capacitor C1 stores the offset between consecutive TDMA bursts, while introducing a virtually zero corner frequency during the reception of data. For a typical TDMA frame of a few milliseconds, offset cancellation is performed with sufficient frequency to take into account variations due to moving objects.