Appendix A Board Design
A.3 Layout
Great care was taken in the layout of several sections of the board. The RF section consists of parts that are operating at 1.8 GHz with risetimes on the order of hundreds of picoseconds. The Digital Block runs at a much lower 20 MHz (with one 40 MHz signal), but still required care in layout in order to avoid coupling noise into the RF section. The strategy taken for the Digital Section is as follows: all traces are routed on the topmost signal layer when possible, and kept as short as practical if they are outputs of the IDT72271 or 74LCX541 chips, or the 40 MHz oscillator. In the RF section, all traces are kept to the minimum possible length, and sized to have 50 Ohms characteristic impedance where indicated. Also, sharp corners on these lines have been avoided.
Figure A.2 illustrates a preliminary layout of the Digital and RF sections, and indicates where the Power Block is approximately located. This layout was followed closely in terms of placement, but optimized where possible according to the strategy described above. In the drawing, I have included many of the signal lines, as well as the 3.3 V, 5 V, and 12 V power supply traces in different shades of gray to indicate their respective board layer.
In regards to the grounding strategy, all Ground planes are connected together at numerous points on the board using plated through holes. In line with this strategy, ALL component ground leads are connected to all 3 Ground planes using plated through holes. (this is true throughout the board, not just the RF section). Particular effort was made in the RF section to assure minimum inductance to ground for each component (i.e. plated through holes are placed underneath and immediately next to all ground leads). To increase isolation, all signal traces on the topmost layer (particularly in the RF section) are surrounded (with about 40 Mils distance) with GROUND that is connected to all 3 Ground planes with numerous plated through holes, as illustrated in Figure A.3.
A.3. LAYOUT 191
+ 3.3 V+12 V+5 V 40 Mhz Oscillator VccOUT
En/DisGND d M/A COMSMACONNECTOR
60
1 Vt Vcc Out
VCO Vcc Input Bypass GNDGNDOutput1Output2
Vcc 2
4:1 resistor0603
resistor0603 resistor0603
0603cer cap
GND
in
out GND
Amp
0402res0402res
0402 cap 0402cap
0402cap 0402cap 0402cap
0603 cer cap
0603cer cap
0603cer cap
0603cer cap
0603cer cap
0603 cer cap
0603cer cap
0603cer cap
0603 cer cap
Amp GND
in
out GND 0603
cer cap 0603cer cap
resistor0603 0603 cer cap
cer cap0603 resistor0603 0603cer cap0603cer cap 0603 cer cap
0603 cer cap cer cap0603 Vcc
OE2
O0O1
O2
O3
O4
O5
O6
O7 D2D3D4D5D6D7 D0D1 OE1
GND
LCX541
LCX541 VccOE2O0O1O2O3O4O5
O6
O7
D2 D3 D4 D5 D6 D7 D0 D1 OE1GND IDT72271 WENSENFSVccVccGND
D8
D7
D6D5D4D3D2D1D0 GNDGNDGNDGNDGNDGNDGNDGND
GNDQ1Q2Q3Q4Q5 Q6Q7
Q0VccGNDGND Q8DNCDNC DNCDNCDNCGND VccDNCDNCGNDDNCDNC OERTRENRCLKEF/ORPAEVccHFPAFFF/IRGNDFWFT/SILDMRSPRSWCLK
WEN SEN
FS
Vcc Vcc GND
IDT72271
D8 D7 D6 D5 D4 D3 D2 D1 D0
GND GND GND GND GND GND GND GND GND Q1 Q2 Q3 Q4 Q5 Q6 Q7
Q0
Vcc GND
GND
Q8 DNC DNC
DNC DNC DNC GND
Vcc DNC DNC GND DNC DNC OE
RT REN
RCLK
EF/OR PAE
Vcc HF
PAF FF/IR
GND FWFT/SI
LDMRS
PRS WCLK Vcc
OE2
O0
O1
O2
O3
O4
O5
O6
O7 D2D3D4D5D6D7 D0D1 OE1
GND
HCT541
Vcc OE2
O0
O1
O2
O3
O4
O5
O6
O7 D2D3D4D5D6D7 D0D1 OE1
GND
HCT541
Vcc OE2
O0
O1
O2
O3
O4
O5
O6
O7 D2D3D4D5D6D7 D0D1 OE1
GND
HCT541
Vcc OE2
O0
O1
O2
O3
O4
O5
O6
O7 D2D3D4D5D6D7 D0D1 OE1
GND
HCT541
AmpGND
in out
GND 0603cer cap
0603 cer cap
NC +Vin GND
Noise NC Vout TRIM
AD586 NC OUT A
-IN A +IN A -V
+V OUT B -IN B +IN B
OP279
4 Pin DIN Connector4 Pin DIN Connector 0805resistor0805resistor
0805resistor0805resistor 0805resistor0805resistor
PLL CHIP vdd_ahi
opout
var_ref
ibias
vdd_ahi
vdd_dhi
ser_in
ser_load
ser_clkvdd_dloD-S 0D-S 1D-S 2D-S 3 D-S 7 D-S 4 D-S 6D-S 5 D-S 8 D-S 9 div_outvdd_dhi ref_clk vdd_dhi
vdd_dhivdd_dhidiv_invdd_dhidiv_invdd_dhitune
vdd_dhi GND
GND
GND
220 uF capcase code: G
25 V 470 uF capcase code: G
16 V 220 uF capcase code: G
25 V
470 uF capcase code: G
16 V
GND
in
out GND
Amp
GND
in out
GND
Amp 0603cer cap
0603 cer cap 0603 cer cap
0603 cer cap
0603 cer cap
IBIAS
VAR_REF
VDD_AHI
VDD_RF
VDD_DLO
VDD_DHI
+3.3 V KEY: SIGNAL LAYER 1
SIGNAL LAYER 3 SIGNAL LAYER 2
PIN 1 Board Layout(Mike Perrott (6/96)
POWER BLOCK GOES HERE
0603cer cap
Figure A.2: Preliminary layout of PC board.
Special consideration was made regarding the grounding of the V602MC06 VCO and the PLL CHIP. Each of these packages have metal base packages that serve as ground. Therefore, Signal Layer 1 underneath the VCO is patterned as described in
dd
Figure A.3: Illustration of plated through holes in PC board.
Z-Communications, Inc. Application Note AN-101. The same strategy was applied to grounding of the PLL CHIP.
The 40 MHz oscillator is placed on the back of the PC board to allow a shorter trace length to the associated LCX541 input pin. An approximate placement is shown in Figure A.2.
As mentioned above, only part of the Power Block is shown in the layout diagram;
the rest of it is placed on the right side of the board as indicated by the dashed box.
The layout of this section used the topmost layer as much as possible in order to allow an easy means of accessing the signals in this block (particularly those signals at the interface of the Power Block — IBIAS, VAR REF, etc.).
It should be noted that the board can be mounted to a probe station containing 4 mount points that are spaced 3 by 2 inches apart. The need for these mount points led to holes that are 250 Mil in diameter on the PC board; the portion of the PC board touching the mount points is free of back side components. The location of the mount points are indicated in Figure A.4, which includes relevant dimensions. For practical reasons, only two diagonal probe station holes were cut into the board, as indicated by solid circles in the diagram. Although the board is not screwed into the other two mount points, contact is still be made which requires the back side of the board to be free of components in the area indicated by the dashed squares.
Finally, 4 screw holes, each 250 Mil in diameter, are included on the board for the mounting of stand-offs.