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Prototype System

Chapter 11 Results

11.2 Modulation Performance

11.2.1 Simulation Results

All simulations in this section ignore noise sources other than Σ-∆ quantization noise, and implement the loop filter as an ideal transfer function, rather than the switched capacitor structure used in the prototype. (The removal of such nonidealities allows us to isolate effects due to mismatch from those due to implementation details in the circuits.) All eye diagrams were generated directly from the simulated VCO input signal after it was filtered by a Hamming filter with a cutoff frequency of 7 MHz.

Figure 11.3 displays a simulated eye diagram and output power spectrum for the modulated synthesizer at 1.25 Mbit/s data rate when the PLL transfer function is matched to the compensation filter. The eye diagram indicates that the architecture is capable of excellent modulation performance; its eye is wide open and the frequency deviation is quite close to the ±312 kHz deviation that is expected for GFSK mod-ulation at 1.25 Mbit/s. The small level of ISI present in the eye diagram is caused by the parasitic pole/zero pair, fcp/fz, in the PLL transfer function as discussed in Chapter 6. The simulated power spectrum is close to ideal, but is slightly asymmetric and has higher spectral density than the ideal case at frequency offsets close to 2.5 MHz. The asymmetry is caused by the fact that the open loop gain varies with the modulation data since it is a function of the PLL divide value; this asymmetry will be more noticeable at 2.5 Mbit/s data rate, as will be shown shortly. The spectral density is higher than the ideal case at frequency offsets close to 2.5 MHz because of

11.2. MODULATION PERFORMANCE 169

Σ-∆ quantization noise.

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Simulated Output Spectrum of Modulated Synthesizer at 1.25 Mbit/s

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Power Spectral Density (dBc/Hz)

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Figure 11.3: Simulated results at 1.25 Mbit/s data rate: (a) eye diagram, (b) output spectrum, Sout(f ).

In a practical setting, the modulation data is influenced by temperature and pro-cess variations that shift the open loop gain of the PLL and cause mismatch between the compensation and PLL transfer functions. Figure 11.4 illustrates the effect of such open loop gain variation on the modulation signal for the case in which the gain is set ±25% away from its ideal setting. As seen by the results, the frequency deviation of the modulation signal is altered and the ISI is slightly increased.

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time (microseconds) Simulated Eye Diagram: 1.25 Mbit/s, −25% gain error

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time (microseconds) Simulated Eye Diagram: 1.25 Mbit/s, 0% gain error

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time (microseconds) Simulated Eye Diagram: 1.25 Mbit/s, +25% gain error

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Figure 11.4: Simulated eye diagrams at 1.25 Mbit/s for three different open loop gain settings: (a) -25% gain error, (b) 0% gain error, (c) 25% gain error.

To explain the observed ISI and deviation error, Figure 11.5 displays the transfer function seen by the data when the open loop gain of the PLL is too high. The

result-ing mismatch creates a parasitic pole/zero pair that occurs near the cutoff frequency of the PLL (84 kHz in this case). We can equivalently view the resulting transfer func-tion as the sum of a lowpass and an allpass filter. ISI is introduced by the lowpass;

this phenomenon can be viewed in the time domain as a parasitic time constant that interferes with modulation data coming from the allpass. The modulation deviation error is caused by the fact that the magnitude of the allpass is changed according to the amount of mismatch present.

Frequency Domain Time Domain

ISI ISI

Figure 11.5: Graphical explanation of cause of deviation error and ISI.

To examine the influence of data rate on modulation integrity, Figure 11.6 shows a simulated eye diagram and power spectrum of the transmitter at 2.5 Mbit/s. The eye diagram indicates that excellent modulation performance is achieved at this data rate; its eye is wide open, the frequency deviation is quite close to the ideal of±625 kHz, and the amount of ISI present is even less than that encountered at 1.25 Mbit/s.

(The reason for the ISI being reduced will be explained shortly.) The simulated power spectrum is close to ideal, but is slightly asymmetric and has higher spectral density than the ideal case at frequency offsets close to 5 MHz. The asymmetry is increased over the 1.25 Mbit/s case due the increased signal swing of the divide value relative to its nominal value. The spectral density is higher than the ideal case at frequency offsets close to 5 MHz because of Σ-∆ quantization noise.

As observed by comparison of Figures 11.6 and 11.3, the amount of ISI that occurs under matching conditions at 2.5 Mbit/s is much less than that which occurs at 1.25 Mbit/s. Figure 11.7 reveals that this statement is also true under mismatched conditions by its comparison to Figure 11.4.

Figure 11.8 provides an intuitive explanation for the data rate dependence of ISI. As illustrated, the data signal is corrupted by the portion of its energy that passes through the lowpass filter formed by mismatch. Data signals that have large bandwidth relative to this lowpass will experience small levels of ISI since the relative ISI energy will be much less than that of the data. As the data bandwidth is decreased,

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Simulated Output Spectrum of Modulated Synthesizer at 2.5 Mbit/s

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Power Spectral Density (dBc/Hz)

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Figure 11.6: Simulated results at 2.5 Mbit/s data rate: (a) eye diagram, (b) output spectrum, Sout(f ).

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time (microseconds) Simulated Eye Diagram: 2.5 Mbit/s, 0% gain error

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time (microseconds) Simulated Eye Diagram: 2.5 Mbit/s, +25% gain error

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Figure 11.7: Simulated eye diagrams at 2.5 Mbit/s for three different open loop gain settings: (a) -25% gain error, (b) 0% gain error, (c) 25% gain error.

the ratio of ISI energy to data energy increases and the effects of ISI become more pronounced.