Noise Model of VCO

If the output waveform is odd-symmetry, It can suppress 1/

f

noise effetely.

This will lowerΔw1 f/ 3. From equation (2.5), increase Q factor of LC tank and output power can improve phase noise.

2.4.2.2 Frequency Tuning Range

Frequency variation is an important parameter when designing VCO. Because a CMOS oscillator must be designed with a large tuning ranges to overcome process variations. The simplest way to do so is with a varator such as diode varator and MOS varator. The NMOS cross-coupled pair VCO has higher tuning range than double cross-coupled VCO topology for equal effective tank transconductance.

When control voltage change, the bias voltage of transistor will also change. S parameter and Γ will change according to dc current variation. This will cause _in output frequency shift. This is called pushing effect. To avoid pushing effect, we can use high quality resonator to reduce the pushing effect. We can also using regulator to overcome pushing effect such as band gap circuits.

Loading effect is another problem. When loading change, its impedance is also change. This will cause output frequency shift. This is called load pulling effect. To avoid this problem, we can use buffer circuit to overcome load pulling effect.

2.4.3 Noise Model of VCO

Phase noise is the most important parameter in the VCO design. There are two models: Leeson’s model and Hajimiri model. Lesson has developed a time invariant model to describe the noise of oscillators. Hajimiri proposed a linear time varying phase noise model. The below sections will introduce these two phase noise model.

2.4.3.1 Time Invariant Model

In this section, phase noise analysis is described by using time invariant model.

Time invariant means whenever noise sources injection, the phase noise in VCO is the same. In other words, phase shift of VCO caused by noise is the same in any time.

Therefore, it’s no need to consider when the noise is coming. Suppose oscillator is consists of amplifier and resonator. The transfer function of a bandpass resonator is written as The transfer function of a common bandpass is written as

2 2 Compare equation (2.6) with (2.7). Thus,

1/ Q=

The close-loop response of oscillator is expressed by

( / ) The above equation is double sideband noise. The phase noise faraway center frequency Δ can be expressed by

ω

where

P

_s is the output power. From equation (2.12), increasing power and higher Q factor can get better phase noise. Increasing power means increasing the power of amplifier. This will decrease noise figure (F) and improve phase noise.

From equation (2.12), we can briefly understand phase noise. But the equation

and actual measured result are different. The VCO spectrum is shown as Fig. 2.24.

The phase noise equation can be modified as

3

The above equation is called Leeson’s model.

2.4.3.2 Time Variant Model

In this section, we use the Hajimiri model to explain the phase noise. At first, we assume that an impulse current injects into a lossless LC tank as illustrated in Fig.

2.25. If the impulse happens to coincide with a voltage maximum as shown in top of Fig. 2.26. The amplitude increase ΔV=ΔQ/C, but the timing of the zero crossings does not change. An impulse injected at any other time displaces the zero crossings as shown in bottom of Fig. 2.26. Hence, an impulsive input produces a step in phase, so that integration is an inherent property of the impulse to phase transfer function.

Because the phase displacement depends on when the impulse is applied, the system is time-varying.

Fig. 2.25. Impulse current injects into LC tank.

t

Fig. 2.26. Waveforms for impulse excitation.

Hajimiri proposed a linear time-varying phase noise model which is different from the Lesson’s model. The impulse response can be written as

max

where

q

max is the maximum charge displacement across the capacitor and u(t) is the unit step. The function Γ( )x is called the impulse sensitivity function (ISF), and is a frequency and amplitude independent function that is periodic in 2π. Once the ISF has been determined, we may compute the excess phase through use of the superposition integral. Hence

max

This equation can be expanded as a Fourier series:

0 ISF. We assume that noise components are uncorrelated, so that their relative phase is irrelevant, we will still ignore

θ

n. Equation (2.16) can be rewritten as

0

Equation (2.17) allows us to compute the excess phase caused by an arbitrary noise current injected into the system, once the Fourier coefficients of the ISF have been determined. Now we consider the injection of a sinusoidal current whose frequency is near an integer multiple m of the oscillation frequency, so that

[ ]

( ) _mcos ( _o )

i t =I mω + Δω t

(2.18) Substituting (2.18) into (2.17) where Δ ω ωo and n=m. We can simplify Equation (2.17) as

max Substituting (2.19) into (2.20). Suppose

max

2 1 I cm m

q Δω ^< . Therefore, the sideband

power relative to the carrier is given by In general, a noise signal can be separated into two type noise source: white noise and flicker noise. First, input an noise current only with the white noise and its noise power spectral density is

2

in

Δf . The total single sideband phase noise spectral density in dB below the carrier per unit bandwidth is given by

2

According to Parseval’s theorem. Thus,

2 2

Therefore we can use quantitative analysis to analyze the phase noise sideband power due to the white noise source as following equation

2

Substituting these relations into (2.24). We have

2

If input noise of VCO is 1/f noise, the power spectral density is written as

2 2 1/ whereω1/ fis the 1/f corner frequency of 1/f noise. This equation represents the phase noise spectrum of an arbitrary oscillator in 1/f² region of the phase noise spectrum. Quantitative analysis for the relationship between the device corner 1/f and the 1/f ³ corner of the phase noise can be illustrated by following equation.

2

Fig. 2.27. Conversion of noise to phase noise sidebands.

Here we consider the case of a random noise current in(t) whose power spectral density has both a flat region and a 1/f region as shown in Fig. 2.27. Noise components located near integer multiples of the oscillation frequency are transformed to low frequency noise sidebands for SΦ(ω) and it’s become phase noise in the spectrum of SV(ω) as illustrated in Fig. 2.27. It can be seen that the total SΦ(ω) is given by the sum of phase noise contributions from device noise of the integer multiples of ωo and weighted by the coefficients cn. The theory predicts the existence of 1/f ², 1/f ³, and flat regions for the phase noise spectrum. The low frequency noise sources are weighted by the coefficient c0 and show a dependence on the offset frequency. The white noise terms are weighted by other cn coefficients and give rise to the 1/f ² region of phase noise spectrum. From Fig. 2.27, it is obviously that if the original noise current i(t) contains 1/fⁿ low frequency noise terms, they can appear in the phase noise spectrum as 1/fⁿ⁺² regions.

2.5 Phase-Locked Loop Fundamentals 2.5.1 Principles of PLL

Phase-locked loop is a negative feedback loop which the phase of a local oscillator is tracing and locking the phase of the reference frequency. PLL consists of phase-frequency detector, charge pump, loop filter, voltage-controlled oscillator, frequency divider, and reference frequency. It is important to understand each functional block in a PLL. A basic PLL is shown in Fig. 2.28.

PFD CP LPF VCO

Frequency divider

Fref Vout

Fig. 2.28. Block diagram of a basic PLL

The phase-frequency detector compares the phase and frequency difference between the reference signal and the signal fed back by the frequency divider then sends a signal to charge pump. According to this signal, the charge pump charges or discharges the loop filter. The filter suppresses unwanted frequency and supplies the VCO with a DC control voltage. The voltage-controlled oscillator converts voltage signal to frequency output. Finally, output signal is fed back to Phase Detector through an integer frequency divider. PLL divides its output frequency by an integer number and adjusts the output frequency to equal to the reference frequency.

These sub-circuits will be presented in the subsequent sections.

2.5.1.1 Voltage-Controlled Oscillator Basics

In a PLL system, voltage-controlled oscillator is the most important component.

The frequency of most RF oscillators must be adjustable. So we need an oscillator whose frequency can be varied by a voltage. The transfer function is shown in Fig.

2.29.

Fig. 2.29. Ideal transfer function of the VCO

An ideal VCO is a circuit that generates a periodic output whose frequency is a linear function of a control voltage. It can expressed as

0

out vco ctrl

f = f +K ×V (2.28) where

f

₀ is the free-running frequency and

K

_vco is the gain of the VCO (specified in rad/s/V). f1 to f2 is the tuning Range. The output of a sinusoid VCO can expressed as

( ) cos[2 _o 2 _{vco ctrl}( ) ]

v t = ×A πf t+ πK

∫

V t dt (2.29) If control voltage is a fixed voltage, the output can rewritten as

( ) cos[(2 _o 2 _vco ) _o]

v t = ×A π f + πK V t+φ (2.30) where

φ

_o represents the initial value of the phase. Thus, if control voltage is constant, the frequency is simply shifted by (

K

_vco×

V

_ctrl).

In a PLL, VCO is a linear varying system. Control voltage is the input and phase is the output. The value is

(

^2π×Kvco×

∫

^{Vctrl( )t dt}

)

. Thus, the transfer function of VCO can expressed as

( ) 2

out vco

ctrl

s K

V s

φ ₌ π (2.31)

2.5.1.2 Phase Frequency Detector

The operation of a typical PFD is shown in Fig. 2.30. If the input frequency A is leading input B. The output signal QA changes to the positive level and QB remains at low level. Inversely, if the input frequency of signal A is lagging signal B, then positive pulse appears at QB and QA keeps at low.

A PFD

When the frequencies of two input signals are equal, the circuit generates pulses at either QA or QB. Thus, the frequency or phase difference between signal QA and signal QB can be considered as the average value of QA-QB. The output QA and QB

are usually called UP and DOWN signals.

QA=0

State 0 State 1

State 2

Fig. 2.31. PFD state diagram.

To implement a circuit with the above behavior, at least three logical states are required: QA=QB=0 (State 0), QA=1, QB=0 (State 1), and QA=0, QB=1 (State 2). An edge-triggered sequential circuit is used to avoid dependence of the output upon the duty cycle of the inputs. We assume the circuit can change state only on the rising transitions of A and B. The operations of PFD can be summarized as a state diagram in Fig. 2.31. At the beginning, the PFD is in the State 0, QA=QB=0. If there is a positive edge trigger at the input A, the PFD will transform into the State 1 (QA=1, QB=0). The circuit remains in this state until a positive edge trigger occurs on the input B0. The switching sequence between State 0 and State 2 is similar.

Fig. 2.32. Characteristic of an ideal phase detector.

An ideal PFD produces an output signal whose dc value is linearly proportional to the difference between the phases of two periodic inputs as shown in Fig. 2.32. The relationship can be written as

out PD

V =K ×+φ (2.32) Where KPD is the gain of the phase-frequency detector and its unit is V/rad.

+ φ

is the input phase difference.

2.5.1.3 Charge Pump

A charge pump consists of switches and current sources, which is convert the two digital output signals QA and QB from PFD into charge current. Fig. 2.33 shows the ideal action of a PFD with charge pump. When PFD output UP, S1 is ON and CP charge. When PFD output DOWN, S2 is ON and CP discharge. When locking, PFD don’t output UP or DOWN and CP will not charge or discharge. To avoid mismatch, the current I1= I2 = I. The charge current is proportional to the phase error. The relation is

2

e

Ip I φ

= × π , where e

φ

is the phase error and can be written as φ_e =φ_A−φ_B.

PFD

I1

I2 S1

S2 Cp

A B

Vout

A

B

QA

QB

Vout

Fig. 2.33. PFD with CP

2.5.1.4 Loop Filter

The standard passive loop filter for a current mode charge pump PLL is shown in Fig. 2.34. We use a second order loop filter to reduce the ripple. A low-pass filter removes the useless messages and provides a stable voltage to the VCO.

C1

To VCO Vctrl From

Charge Pump

R2

C2

Fig. 2.34. Schematic of second order loop filter.

The PFD’s current source outputs charge pump into the loop filter. Then it converts the charge into the VCO’s control voltage. The shunt capacitor C1 is to avoid discrete voltage steps at the control port of the VCO due to the instantaneous changes in the charge pump current output. The impedance of the second order filter in Fig.

2.34 is

( ) ( )

(

²

) (

²

)

2

1 2 2 1 2

s C R 1

Z s s C C R s C C

= +

+ + (2.33)

2.5.2 Noise Model in the PLL System

To analyze the noise in the PLL system, we add noise source at the PLL. So we can discuss the influence over the whole system about noise as shown in Fig. 2.35.

The input noise sources include the reference frequency (

θ

_nin), VCO (

θ

_nvco), PFD, CP (

n ), LF (

_cp

n ) and divider.

_F

Fig. 2.35. Noise source of PLL.

In Fig. 2.35,

s is the transfer function of VCO. We will discuss the influence of noises over the whole system in the following sections.

2.5.2.1 Phase Noise of PLL with PI Filter

In VCO, the transfer function can be written as

1 If PI filter is adopted as shown in Fig. 2.36, the transfer function F(s) is written as

From equation 2.36, the transfer function is a high pass filter as shown in Fig.

2.37(a).

R2 C2

R1

Fig. 2.36. PI type.

In reference frequency, the transfer function can be written as

( ) If PI filter is adopted, the transfer function is

( 2)

The transfer function is a low pass filter as shown in Fig. 2.37(b).

Fig. 2.37. Transfer function: (a)VCO (b)reference frequency

2.5.2.2 Phase Noise of PLL with Charge Pump

PI filter need one operation amplifier. It’s more complicate and expensive than charge pump. Therefore, charge pump is more popular than PI filter. Charge pump has the same function as operation amplifier does. If we adopts charge pump, the transfer function of first order R C_{2 2} filter can be written as function is written as

2

R2

In reference frequency, the transfer function can be written as 2 ( ) In VCO, the transfer function can be written as

1 In CP, the transfer function can be written as

( ) In LF, the transfer function can be written as

1( ) voltage of loop filter. T1 is expressed as

1 From equation (2.42), the phase noise contributed from crystal is written as

2 From equation (2.43), the phase noise contributed from VCO is written as

2

The phase noise contributed from charge pump must calculate the noise of each transistor. For simplify calculation, charge or discharge is using one transistor.

Derived as system is locking,

T

_ref is periodic of reference signal, and 1/2 is double sideband.

The phase noise contributed from R2, it can be derived as

2

2.6 The 24 GHz Radar System

The advanced sensing and automatic control is the trend for recent vehicle developments. To achieve collision avoidance, Radar sensor must detect distance and speed. Sometimes Radar sensor also must detect many objects simultaneous. In recent research, there are many specifications such as 10, 18, 24, 38, and 77 GHz for different applications. Among these, 24 GHz is short-ranging radar and it may become the next product in automobile market. Fig. 2.39 shows the block diagram of 24GHz Radar sensor system. This system responsible for signal receives and transmits. It includes antenna, BPF, LNA, mixer, VCO, amplifier, DSP, network transceiver, and linear ramp controller. MCU receive instruction from DSP and produce linear ramp to control VCO.

DSP

Network Transceiver Linear ramp

controller

Antenna array

BPF

LNA BPF Mixer

Amplifier

Amplifier 24G Hz

VCO

Fig. 2.39. Block diagram of 24GHz Radar system.

Chapter 3 The Design of Wideband Mixer

In this chapter, two kinds of wideband down conversion mixers for ultra-wideband applications and one kind of single-sideband mixer for UWB synthesizer are presented.

3.1 The Design of Wideband Down Conversion Mixer

In this section, a wideband mixer for multi-band orthogonal frequency division multiplexing ultra-wideband applications is designed. First, the operating principle of the feedforward compensated high-linearity differential transconductor is introduced.

Then, we explain the operating theory of the proposed wideband mixer. Finally, the simulation and measurement results are discussed.

3.1.1 Feedforward Compensated Differential Tansconductor Analysis

3.1.1.1 Modified Differential Transconductor Circuit

The first stage of mixer must have high linearity to handle the large input signals from LNA without significant intermodulation [23]. To improve linearity in Gilbert

mixer, many methods have being used such as adding source degeneration resistors below the gain stage [24], bisymmetric Class-AB input stage [23], multiple gated transistor [22], and common-source and common-emitter RF transconductors [25].

The designed mixer adopting modified feedforward compensated differential transconductor, as like as the transconductor stage in Gilbert mixer, is shown in Fig.

3.1. The transconductor consists of degenerate common-source stages (M1, M2) and degenerate common-gate stages (M3, M4). The input stage is the degenerate common-source stages and compensated by degenerate common-gate stages, which can achieve feedforward distortion linearization [26]-[27]. The feedforward compensated differential transconductor provides accurate input impedance and high intermodulation intercepts. The modified feedforward compensated differential transconductor has less distortion than Class-AB [19], multi-tanh [20], degenerated differential pair, and cascode compensation [21].

Vin 1 Vin 2

Vb Vb

Iout 2 Iout 1

2I1

I2 I2

R1

R2 R2

R1

M1 M2

M3 M4

Vx

Fig. 3.1. Modified differential transconductor.

3.1.1.2 Modified Differential Transconductor Analysis

In order to appreciate the reduction of nonlinearity obtained by modified feedforward compensated differential transconductor, let us consider the harmonic distortion cancellation in Fig. 3.1. Assuming the circuit is symmetric. All MOS are saturated and λ=0. A harmonic balance analysis is then used to express the harmonics.

Using one-half of the degenerate common-source (M2) and degenerate common-gate (M3) in Fig. 3.1. Suppose a single tone signal

V

_mcos

ω t

is applied to input. The voltage of

Vin

1=

V

_dc+

V

_mcos

ω t

and Vin2=V_dc−V_mcosωt. Where

V

_dc denotes the DC level,

V

_m denotes the amplitude of the sinusoidal signal, and

ω

is the frequency of the sinusoidal signal. We can write the drain current of M3 by

( )

²

Equation (3.1) can be expressed as

( ) ( ) ( )²

From equation (3.2), the drain current of M3 can be found by Taylor series and examining only the first three harmonics.

The result is

The drain current of M2 is given by

( )

²

Equation (3.1) can be expressed as

( ) ( ) ( )²

2

From equation (3.6), the drain current of M2 can be found by Taylor’s series expansion and examining only the first three harmonics.

The result is 3^rd harmonic for the output1 current can be written as (3.9), (3.10), and (3.11). AF

means the amplitude of the fundamental tone. AHD2 means the amplitude of the second harmonic. AHD3 means the amplitude of the third harmonic.

( ) ( ) ²( )^{2 2}( )^{2 2}( ^{2 2}) From (3.10), the second-order distortion cancellation can be realized. If it follows that

The second-order distortion can be cancelled and we have

( ) ( )

³ ₂ ² ₂

From (3.11), the third-order distortion cancellation is possible. If

2 2

1 2 2 3

R K = R K

(3.14) Then the third-order distortion coefficient A^HD3 can be zero. This condition can be realized by proper selection R1, R2, W2, W3, L2, and L3.

If second-order and third-order distortion cancellation were done, we can substituting (3.13) and (3.14) into (3.9) and the fundamental tone can be expressed as

(

3 2

)

²

From equation (3.12) and (3.14), distortion cancellation is achieved by the proper selection of bias voltage and degeneration resistance. On the other way, the values of R1, R2, W2, W3, L2, L3, Vb, Vx, and Vdc are important when designing.

The degenerate common-source pair compensated by a pair of degenerate common-gate providing distortion reduced is derived. The modified feedforward compensated differential transconductor offers better linearity over a wideband frequency. This circuit is suitable for wideband mixer as a transconductor to lower distortion.

3.1.2 LC Folded Cascode Mixer

The mixer gain is proportional to gm, and higher overdrive voltage means higher gain. To use feedforward compensated differential transconductor in Gilbert mixer, the supply voltage is critical to keep the driver FETs always in saturation region. In order to overcome this problem, LC folded cascode circuit can be used to get larger voltage headroom. Therefore, it can keep the driver FETs always in saturation region [22],[24],[28],[29]. The operation of the LC folded cascode mixer is similar to the Gilbert mixer. A LC folded cascode mixer with an added resistance is shown in Fig.

3.2. The parallel RLC tank is a tuned load that can be used to provide larger output swing. At DC, inductor is shorted and no voltage drop across the tuned load.

Therefore, the more voltage headroom is provided. At resonating frequency of the parallel RLC tank, the inductor and capacitor are open circuit at output frequency

Therefore, the more voltage headroom is provided. At resonating frequency of the parallel RLC tank, the inductor and capacitor are open circuit at output frequency

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