Analysis of parameters in saturation region

Note that the Yij is not equal to Yji in equation (4.7) because of the existent of current gain and asymmetry in channel.

V V

∂ ∂

4.4.2 Analysis of parameters in saturation region

The extracted capacitances are plotted as a function frequency in Fig.4.13 and

Fig. 4.14, the extracted capacitances Cgg, Cgs and Cgs is weak frequency dependet at low frequency, and will be increase with the frequency increasing. There are some inductances without de-embedding completely to cause the behavior at high frequency. Conversely, the extracted capacitances Cgb, Cjs, and Cjd will be decease as t

t nction capacitances in four-port devices, and the extracted result shows that the Cjd

junction with the reverse bias operation, and Cjs is a gate bias independent he frequency increase, and the extracted Cjs, and Cjd is almost gate bias independence.

The geometry dependence of the optimizing capacitances are shown in Fig. 4.15 and Fig. 4.16, it shows that the capacitances are well proportioned to the NF, and the gate capacitances relationship between of linear and saturation region is described in two-port devices.

For the junction capacitances, according to the equivalent circuit of two-port devices, Im(Y22) combine with Cjd, Cgd, Cds, and Cdnw, so it is hardly to extract the Cjd in two-port devices that operate at saturation region. Contrary, it is easy to extrac ju

capacitances at Vds=1.2V is smaller than one at Vds=0V, because that the drain-body

parameters.

Fig. 4.1 The cross section and structure of four-port MOSFETs

Fig. 4.2 Four-port dummy open structure (M1)

Fig. 4.3 Four-port dummy short structure (M3)

Fig. 4.4 The equivalent circuit of four-port short pad after open de-embedding

Open De-embedding Only RG

LG

RD_diff

LD

RS

LS

G

D

B S

Cgso

Cgdo

Cjd

Cjs

Rbulk Cdnw

RS_diff

RD

Cgb

RB

LB

Fig. 4.5 The equivalent circuit of four-port devices at Vgs=Vds=0V

Fig. 4.6 The equivalent circuit of 4-port device at Vgs=1.2V, Vds=0V (Open_de)

160

0 10G 20G 30G 40G

60 80 100 120

140 Vg=0V

Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V Vg=1.0V Vg=1.2V L=0.13um, NF=18

Vds=0V

Cgg(fF)

Frequency(Hz)

0 10G 20G 30G 40G

30 40 50 60 70 80 90

Vg=0V Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V Vg=1.0V Vg=1.2V L=0.13um, NF=18

Vds=0V

Cgs(fF)

Frequency(Hz)

0 10G 20G 30G 40G

30 40 50 60 70

Vg=0V Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V Vg=1.0V Vg=1.2V L=0.13um, NF=18

Vds=0V

Cgd(fF)

Frequency(Hz)

Fig. 4.7 The extracted Cgg, Cgs , Cgd capacitance verse frequency at Vds=0V

0 10G 20G 30G 40G 0

2 4 6 8 10 12

Vg=0V Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V Vg=1.0V Vg=1.2V L=0.13um, NF=18

Vds=0V

Cgb(fF)

Frequency(Hz)

0 10G 20G 30G 40G

0 20 40 60

80 Vg=0V

Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V Vg=1.0V Vg=1.2V 100

L=0.13um, NF=18 Vds=0V

Cjs(fF)

Frequency(Hz)

0 10G 20G 30G 40G

0 10 20 30 40 50 60

Vg=0V Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V Vg=1.0V Vg=1.2V L=0.13um, NF=18

Vds=0V

Cjd(fF)

Frequency(Hz)

Fig. 4.8 The extracted Cgb, Cjs, Cjd capacitance verse frequency at Vds=0V

5 10 15 20 25 30 35 40 0

40 60 80 100 120 140

Vds=0

Cgs@Vgs=0V Cgd@Vgs=0V Cgb@Vgs=0V Cgs@Vgs=1V Cgd@Vgs=1V

20

Cgb@Vgs=1V

G a te capacitan ces ( fF)

NF

Fig. 4.9 The NF dependence of optimized gate capacitances at Vds=0V

5 10 15 20 25 30 35 40

20 40 60 80 100

120

^Vds=0

Cjs@Vgs=0V Cjd@Vgs=0V Cjs@Vgs=1V Cjd@Vgs=1V

Junction capacitances (fF)

NF

Fig. 4.10 The NF dependence of optimized junction capacitances at Vds=0V

0.00 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 0.18 ⁰ 2

4 6 8 10 12 14 16 18

Vds=0

RG@Vgs=0V RG@Vgs=1.2V Rch@Vgs=1.2V

Resistan ces ( fF)

1/NF

Fig. 4.11 The NF dependence of optimized RG and Rch at Vds=0V

Fig.

4.12 The equivalent circuit of 4-port device at Vgs=Vds=1.2V (Open_de)

0 10G 20G 30G 40G 60

80 100 120 140

Vg=0V Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V Vg=1.0V Vg=1.2V L=0.13um, NF=18

Vds=1.2V

Cgg(fF)

Frequency(Hz)

0 10G 20G 30G 40G

30 40 50 60 70 80 90 100

Vg=0V Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V L=0.13um, NF=18

Vds=1.2V

Cgs(fF)

Frequency(Hz)

Vg=1.0V Vg=1.2V

0 10G 20G 30G 40G

25 30 35 40 45

Vg=0V Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V Vg=1.0V Vg=1.2V L=0.13um, NF=18

Vds=1.2V

Cgd(fF)

Frequency(Hz)

Fig. 4.13 The extracted Cgg, Cgs,Cgd capacitance verse frequency at Vds=1.2V

0 10G 20G 30G 40G -2

0 2 4 6 8 10 12

Vg=0V Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V Vg=1.0V Vg=1.2V L=0.13um, NF=18

Vds=1.2V

Cgb(fF)

Frequency(Hz)

0 10G 20G 30G 40G

0 20 40 60 80

Vg=0V Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V Vg=1.0V Vg=1.2V L=0.13um, NF=18

Vds=1.2V

Cjs(fF)

Frequency(Hz)

0 10G 20G 30G 40G

-5 0 5 10 15 20 25 30 35

Vg=0V Vg=0.2V Vg=0.4V Vg=0.6V Vg=0.8V Vg=1.0V Vg=1.2V L=0.13um, NF=18

Vds=1.2V

Cjd(fF)

Frequency(Hz)

Fig. 4.14 The extracted Cgb, Cjs, Cjd cap citance verse frequency at Vds=1.2V a

5 10 15 20 25 30 35 40 -20

0 20 40 60 80 100 120 140

Vgs=1.2V

Cgs@Vds=0V Cgd@Vds=0V Cgb@Vds=0V Cgs@Vds=1.2V Cgd@Vds=1.2V Cgb@Vds=1.2V

G a te capacitan ces ( fF)

NF

Fig. 4.15 The NF dependence of optimized gate capacitances at Vgs=1.2V

5 10 15 20 25 30 35 40

20 40 60 80 100

120

_Vgs=1.2V

Cjs@Vds=0V Cjd@Vds=0V Cjs@Vds=1.2V Cjd@Vds=1.2V

Junction capacitances (fF)

NF

Fig. 4.16 The NF dependence of optimized junction capacitances at Vgs=1.2V

Chapter 5

Model Verification by Circuit Simulation

5.1 Equivalent Circuit model verification

In chapter 3 and 4, the proper equivalent circuit and extraction method for the different bias condition is discussed, after the establishment of the equivalent circuit and the extraction method of parameters, it is essential to verify the validity of the model. Next, the proper equivalent circuit will be verified in this session, the equivalent circuit is simulated by the Advanced Design System (ADS) simulator and ICCAP technology in various bias conditions.

5.2 Two-port 3T MOSFETs under various bias conditions

In this study, three kinds of operate bias condition to consider: 1.off state device (Vgs=Vds=0V); 2. Strong inversion in liner region (Vgs>>Vth, Vds=0V); 3. Strong inversion in saturation region (Vgs>>Vth, Vds=1V).

5.2.1 3T MOSFETs in linear region

Fig. 3.8 is the illustration of 3T device after open de-embedding at Vgs=Vds=0V bias condition, it has been known that substrate resistance will influence the output impedance significantly, inversion layer still doesn’t build up in this condition, the signal coming from drain (port2) certainly through Cjd and substrate resistances to the ground, to improve the result between measurement and simulation, it is necessary to adjust the substrate network pa

extracted value because the combinatorial substrate network, to fine tune these two rameters for optimization. Cdnw does not have the

parameters to fit the measurement data by ADS simulation. The model parameters optimized for 3T device under Vgs=Vds=0V are listed in Table 5.1, and the S and Y parameters comparison of simulation and measurement after optimization are plotted in Fig. 5.1.

Table 5.1 The optimized parameters for 3T device at Vgs=Vds=0V

L=0.13 Ls(pH) Ld(pH) Lg(pH) Rs Rd Rg Rg_int Rs_diff Rd_diff Cgd(fF) Cgb(fF) Cjd(fF) Rbulk Cbulk 6 17.52 48.97 41.50 0.22 0.60 0.41 6.11 18.81 23.34 7.26 12.80 14.89 203.60 16.78 18 17.52 47.21 42.31 0.22 0.60 0.41 2.05 6.81 7.57 30.56 15.33 39.68 79.58 33.42 36 17.52 47.21 42.27 0.22 0.60 0.41 1.04 3.52 3.71 66.22 18.42 71.54 47.49 75.53 72 17.52 48.22 42.54 0.22 0.60 0.44 0.53 1.85 1.91 142.30 26.99 138.00 29.58 121.00

L=0.18 Ls(pH) Ld(pH) Lg(pH) Rs Rd Rg Rg_int Rs_diff Rd_diff Cgd(fF) Cgb(fF) Cjd(fF) Rbulk Cbulk 6 18.10 49.81 42.43 0.22 0.60 0.41 4.26 19.39 24.12 9.05 13.39 15.04 209.20 16.78 18 18.10 47.86 42.43 0.22 0.60 0.41 1.52 7.31 8.13 33.65 16.78 40.65 86.25 33.42 36 18.10 47.38 41.44 0.22 0.60 0.41 0.94 3.79 4.00 72.18 21.42 73.08 52.71 75.53 72 18.10 46.35 42.54 0.22 0.60 0.41 0.53 2.05 2.11 152.30 32.90 137.60 34.92 121.00

L=0.35 bulk

6 18.10 48.22 43.54 0.22 0.60 0.41 8.29 20.25 25.26 10.05 15.29 15.13 223.50 16.78 18 18.16 48.22 42.92 0.22 0.60 0.41 2.72 7.89 8.76 39.11 20.99 42.68 97.85 33.42 36 18.10 47.53 42.31 0.22 0.60 0.41 1.48 4.34 4.58 81.35 28.16 75.49 66.38 75.53 72 18.01 47.53 43.54 0.22 0.60 0.41 0.68 2.35 2.42 174.20 48.33 136.40 48.57 121.00

L=0.5 Ls(pH) Ld(pH) Lg(pH) Rs Rd Rg Rg_int Rs_diff Rd_diff Cgd(fF) Cgb(fF) Cjd(fF) Rbulk Cbulk 6 18.10 47.53 44.80 0.22 0.60 0.41 21.29 20.09 25.82 11.41 16.77 15.13 227.60 16.78 18 18.10 48.22 43.54 0.22 0.60 0.41 7.82 7.92 9.28 43.98 24.66 42.68 103.00 33.42 36 18.10 48.22 42.31 0.22 0.60 0.41 4.25 4.34 5.28 87.76 34.64 75.49 71.38 75.53 72 18.10 48.22 43.54 0.22 0.60 0.41 0.53 2.73 2.81 182.20 59.35 136.40 54.57 121.00

Ls(pH) Ld(pH) Lg(pH) Rs Rd Rg Rg_int Rs_diff Rd_diff Cgd(fF) Cgb(fF) Cjd(fF) Rbulk C

The equivalent circuit of 3T device after open de-embedding at Vgs>>Vth and Vds=0V was plotted in Fig. 3.25, we supposed that the substrate network parameters is gate bias independency, the optimized substrate parameters in above session will be used in this circuit, the preliminary result indicate well match in terms S parameters, but has a shift along the frequency in the Y parameter, to improve the behavior at high frequency, terminal inductances and gate resistance will be fine tune for good match, in fact, substrate resistance is lager than the channel resistance in this bias, and drain signal going through channel inversion layer directly, it is almost no different by tuning

the value of substrate resistance, the results suggest that the substrate network does not make any effect under this bias condi

bias condi ance and

substrate parameters for the actuary model parameters. The S and Y parameters tion are plotted in Fig. 5.2, and

tion. Fine tuning the parameters in these two tions repeatedly, it will be has the same value of parasitic induct

comparison of simulation and measurement after optimiza

the model parameters optimized for 3T devices under Vgs=1V,Vds=0V are listed in Table 5.2.

Table 5.2 The optimized parameters for 3T device at Vgs=1V, Vds=0V

L=0.13 Ls(pH) Ld(pH) Lg(pH) RS RD RG Rch Rs_diff Rd_diff Cgs(fF) Cgd(fF) Cjd(fF) Rbulk Cbulk 18 17.22 47.21 42.31 0.19 1.08 4.89

6 17.52 48.97 41.50 0.19 1.94 12.71 14.56 18.81 23.34 20.99 20.99 14.89 203.60 16.78 4.93 6.81 7.57 56.41 56.41 39.68 79.58 33.42 36 17.22 47.21 42.27 0.19 0.80 2.74 2.54 3.52 3.71 118.40 118.40 71.54 47.49 75.53 72 7.52 48.22 42.54 0.19 0.66 1.98 1.47 1.85 1.91 230.50 230.50 138.00 29.58 121.00

bulk .78 18

36

18. 3

Rc ff Rd_diff Cgs(fF) Cgd(fF) Cjd(fF) Rbulk Cbulk 25.26 59.05 59.05 15.13 223.50 16.78 18 18.16 48.22 42.92 0.19 1.96 3.13 14.31 7.89 8.76 169.40 169.40 42.68 97.85 33.42 36 18.10 47.53 42.31 0.19 0.98 2.24 7.36 4.34 4.58 341.50 341.50 75.49 66.38 75.53 72 18.01 47.53 43.54 0.19 0.76 1.43 4.12 2.35 2.42 690.20 690.20 136.40 48.57 121.00

ff Rd_diff Cgs(fF) Cgd(fF) Cjd(fF) Rbulk Cbulk 1

L=0.18 Ls(pH) Ld(pH) Lg(pH) RS RD RG Rch Rs_diff Rd_diff Cgs(fF) Cgd(fF) Cjd(fF) Rbulk C 6 18.10 49.81 42.43 0.19 2.13 10.35 20.79 19.39 24.12 29.69 29.69 15.04 209.20 16

18.10 47.86 42.43 0.19 0.99 4.06 7.17 7.31 8.13 85.22 85.22 40.65 86.25 33.42 18.10 47.38 41.44 0.19 0.65 2.40 3.69 3.79 4.00 166.70 166.70 73.08 52.71 75.53 72 10 46.35 42.54 0.19 0.49 1.95 2.06 2.05 2.11 34.30 334.30 137.60 34.92 121.00

L=0.35 Ls(pH) Ld(pH) Lg(pH) RS RD RG h Rs_di 6 18.10 48.22 43.54 0.19 7.21 8.93 38.45 20.25

L=0.5 Ls(pH) Ld(pH) Lg(pH) RS RD RG Rch Rs_di

6 18.10 47.37 43.20 0.19 8.13 8.25 55.37 20.09 25.82 87.13 87.13 15.63 227.60 16.78 18 18.10 47.98 44.75 0.19 2.39 3.69 20.75 7.92 9.28 220.40 220.40 37.07 103.00 33.42 36 18.20 47.58 42.27 0.19 1.06 1.96 11.07 4.34 5.28 467.60 467.60 72.38 71.38 75.53 72 18.20 46.58 43.85 0.19 0.63 1.55 6.19 2.73 2.81 903.80 903.80 142.90 54.57 121.00

5.2.2 3T MOSFETs in saturation region

The equivalent circuit of 3T device after open de-embedding at Vgs>>Vth and Vds=1V was plotted in Fig. 3.39, the equitant circuit is most complicated one because

the current gain and asymmetry between source and drain along the channel. in this bias condition, the optimized substrate network and parasitic RL parameters in Table 5.2 is used for the simulation, there exists large deviation in the simulation S22 from the measurement, according to the equivalent circuit, the output impedance compose f the Rbulk, Cjd, Rch, Rds, Cds, gm and gds. The re-optimization required for gm come

from the p ill impact

Rch and Rds derived form the reciprocal of gds, therefore, re-tuning and optimization on the motioned parameters to enable fit to measurement by simulation. Through the fine tuning by manually and optimization automatic by the simulation tool ICCAP. The S and Y parameters comparison of simulation and measurement after optimization are plotted in Fig. 5.3, and the model parameters optimized for 3T devices under Vgs=Vds=0V are listed in Table 5.3.

Table 5.3 The optimized parameters for 3T device at Vgs= Vds=1V o

arasitic resistance effect on Id and gm, and the deviation in gds w

L=0.13 RS RD RG Cgs(fF) Cgd(fF) Cjs(fF) Cjd(fF) Rch CDS(fF) RDS gm(mS) gds(mS) 6 0.19 1.94 12.71 30.2 10.32 14.89 11.17 357.70 130.32 282.49 23.99 1.60 18 0.19 2.13 10.35 40.75 10.91 15.04 11.28 546.10 33.65 ####### 19.77 0.66

36 0.19 7.21 8.93 75.15 13.04 15.13 8.28 856.00 11.07 ####### 12.68 0.15

72 0.19 8.13 8.25 119.9 13.34 15.63 11.07 ####### 5.11 ####### 10.23 0.18

L=0.18 RS RD RG Cgs(fF) Cgd(fF) Cjs(fF) Cjd(fF) Rch CDS(fF) RDS gm(mS) gds(mS) 6 0.19 1.08 4.89 78.76 30.57 39.68 29.76 136.77 282.49 154.18 69.80 5.11 18

36 0.19 1.96 3.13 202.4 38.39 42.68 26.42 383.00 37.07 ####### 38.60 0.62

6 0.19 0.80 2.74 142.9 67.32 71.54 53.68 85.98 739.10 80.50 143.50 10.05

36 0.19 0.98 2.24 415 76.31 75.49 49.09 193.60 80.35 787.60 73.00 1.22

6 0.19 0.66 1.98 251.5 140.10 138.00 105.00 60.94 ####### 51.50 221.00 18.00 36 0.19 0.76 1.43 787 167.90 136.40 91.72 118.40 174.20 310.10 138.30 1.60

0.19 0.99 4.06 112.9 34.26 40.65 30.65 198.33 91.90 677.33 56.00 2.40

72 0.19 2.39 3.69 325 43.32 37.07 24.99 497.60 29.11 ####### 29.11 0.38

L=0.35 RS RD RG Cgs(fF) Cgd(fF) Cjs(fF) Cjd(fF) Rch CDS(fF) RDS gm(mS) gds(mS) 18 0.19 0.65 2.40 203.6 75.05 73.08 54.81 145.20 125.40 277.60 103.00 4.50 72 0.19 1.06 1.96 633.4 79.69 72.38 53.08 254.60 72.95 ####### 57.30 0.55 L=0.5 RS RD RG Cgs(fF) Cgd(fF) Cjs(fF) Cjd(fF) Rch CDS(fF) RDS gm(mS) gds(mS)

18 0.19 0.49 1.95 366.9 155.50 137.60 104.20 94.60 256.40 97.50 193.40 6.80 72 0.19 0.63 1.60 1128 172.20 142.90 80.35 165.20 123.50 853.40 109.90 0.85

5.3 Four port MOSFETs under various bias conditions

For four port devices, three kinds of operate bias condition to consider: 1.off state device (Vgs=Vds=0V); 2. Strong inversion in liner region (Vg=1.2V, Vds=0V); 3. Strong inversion in saturation region (Vg=1.2V, Vds=1.2V).

5.3.1 4T MOSFETs in linear region

The equivalent circuit of four-port devices after open de-embedding at Vg=V

primary simulation and fine tune the parasitic inductance according to the imaginary part of Y parameters along the frequency, gate resistance according to the Re(Y11) at high frequency, substrate resistance according to the Im(Y24), Im(Y34) with the RC

d=Vs=Vb=0V was plotted in Fig. 4.7. Using the extracted model parameters for

decay behavior, in this condition, to maintain the charge conservation in body terminal, it should be add a parameter Cbb in body terminal, and use a parameter Rbb connect with Cbb to control the RC decay behaviors in Im(Y44), and Cbb can be calculated from the equation (5.1).The modified equivalent circuit are plotted in Fig. 5.4 and Fig.

5.5, the substrate networks compose with a lumped RC equivalent circuit in a multi-finger device, to simplify substrate networks, substrate resistance represent as a total distributed effect resistance, and Cbb represent as the nearest capacitance between substrate and DNW, when the impedance of Cbb smaller than the Rbulk with operate frequency increasing, the body signal can coupling to DNW by the Cbb

D with a resistance. The S and Y parameters comparison of simulation and measurement after optimization are plotted in Fig.

s under Vg=Vd=0V are list

directly and connection to GN

5.6~Fig. 5.13. And the model parameters optimized for four-port device ed in Table 5.4.

(

^{dut dut dut dut}

)

bb

+

dnw

Im

44

-

41

-

42

-

43

/

C C ≅ Y Y Y Y ω

(5.1)

Table 5.4 The optimized parameters for four-port device at Vgs= Vds=0V NF Lg(pH) Ls(pH) Ld(pH) Lb(pH) RG RS RD RB Rs_diff Rd_diff

18 79.65 73.59 79.59 76.90 8.11 0.73 0.73 0.73 8.66 9.63

NF C s(fF) Cgd fF) gb(fF) Cjs(fF) Cjd(fF) Rbulk Cdnw(fF) Cbb(fF) Rbb 6 11.06 11.06 2.84 26.19 16.09 352.13 24.04 39.25 93.60 18 27.47 28.08 10.55 60.17 50.34 272.51 27.76 61.02 103.12

6 69.65 69.54 66.59 65.12 16.61 0.73 0.73 0.73 20.11 26.82

36 81.64 79.59 81.59 79.11 5.02 0.71 0.73 0.73 4.17 4.40

g ( C

36 55.15 56.62 21.05 110.10 98.40 185.70 66.10 75.46 113.78

According to the equivalent circuit of four-port device after open de-embedding at Vg>>Vth, Vd=Vs=Vb=0V and the additional substrate parameters Cbb, Rbb, the model parameters optimized for four-port devices under Vg=1.2V, Vd=0V are listed in Table 5.5.

One thing mentioned that the substrate networks component is ignorable in two-port 3T devices in this supplied bias condition, because channel resistance is smaller than the impedance of substrate network from drain to source. For four-port devices, owing to body terminal connected to

terminal, substrate resistance will affect the behavior in body terminal directly, it is essential element to model the substrate network. Looking at the parameters that YGG, YGD, YDG, and YDD can be express the two-port CS configuration MOSFET characteristic under this bias condition, it is always unchanged with the varying Rbulk

and the result is expectable.

Table 5.5 The optimized parameters for four-port device at Vgs=1.2V, Vds=0V signal pad and separate from source

NF Lg(pH) Ls(pH) Ld(pH) Lb(pH) RG RS RD RB Rs_diff Rd_diff 6 69.65 69.54 66.59 65.12 16.61 0.73 0.73 0.73 20.11 26.82 18 79.65 73.59 79.59 76.90 8.66 0.73 0.73 0.73 8.66 9.63 36 81.64 79.59 81.59 79.11 5.24 0.71 0.73 0.73 4.17 4.40

NF Rch Cgs(fF) Cgd(fF) Cgb(fF) Cjs(fF) Cjd(fF) Rbulk Cdnw(fF) Cbb(fF) Rbb 6 16.16 19.10 17.21 0.10 28.21 16.19 352.13 24.04 39.25 93.60 18 5.66 60.60 50.18 0.01 69.61 54.77 272.51 27.76 61.02 103.12 36 2.85 129.11 85.76 0.02 118.40 108.50 185.70 66.10 75.46 113.78

5.3.2 4T MOSFETs in saturation region

The equivalent circuit of four-port device after open de-embedding at Vg=Vds=1.2V, Vs=Vb=0V was plotted in Fig. 4.20, it must be add a current gain gmb

parameters between drain and source to fit the Im(Y24) and Im(Y34), the current gain gmb can be extracted from the Re(Ydb).The modified equivalent circuit is plotted in Fig.

imulation and measurement after optimization are plotted in Fig. 5.15~Fig. 5.18. And the model parameters optimized for four-port devices under Vgs=Vds=1.2V are listed in Table 5.6.

5.14, the S and Y parameters comparison of s

Table 5.6 The optimized parameters for four-port device at Vgs=Vds=1.2V

NF Lg(pH) Ls(pH) Ld(pH) Lb(pH) RG RS RD RB Rs_diff

6 69.65 69.54 66.59 65.12 16.36 0.73 0.73 0.73 20.11

18 79.65 73.59 79.59 76.90 8.50 0.73 0.73 0.73 8.66

NF Cgs(fF) Cgd(fF) Cgb(fF) Cjs(fF) C (fF) Rbulk Cdnw(fF) Cbb(fF)

6 21.66 11.24 0.80 28.29 10.47 352.13 24.04 39.25

18 64.84 29.52 2.61 69.61 32.68 272.51 27.76 61.02 10

36

6 1630.00 5.92 302.00 19.50 1.90 3.96

18 323.38 8.30 185.43 51.62 5.59 14.10

36 215.14 29.22 31.77 86.12 10.72 28.60

Rd_diff 26.82

9.63

36 81.64 79.59 81.59 79.11 5.28 0.71 0.73 0.73 4.17 4.40

jd Rbb

93.60 3.12 127.00 65.49 5.02 118.40 69.32 185.70 66.10 75.46 113.78

NF Rds Cds Rch Gm(ms) Gds(ms) Gmb(ms)

0 5 10 15 20 25 30 35 40

Freq (GHz) Line:simulation

0 5 10 15 20 25 30 35 40

Vd=0V ; Vg=0V L/W =0.13/4

Symbol:measurement 0

20

Freq (GHz)

0.6

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

L/W =0.13/4

Freq (GHz)

0 5 10 15 20 25 30 35 40 -0.20

11)Im(Y22)Im(Y

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

NF=6 NF=18 NF=36 NF=72

Re(Y22)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40 L/W =0.13/4

NF=6 NF=18 NF=36 NF=72

Re(Y12)

Freq (GHz) Symbol:measurement

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

Freq (GHz)

Fig. 5.1 The comparison of 3T devices at Vgs=Vds=0V and L=0.13um

0 5 10 15 20 25 30 35 40

L/W /NF=0.13/4/18

Mag(S11)

Freq (GHz)

Vd=0V ; Vg=0.4~1V

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

0 5 10 15 20 25 30 35 40

L/W /NF=0.13/4/18

Re(Y11)

Freq (GHz)

Vd=0V ; Vg=0.4~1V

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

0.02 0.03 0.040.05 0.06 0.07 0.080.09 0.10 0.11 0.120.13 0.14 0.15 0.16 0.17

Re(Y22)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz) Vg=0.4V

L/W /NF=0.13/4/18

Re(Y12)

Freq (GHz)

Vd=0V ; Vg=0.4~1V

Im(Y21)Im(Y12) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

Fig. 5.2 The comparison of 3T devices at Vgs>>Vth, Vds=0V and L=0.13um

0 5 10 15 20 25 30 35 40

1.05 L/W /NF=0.18/4/18

Mag(S11)

Freq (GHz)

Vd=1V ; Vg=0.4~1V

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

-150 -100 -50 0

Freq (GHz)

0 5 10 15 20 25 30 35 40

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

L/W /NF=0.13/4/18 Vd=1V ; Vg=0.4~1V

Symbol:measurement

Re(Y11)

Freq (GHz) Line:simulation

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

0.00 0.01 0.02

Freq (GHz) Vg=0.4V

L/W /NF=0.13/4/18

Re(Y12)

Freq (GHz)

Vd=1V ; Vg=0.4~1V

Im(Y21)Im(Y12) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45-0.11

Freq (GHz)

Fig. 5.3 The comparison of 3T devices at Vgs>>Vth, Vds=1V and L =0.13um

Fig. 5.4 The modified equivalent circuit of 4-port device at Vgs=Vds=0V

Fig. 5.5 The modified equivalent circuit of 4-port device at Vgs=1.2V, Vds=0V

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Mag(SGG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Mag(SGB)Mag(SGS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Mag(SGD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Mag(SSG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

0.250.30 0.350.40 0.450.50 0.550.60 0.650.70 0.750.80 0.850.90 0.95 1.001.05

NF=6 NF=18 NF=36

Mag(SSB)Mag(SSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Mag(SSD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Mag(SDG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Mag(SDB) Mag(SDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

0.25 0.30 0.350.40 0.45 0.500.55 0.600.65 0.70 0.750.80 0.850.90 0.951.00 1.05

NF=6 NF=18 NF=36

Mag(SDD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Mag(SBG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Mag(SBB)Mag(SBS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Mag(SBD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

The measured and simulated Mag(S) of 4-port devices at Vgs=Vds=

Fig. 5.6 0V

0 5 10 15 20 25 30 35 40

-180-170 -160-150 -140-130 -120-110 -100-90-80-70-60-50-40-30-20-10100

L/W =0.13/4

Phase(SGG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Phase(SGB)Phase(SGS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SGD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Phase(SSG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

-180-170 -160-150 -140-130 -120-110 -100-90

Phase(SSB)Phase(SSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SSD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Phase(SDG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Phase(SDB)Phase(SDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SDD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Phase(SBG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Phase(SBB)Phase(SBS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SBD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45-100

Freq (GHz)

The measured and simulated Phase(S) of 4-port devices at Vgs=Vds=0V Fig. 5.7

L/W =0.13/4

Re(YGG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Re(YGB)Re(YGS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Re(YSG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Re(YSB)Re(YSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

Freq (GHz) Symbol:measurement

Re(YDB)Re(YDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45-0.003

Freq (GHz)

0 5 10 15 20 25 30 35 40

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45-0.002

Freq (GHz)

Fig. 5.8 The measured and simulated Re(Y) of 4-port devices at Vgs=Vds=0V

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Im(YGG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Im(YGB)Im(YGS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Im(YSG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Im(YSB)Im(YSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45-0.002

Freq (GHz)

0 5 10 15 20 25 30 35 40

Freq (GHz) Symbol:measurement

Im(YDB)Im(YDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Im(YBG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Im(YBB)Im(YBS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

The measured and simulated Im(Y) of 4-port devices at Vgs=Vds=0V Fig. 5.9

L/W =0.13/4

Mag(SGG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Mag(SGB)Mag(SGS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Mag(SGD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Mag(SSG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Mag(SSB)Mag(SSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Mag(SSD)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz) Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Mag(SDG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Mag(SDB)Mag(SDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Mag(SDD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Mag(SBG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Mag(SBB)Mag(SBS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Mag(SBD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

Fig. 5.10 The measured and simulated Mag(S) of 4-port devices at Vgs=1.2V, Vds=0V

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Phase(SGG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Phase(SGB)Phase(SGS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SGD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45-150

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Phase(SSG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Phase(SSB)Phase(SSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SSD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

Phase(SDG)

Freq (GHz) Line:simulation

Phase(SDB)Phase(SDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SDD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Phase(SBG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Phase(SBB)Phase(SBS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SBD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

The measured and simulated Phase(S) of 4-port devices at Vgs=1.2V

Fig. 5.11 , Vds=0V

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Re(YGG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Re(YGB)Re(YGS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Re(YSG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Re(YSB)Re(YSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

Freq (GHz) Symbol:measurement

Re(YDB)Re(YDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45 0.000.02

0.040.06 0.080.10 0.120.14 0.160.18 0.200.22 0.240.26 0.280.30 0.320.34 0.360.38

NF=6 NF=18 NF=36

Re(YDD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Re(YBG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

The measured and simulated Re(Y) of 4-port devices at Vgs=1.2V

Fig. 5.12 , Vds=0V

L/W =0.13/4

Im(YGG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Im(YGB)Im(YGS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Im(YSG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Im(YSB)Im(YSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Im(YDG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Im(YDB)Im(YDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45-0.002

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Im(YBG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Im(YBB)Im(YBS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45-0.010

Freq (GHz)

The measured and simulated Im(Y) of 4-port devices at Vgs=1.2V

Fig. 5.13 ,Vds=0V

Fig. 5.14 The modified equivalent circuit of 4-port device at Vgs=1.2V, Vds=1.2V

0 5 10 15 20 25 30 35 40

0.00 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10

L/W =0.13/4

Mag(SBG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Symbol:measurement Line:simulation

NF=6 NF=18 NF=36

0 5 10 15 20 25 30 35 40

0.00 0.05 0.10 0.15

NF=6 NF=18 NF=36

Mag(SBB)Mag(SBS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

0.00 0.05 0.10

NF=6 NF=18 NF=36

Mag(SBD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 NF=6 NF=18 NF=36

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Mag(SSG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Mag(SSB)Mag(SSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Mag(SSD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

0.040.06 0.080.10 0.120.14 0.160.18 0.200.22 0.240.26 0.280.30 0.320.34 0.360.38 NF=6

NF=18 NF=36

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Mag(SDG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Mag(SDB)Mag(SDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Mag(SDD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

0.06 0.080.10 0.120.14 0.160.18 0.200.22 0.24 0.26 0.280.30 0.320.34 0.360.38 NF=6

NF=18 NF=36

Freq (GHz)

0 5 10 15 20 25 30 35 40

Mag(SBG)

Freq (GHz) Line:simulation

Mag(SBB)Mag(SBS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Mag(SBD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

Fig. 5.15 The measured and simulated Mag(S) of 4-port devices at Vgs=Vds=1.2V

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Phase(SGG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Phase(SGB)Phase(SGS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SGD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

Phase(SSG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Phase(SSB)Phase(SSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SSD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45-80

Freq (GHz)

0 5 10 15 20 25 30 35 40 100110 120130 140150 160170 180190

L/W =0.13/4

Phase(SDG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Phase(SDB)Phase(SDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SDD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40 -50

0 50 100

L/W =0.13/4

Phase(SBG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Phase(SBB)Phase(SBS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Phase(SBD)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

The measured and simulated Phase(S) of 4-port devices at Vgs=Vds=1.2V Fig. 5.16

L/W =0.13/4

Re(YGG)

Freq (GHz)

Vd=0V ; Vg=0V ; Vs=0V ; Vb=0V

Re(YGB)Re(YGS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Re(YSG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V 0.000.01 0.020.03 0.040.05 0.060.07 0.080.09 0.100.11 0.120.13 0.140.15 NF=6

NF=18 NF=36

Re(YSB)Re(YSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Re(YDG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Re(YDB)Re(YDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Re(YBG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

The measured and simulated Re(Y) of 4-port devices at Vgs=Vds=

Fig. 5.17 1.2V

L/W =0.13/4

Im(YGG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

0 5 10 15 20 25 30 35 40 -0.040-0.035-0.030-0.025-0.020-0.015-0.010-0.0050.0000.0050.0100.0150.0200.0250.0300.0350.0400.0450.0500.055 NF=6

NF=18 NF=36

Im(YGB)Im(YGS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45 -0.0050.0000.0050.010 0.015

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Im(YSG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Im(YSB)Im(YSS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

Freq (GHz) Symbol:measurement

Im(YDB)Im(YDS) Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

0 5 10 15 20 25 30 35 40

L/W =0.13/4

Im(YBG)

Freq (GHz)

Vd=0V ; Vg=1.2V ; Vs=0V ; Vb=0V

Im(YBB)Im(YBS)

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

-5 0 5 10 15 20 25 30 35 40 45

Freq (GHz)

The measured and simulated Im(Y) of 4-port devices at Vgs=Vds=

Fig. 5.18 1.2V

Chapter 6

Conclusions and Future Work

6.1 Conclusions

Base on the small signal equivalent circuit and model parameter extraction method are proposed previously in our laboratory, to develop the equivalent circuit and extraction method relevant to the test structures under various biases further, both two-port 3T and four-port 4T RF MOSFETs are covered in this work.

An extensive verification has been performed on the proposed small signal equivalent circuit models through simulation under various biases. The model parameters manifest a good scalability over gate lengths and gate finger numbers under a specified finger width. The accuracy over frequencies and biases and scalability over device geometries is useful to improve accuracy of high frequency circuit simulation.

6.2 Future Work

6.2.1 Parasitic resistance extraction

According to the equivalent circuit of short pad, the extracted resistance should be frequency independent, the extracted results show that the common part of resistance is almost const with the frequency, but the terminal resistance is not. To develop the parasitic resistance and inductance extraction method and the suitable dummy structure to de-embed in the future.

6.2.2 Substrate resistance extraction

Substrate resistance is a significant parameter for the MOSFET modeling, the

substrate network parameters extraction discussed in many researches, and it is a challenging issue for the accuracy extraction and modeling until now, it is mentioned that the substrate resistance effect the Im(Y24) and Im(Y34) with the frequency, in this study, substrate resistance extracted from the reduced 2x2 matrix, according to the equivalent circuit of four-port MOSFET, it is a feasible way to extract substrate resistance directly on four-port MOSFET in theory, even when the MOSFET operate at saturation region.

6.2.3 Small signal equivalent circuit with body biases

The equivalent circuit established in three kinds of different operate region, the simulation result is approximately match with measurement when Vds=0V, but the equivalent circuit operate at saturation region, the output impedance have to improve the extraction method and modified the equivalent circuit to make the accurate simulation behaviors.

According to four-port devices, introduction of the equivalent circuit establishment and the extraction method when Vbs=0V. it is necessary to develop the equivalent circuit when operate with body biases in the feature, it have to include the asymmetry channel phenomenon, transcapacitances, transconductance (gm, gds, gmb), the complicated substrate networks and others physical mechanism parameters in the completed MOSFET small signal equivalent circuit modeling.

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