Voltage-type active-matrix addressing

Active-matrix addressing overcomes the crosstalk limitation of passive-matrix by integrating switching devices at the cross point of the row (scan or gate) and column (data) lines, and thereby isolating the off pixels from these select voltage lines. The TFT active-matrix array designs are commonly optimized using computer simulations to analyze electrical performance based on statistically extracted TFT and fabrication process parameters. While this approach is the most accurate way to predict the statistical mean and variance in display performance, it is more instructive to carry out a simple, physically based parameter analysis to identify functional dependencies, performance limits, and minimum requirements. The analysis presented here is applicable to any kind of TFT processing technology.

Using an active-matrix addressing can solve the image contrast and column electrode pattering concern of passive-matrix addressing. In the AM addressing, a transistor is placed at each pixel to separate the effect of the data line (column electrode) voltage and the scan line (row electrode) voltage on the voltage across the OLED material. A common cathode material (MgAg, Al-Li) is used to eliminate the need of patterning the electron injecting electrode. Within AM-OLED designs, a variety of pixel architectures have been proposed ^[6]. Different pixel architectures may

contain different numbers of transistors per pixel. The simplest design uses one transistor per pixel which is similar to the pixel circuit for AM-LCD, as shown in Fig.

3-2. A single transistor design approach has the advantage of increased contrast by

isolating the data line and scan line from OLED compared to a passive matrix design, and will have a higher yield than other designs containing more than 1 TFT per pixel.

However, in this approach the voltage signal in storage capacitor CST is leaking out through OLED even the TFT TSW is OFF, so that the luminance cannot be kept constant during entire frame time. Therefore, each pixel is needed to pulse ON for a duty factor 1/Ns of the frame time. This requires the instantaneous OLED current to be much higher than the average current, which still leads to faster degradation of the OLED material.

(a) (b)

Fig. 3-2. (a) Conventional single-transistor-single-capacitor (1T-1C) pixel circuit for AM-LCD. (b) 1T-1C pixel circuit for AM-OLED using OLED instead of LC.

The pixel circuit for AM-OLED must have a function to generate the stable driving current for the OLED throughout one frame period to avoid the high current pulse native to the single TFT design. A pixel design involving two transistors using n-channel TFTs is shown in Fig. 3-3(a). When a scan line is selected, the voltage

signal VDATA from data line is written via the switching transistor TSW to the gate of the driving transistor TDV. The written voltage VDATA is thereby retained in CST for a complete frame period. Driving transistor TDV operates in the saturation regime where the OLED driving current has little dependence on the source-to-drain voltage. This pixel circuit allows the pixel to deliver a small current during the entire frame period.

(a) (b)

Fig. 3-3. Double-transistor-single-capacitor configuration of AM-OLED pixel circuit with (a) n-channel driving TFT (T

DV

) and (b) p-channel T

DV

.

Though the average current through the OLED material is the same, the peak current is greatly reduced which leads to increased brightness and OLED material lifetime.

The OLED driving current IOLED generated by n-channel TDV is

( )

²

2 1

th OLED DATA

DV DV OX FE

OLED V V V

L C W

I =

µ

⋅ ⋅ ⋅ − −

Eq. 3-2

where µFE, COX, WDV, LDV, VOLED and Vth are the field-effect mobility, gate oxide capacitance per unit area, channel width, channel length, OLED cross voltage and TFT threshold voltage, respectively. With n-channel TDV configuration, designing data voltage VDATA should take consideration of the OLED voltage. In other word, the VDATA includes not only the over-drive voltage of TDV but also the OLED cross

voltage so that the voltage swing is large. The pixel circuit can also be implemented with p-channel TFT as shown in Fig. 3-3(b). Since the most commonly used technologies for conventional AM-LCD are a-Si and poly-Si TFTs, both of them are compatible with large area glass substrate processes, which is necessary to fabricate displays at reasonable cost. Poly-Si TFT technology was chosen for AM-OLED display because of its higher mobility and greater stability compared with a-Si TFT. In addition, poly-Si TFT technology has ability to provide p-channel devices for not only pixel circuits but also integrated drivers. The performance of p-channel TFT is typically lower than that of n-channel TFT made from the same material. However, as p-channel TFT is used as driving transistor TDV in pixel design, the gate-to-source voltage of TDV is related to the gate node and Vdd electrode and the driving current can be expressed as:

( )

²

According to this configuration, the OLED turn-on voltage is of little significance to the driving current, therefore the voltage swing can be reduced. The OLED driving current as a function of data voltage in n-channel and p-channel TDV

configurations are shown in Fig. 3-4. As discussed above, the swing of VDATA for n-channel TDV is 4V in order to achieve the maximum driving current or 1.7 µA, almost a factor of three larger than that of p-channel TDV. Although the n-channel TFT has higher mobility than p-channel TFT, the large data voltage swing increases the high transient power consumption as well as the long charge-up time for the pixel circuit. Besides, the degradation of OLED material may affect the OLED threshold voltage and then change the gate-to-source voltage of TDV, consequently, resulting in the luminance variation. Due to the native property of p-channel TFT, the stable luminance can be achieved by the voltage-to-current conversion of TDV regardless of

OLED degradation. The small data voltage swing can speed up the programming time and reduce the power consumption. Nevertheless, it should be noted that the resistance against to the noise must be high enough when design the gray levels of AM-OLED because the small voltage swing leads to the small voltage step between each gray level.

Fig. 3-4. OLED driving current as a function of input data voltage at different types of T

DV

: (a) n-channel T

DV

, (b) p-channel T

DV

.

3.3 Definition of operation point

Since the pixel circuit with p-channel TFT in Fig. 3-4(b) can be similarly analyzed as the n-channel TFT in Fig. 3-4(a), the following discussion only focuses on the pixel electrode circuit with n-channel TFT. The ID–VDS characteristics of an n-channel TFT are shown schematically in Fig. 3-5, along with the load line resulting from the OLED I–V characteristics. The knees in the ID–VDS curves between the linear and saturation regimes are at VDS=VGS-Vth, and the saturation current

is

( )

² of the TFT respectively ^[7]. The criterion for the operation in the saturation regime is

OLED th

GS V Vdd V

V − ≤ − , i.e.

(

DV DV

)

OX FE

OLED

OLED C W L

V I

Vdd ≥ + ⋅

µ 2

Eq. 3-4

where IOLED is the OLED drive current required to achieve full brightness, and VOLED

is the corresponding OLED voltage. A low Vdd is desirable to achieve low-panel power consumption and to make the technology suitable for portable, battery-powered applications. The power penalty due to the introduction of TDV is ∆P=V_OLED Vdd. For a pixel driven to full brightness, ∆P=1+

(

2I_OLED

µ

_FE⋅C_OX ⋅

(

W_DV L_DV

) )

Vdd . The channel width of TDV, i.e. WDV, is limited by the pixel dimension, channel length LDV is limited by short channel effects; COX is determined by the oxide layer thickness and material properties, and depends on the channel material.

Fig. 3-5. Operation point calculation according to the loading line of TFT and OLED.

The average current necessary to produce a bright display (100cd/m²) is approximately 10mA/cm^2[8]. If we assume a pixel size of 150µm x 150µm, an OLED driving current of 2.25µA is necessary. Assuming a TFT operating in saturation region,

the required field-effect mobility can be calculated according to

(

DV DV²

)

OX

(

GS th

)

²

OLED

FE W L C V V

I

= −

µ

Eq. 3-5

To achieve the proper current levels using small device geometry i.e. WDV/LDV=2, and a thin gate oxide layer, a high mobility is required. Since amorphous silicon cannot be used because of mobility less than 1 cm²/V-s and therefore cannot deliver enough current, polysilicon based transistors becomes the better choice for AM-OLED’s. It is important to note that the quantum efficiency of OLED material is substantially improved in recent days. As a result, the mobility requirement is much less and, strictly from a drive current perspective, a-Si TFTs may be adequate.

3.4 Pixel voltage error due to parasitic capacitance of TFT

The switching TFT TSW in the pixel operates as an analog switch, whereby, when the gate of the TFT in turn-on, it is desired that the TFT can accurately transfer a precise data voltage to the CST and the gate of TDV. The available precision of charging up the total pixel capacitance to the data voltage depends on many factors, most of which are physical dimensions related to the fabrication and layout design process. The TFT parasitic capacitances CGD and CGS are determined by the overlay area between the drain and gate electrodes, and the source and gate electrodes, respectively. The smaller the channel length, the larger the parasitic capacitance can be formed from overlap area. Therefore, the TFT parasitic capacitance is minimized by making the area of the drain, source, and gate electrodes as small as possible or by increasing the thickness of oxide insulation layer.

The design of TSW is similar to that of the switching transistor in AM-LCD ^[9][10]. Assume that the gate voltage of TSW is VG-SW=VH when a scan line is addressed, and

the voltage on the data line is VDATA. At the end of the charging period, the pixel capacitance, CPIX (the sum of the storage capacitance CST, the CGD, and the CGS of TDV), stores charge CPIX·VDATA, while the CGS of TSW stores charge CGS-SW(VDATA-Vth).

When VG is brought to zero, the CPIX and CGS-SW form a voltage divider of transfer ratio CGS₋SW

(

CGS₋SW +CPIX

)

. During the holding period, the voltage at the gate of TDV (also the storage node) can be expressed as

⎥⎦

To have VG-DV≈VDATA during this period, it is important that CPIX>>CGS-SW, therefore necessitating a separate storage capacitance. Even with a large CST, VG-DV is still small than VDATA due to the CGS during the holding period. To eliminate this difference, the CST can be connected to the previous scan line instead of ground to form the “CST on gate” configuration. A compensation voltage V_COMP =−

(

C_GS−SW C_ST

)

⋅V_H introduced from previous scan line coupling through the CST can substantially offset the voltage error as shown in Eq. 3-7. It should be noted that the CST is included in the design of the pixel for two reasons, one of which is to reduce the magnitude of the error ∆VG-DV, and to reduce the percentage of pixel charge loss when leakage current presents during the TFT OFF state.

3.5 ON/OFF ratio and leakage current

The required on–off ratio of TSW is estimated as follows: to charge the CST to a voltage VG-DV within the scanning time, the on current ION, must satisfy

s

where Tf is the frame time. To maintain the VG-DV for entire frame time, the leakage current in OFF state, IOFF, must satisfy: gray-level increment. After the pixel is turn-off, the data voltage may unintentionally decrease due to leakage current. Several sources for leakage current may exist, such as TFT drain-to-source leakage, TFT channel photon current, and low-resistance storage capacitance insulator film. Since the leakage current of storage capacitance insulator, typically made of SiOx and SiNx, are less than 1nA/cm², the black matrix can be used to shield the incident light to reduce the photon current. Hence the source-to-drain leakage of TFT can be considered as the only source of leakage current. As seen in Eq.

3-9 ^OFF T_f^PIX

(

N_s ^G

)

^DVN_s

3-9, the maximum allowed leakage current is proportional to the pixel capacitance

CPIX. In addition, differences in TFT fabrication technologies, device structure, and physical layout dimensions, such as channel width and length, can also influence the TFT leakage current. From Eq. 3-8 to Eq. 3-9, the number of gray levels is derived:

( ) (

S

)

L TFT, as listed in Table 3- 1. Therefore, both types of TFT can satisfy the ON–OFF ratio requirement.

Table 3- 1. Field effect mobility and ON-OFF ratio of TFTs for different technologies.

Channel material Field effect mobility

(cm²/V-sec) ON-OFF ratio

a-Si 0.1-1.0 10⁷

n-channel poly-Si 100-500 10⁶

p-channel poly-Si 10-50 10⁶

pentacene 1.5 10⁸

3.6 Mobility for T

SW

The field-effect mobility µFE of the TSW required by AM-OLED displays is estimated as follows. Since TSW operates in the linear regime, the drain current variation related to the drain-to-source voltage is expressed as

(

GS SW th

)

In order to charge CST within the scanning time, we require that

S achieved by conventional a-Si TFT, and all poly-Si TFT. Consequently, the mobility is not a critical issue for TSW in AM-OLED pixel design.

3.7 Summary

Basic design considerations of PM-OLED and AM-OLED were introduced.

Especially for AM-OLED, we systematically and quantitatively analyzed the design of AM-OLED based on the characteristics of TFTs. The device parameters including leakage current, threshold voltage, mobility and parasitic capacitance were taken into account to estimate the basic requirements for AM-OLED’s.

Reference

1. L.E. Tannas, Jr., “Flat Panel Displays and CRTs,” New York: Vance Nostrand Reinhold, 1985.

2. C. Hosokawa, H. Tokailin, H. Higashi, and T. Kusumoto, “Transient behavior of organic thin film electrolu,inescence,” Appl. Phys. Lett., vol. 60, pp. 1220, 1992.

3 . H. Nakamura, C. Hosokawa, and T. Kusumoto, “Transient behavior of organic electroluminescent cells,” in Inorganic and Organic Electroluminescence/EL 96 Berlin, 1996, pp. 95.

4. C. Hosokawa, E. Eida, M. Matsuura, K. Fukuoka, H. Nakamura, and T. Kusumoto,

“Organic multicolor EL display with fine pixels,” in Dig. Soc. Information Display Int. Symp., 1997, vol. 28, pp. 1073-1076.

5. G. Gu and S.R. Forrest, “Design of Flat-Panel Displays Based on Organic Light Emitting Devices”, IEEE J. Sel. Topics Qun. Electronics, Vol. 4, pp. 83, 1998.]

6. M. K. Hatalis, M. Stewart, C. W. Tang, and J. Burtis, “Polysilicon TFT active matrix organic EL displays,” Proc. SPIE, vol. 3057, p. 277, 1997.

7. S. M. Sze, Semiconductor Devices, Physics and Technology. New York: Wiley, 1985.

8. C. W. Tang and S. A. VanSlyke, “Organic electroluminescent diodes,”Appl. Phys. Lett., vol.

51, pp. 913–915, 1987.

9. M. S. Shur, M. D. Jacunsky, H. D. Slade, and M. Hack, “Analytical models for amorphous-silicon and polisilicon thin-film transistors for high-definition-display technology,” J. SID, vol. 3 no. 4, pp. 223–236, 1995.

10. E. Lueder, “Fundamentals of Passive and Active Addressed Liquid-Crystal Displays,”

Short Course S-1, Soc. Inform. Display, San Diego, CA, May 1996.

Chapter 4

AC Driving Scheme for Voltage Driven AMOLED

4.1 Introduction

Since device aging and fabrication processes cause variations in the characteristics of OLEDs and TFTs, the current driving scheme is capable of compensating the variations and produce the desired brightness uniformity ^[1][2]. In recent years, owing to the progress of processing technology and development of OLED material, the characteristic variations can be eliminated. In this case, the voltage driving scheme becomes more attractive because of its simple structure, high aperture ratio, and compatibility with AM-LCD drivers. However, the intrinsic display loading effects induced by voltage drops across the parasitic resistance of the AM addressing wires still result in brightness non-uniformity in voltage driven AM-OLED displays. Increasing the width of the addressing wires can reduce the parasitic resistance, however, the aperture ratio will also be decreased. It is expected that the voltage drop caused by the parasitic resistance will become the critical drawback in display applications of large size and high resolution.

In this chapter, we propose a simple AC voltage driving scheme with a conventional 2 transistor (2-T) pixel circuit for AM-OLED displays. By means of the charge feed-through mechanism, the proposed AC driving scheme can counteract the voltage drop caused by the parasitic resistance. The experimental results show that the AC driving scheme can effectively improve the brightness uniformity.

4.2 AC driving scheme & panel architecture

The conventional DC voltage driving scheme drives the pixel electrode circuit with invariable voltages at both the power source and the ground electrode. The OLED driven by 2-T pixel circuit is always in forward bias condition, as schematically shown in Fig. 4-1. In this pixel circuit, the OLED is connected to ground and the data voltage stored in a storage capacitor (CST) keeps the OLED illuminating continuously. The gate-to-source voltage (VGS), equivalent to |VDATA – VDD|, can generate the current signal to the OLED based on the transconductance of the driving TFT (TDV). However, the driving current passing through the VDD

electrode produces a voltage drop on account of the parasitic resistance (R) of the addressing wire. Even if an identical data voltage is programmed into storage node and stored by CST, VGS at each TDV is different from pixel to pixel along the VDD

electrode, consequently, generating different driving currents. This intrinsic resistance of the addressing wire results in a brightness gradient from both sides to the central part of the panel.

Fig. 4-1. A schematic diagram demonstrates the voltage drop caused by the intrinsic

parasitic resistance (R) at V

DD

electrode.

In the proposed AC voltage driving scheme, the OLED cathode is connected to an AC power supply instead of the ground, as shown in Fig. 4-2. The alternating voltage signal of the AC power supply divides the pixel operation into programming and flashing periods.

V_SCAN

VDATA

VDD

Conventional DC driving

Programming & flashing

t

VSCAN

VDATA

VDD

AC driving

Programming Flashing

t

TSW

TSW

TDV

TDV

(a) (b)

Fig. 4-2. The pixel circuits for (a) conventional DC and (b) AC voltage driving schemes.

First, in the programming period the voltage at the OLED cathode is switched to VDD to turn the OLED off. At this moment, neither a driving current nor a voltage drop is generated in the AM-OLED display panel. Therefore, the initial VGS which is identical to the difference between VDD and VDATA will be stored in CST in each pixel.

In the following flashing period, the cathode voltage is switched to ground after programming all of the pixel circuits and the OLED begins to flash. Owing to the parasitic capacitance formed by OLED anode and cathode and that is connected serially with gate overlap capacitance of TDV (CGS-DV), the change of OLED cathode

voltage will alter the data voltage stored in the CST and reduce the accuracy. Therefore the changed VDATA can be expressed as:

ST

Fortunately, the deviation of VDATA (second term in Eq. 4-1) is constant and can be taken into consideration in advance when designing the display panel. By adding an additional voltage to the original VDATA before writing into CST, the reverse bias induced data voltage deviation can be effectively compensated.

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

Even though the driving current still produces the voltage drop ∆VDD along the VDD electrode, VDATA at the storage node is also decreased by the feed-through effect of CST and the CGD of TSW and TDV. The data voltage drop ∆VDATA at the storage node can be expressed as:

)

>> 3 fF (CGS or CGD), ∆VDATA is almost equal to ∆VDD, implying that the VGS of TDV is always kept at the initial value. Hence, the voltage drop does not affect the brightness of the panel. According to our design (WSW/LSW=6/5, WDV/LDV=6/15, CST=500 fF), the ratio of ∆VDATA to ∆VDD is from 99.92% to 99.78% as ∆VDD varies from 0.1 to 1.5V, as shown in Fig. 4-3. ∆VDATA

to ∆V

DD

ratio as a function of ∆V

DD..

4.3 Experiment & Discussion

In order to demonstrate an AM-OLED display with the proposed AC driving scheme, we have fabricated a 2.2 inch panel with a resolution of 176 x RGB x 220, by a top-gate poly-Si process. A buffer and an a-Si layer were deposited by PECVD.

Next a XeCl excimer laser was used to crystallize the a-Si layer. After definition of the active island and deposition of the gate insulator, the gate metal was sputtered and patterned. The n-channel TFT S/D and LDD and the p-channel TFT S/D were then doped. Finally, the TFTs were formed after dopant activation, interlayer dielectric deposition, hydrogenation, contact via formation and metallization. Once the TFT process is completed, a hole injection material PEDOT:PSS and a green light-emitting copolymer were spin-coated sequentially onto the ITO anode. Finally, a Ca/Al

Next a XeCl excimer laser was used to crystallize the a-Si layer. After definition of the active island and deposition of the gate insulator, the gate metal was sputtered and patterned. The n-channel TFT S/D and LDD and the p-channel TFT S/D were then doped. Finally, the TFTs were formed after dopant activation, interlayer dielectric deposition, hydrogenation, contact via formation and metallization. Once the TFT process is completed, a hole injection material PEDOT:PSS and a green light-emitting copolymer were spin-coated sequentially onto the ITO anode. Finally, a Ca/Al

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