Impact of strain on gate-induced floating body effect for partially depleted silicon-on-insulator p-type metal-oxide-semiconductor-field-effect-transistors

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Impact of strain on gate-induced

ﬂoating body effect for partially depleted

silicon-on-insulator p-type metal

–oxide–semiconductor-ﬁeld-effect-transistors

Wen-Hung Lo

a

, Ting-Chang Chang

a,b,

⁎

, Chih-Hao Dai

c

, Wan-Lin Chung

a

, Ching-En Chen

d

, Szu-Han Ho

d

,

Jyun-Yu Tsai

a

, Hua-Mao Chen

e

, Guan-Ru Liu

a

, Osbert Cheng

f

, Cheng-Tung Huang

f

a

Department of Physics, National Sun Yat-Sen University, Kaohsiung, Taiwan, ROC

b

Center for Nanoscience and Nanotechnology, National Sun Yat-Sen University, Kaohsiung, Taiwan, ROC

c

Department of Photonics, National Sun Yat-Sen University, Kaohsiung, Taiwan, ROC

d

Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan, ROC

e_{Department of Photonics & Institute of Electro-Optical Engineering, National Chiao Tung University, Hsinchu, Taiwan, ROC} f

Device Department, United Microelectronics Corporation, Tainan Science Park, Taiwan, ROC

a b s t r a c t

a r t i c l e i n f o

Available online 6 November 2012 Keywords: PD SOI p-MOSFETs GIFBE NBTI Strain

This work investigates impact of mechanical strain on gate-induced-floating-body-effect (GIFBE) for partially de-pleted silicon-on-insulator p-type metal–oxide–semiconductor field effect transistors (PD SOI p-MOSFETs). First part, the original mechanism of GIFBE on PD SOI p-MOSFETs is studied. The experimental results indicate that GIFBE causes a reduction in oxide electricfield (Eox), resulting in an underestimate of negative-bias temperature in-stability (NBTI) degradation. This can be attributed to the electrons tunneling from the process-induced partial n+ poly gate and anode electron injection (AEI) model, rather than the electron valence band tunneling (EVB) widely accepted as the mechanism for n-MOSFETs. And then, the second part shows that the strained FB device has less NBTI degradation than the unstrained devices. This behavior can be attributed to the fact that more electron accu-mulation was induced by strain-induced band gap narrowing, reducing NBTI significantly.

1. Introduction

Even silicon-on-insulator (SOI) CMOS devices are attractive for switching application because of their high speed, lower power dissi-pation, and the ability to restrain latch-up, SOI devices has some crit-ical issues leads instabilities such asfloating body (FB) effect. For partially depleted (PD) SOI devices, due to their relatively thick thin films, the impact ionization mechanism near the drain will cause the ionization charges to accumulate in the neutral region, leading to the instability of body potential[1]. With aggressive scaling of the gate oxide, the floating-body (FB) potential is controlled not only by well known impact ionization mechanisms but also by a grad-ual increase of the tunneling current. This new FB effect, called gate-induced-FB-effect (GIFBE), has been observed in both PD SOI MOSFETs[2,3]and fully depleted transistors[4]. However, the origin of these electrons is not clear yet due to the fact that the electron con-centration is insufficient in the p+_{poly gate of p-MOSFETs. To the}

best of our knowledge, several studies consider that the model of electron valence band (EVB) tunneling should be responsible for the GIFBE in SOI n-MOSFETs [2–4]. But, the new mechanism for SOI

n-MOSFETs has been reported which demonstrates the GIFBE is due to impact ionization, named anode hole injection (AHI)[5–7]. As de-vices turn on, inversion layer supplies carriers to result in gate tunnel-ing current, generattunnel-ing electron–hole pairs due to impact ionization within poly gate depleted region. Therefore, ionization-induced holes tunnel back toward active layer and gather at body to attribute to GIFBE.

However, there are a few studies conﬁrming the validity of EVB-induced GIFBE for p-MOSFETs. Therefore, the aim of this work is to clarify the origin of electrons on the GIFBE in PD SOI p-MOSFETs by adopting systematical operation conditions. The ex-perimental results reveal that the GIFBE in p-MOSFETs can be partial-ly attributed to the process-induced partial n+_{poly gate of body tied}

devices. However, the major electron source generated by NBTI stress is significantly related to the inversion channel supplied from the source and drain, and then reducing NBTI due to lower oxide electric field[8–10]. Therefore, GIFBE in SOI p-MOSFET is dominated by the anode electron injection (AEI) model which is similar to the anode hole injection (AHI)[5]in this work, to explain how this main elec-tron origin is generated during NBTI. In detail, AEI is a mechanism which is associated with S/D. As channel invert, channel holes come from S/D could leak toward gate by tunneling, and then inducing electron–hole pairs. After that, impact-induced electrons can tunnel back to channel again, leadingfloating body effect (FBE). In addition, strained silicon technique offers an alternative method to enhance ⁎ Corresponding author at: Department of Physics, National Sun Yat-Sen University,

Kaohsiung, Taiwan, ROC.

E-mail address:[email protected](T.-C. Chang).

http://dx.doi.org/10.1016/j.tsf.2012.09.087

Contents lists available atSciVerse ScienceDirect

Thin Solid Films

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the SOI performance as devices are scaled down below 90 nm, requir-ing increase in channel doprequir-ing[11]. Therefore, the use of strained sil-icon technique offers an alternative method to enhance the SOI performance through an increase in channel mobility. According that, to comprehend the influence of the strain effect on GIFBE seems to be necessary and interested. In this part, the mechanical strain effect on GIFBE was observed from NBTI behavior. It can be found that the GIFBE becomes significant under mechanical strain which is obtained from a decreasing NBTI behavior. This paper investigates the GIFBE for PD SOI p-MOSFETs infirst part, and discussing the impact of strain on GIFBE by analysis of NBTI behavior secondly.

2. Experiment

Using 65-nm SOI CMOS technology, partially depleted SOI p-channel metal–oxide–semiconductor ﬁeld-effect transistors (PD SOI p-MOSFETs) with p+_{poly-Si gate are produced in a T-gate structure. The SOI}_{ﬁlm and}

buried oxide thicknesses are 75 and 145 nm, respectively. The gate oxide has a thickness of 12 Å, and the channel doping concentration is about 3×1018_cm−3_{. The channel is along the}_{b110> direction on the (100)}

substrate. In this letter, devices have channel lengths (L) of 0.2μm and widths (W) of 1.0μm. A stress gate voltage of −1.8 V+Vthwas applied

to the gate electrode at 125 °C for NBTI, while the source and drain were grounded. The threshold voltage (Vth) was deﬁned as the maximum of

transconductor (Gmmax) in the linear region. All electrical characteristics

were measured using an Agilent B1500 semiconductor parameter analyzer.

3. Result and discussion

3.1. Part I: gate-induced-ﬂoating-body-effect (GIFBE) on PD SOI p-channel MOSFETs

Fig. 1shows the NBTI-induced threshold voltage (Vth) shift versus

time for the PD SOI p-MOSFET FB (floating body) and GB (grounded body) devices. It can be seen that the FB device has less shift than GB device significantly. This is because electrons accumulate at body terminal to make the oxide electricfield (Eox) lowering effectively

during stress, therefore reducing NBTI degradation. The gate current is shown in the inset ofFig. 1, which also decreases simultaneously, evidencing the restrain of Eox. To examine these additional carriers,

Fig. 2(a) shows the ID–VGand Gm–VGat VD=−0.05 V. It can be

ob-served that the Vthshifts toward left and Gmenhances under linear

region which seems FB effect behavior. We suggest that the accumu-lation of elections result from gate-induced-ﬂoating-body-effect (GIFBE), since the thickness of gate oxide as thin as inducing the leak-age current by tunneling.

Furthermore,Fig. 2(b) shows the gate current (IG) and the body

current (IB) versus the gate voltage (VG) for different areas of p+

poly gate (1–0.2 μm2

), while the source/drain (S/D) and body are grounded. It can be seen that IB enhances as IG increases, which

means the original source of IBis associated with IGstrongly. In

addi-tion, regardless of the different areas of poly gate, IBalways shows a

linear increase until VG=−1 V, after that shows an exponential

in-crease as VGb−1 V. This phenomenon exhibits that the mechanisms

closely related to the gate leakage current should be the attribution for these two stages of IB, leading the GIFBE. In order to analyze

those body current, it has been reported that gate leakage consists of the following three components as shown in the inset ofFig. 2, in-cluding 1) hole tunneling from the valence band (HVB), 2) electron tunneling from the valence band (EVB) and 3) electron tunneling from the conduction band (ECB). Both components of ECB and EVB can be observed from the body terminal, which seem to contribute on the two stages of IB, respectively. The ECBﬁrst occurs as a gate

bias is applied. And then, as the VGis large enough, the EVB should

in-duce additional electrons, resulting in the second stage of IB.

Addi-tional, due to the negligible electron concentration in the p+_poly

gate, there are insufﬁcient electrons to supply since the doped type of gate is p+_{. Therefore, it is impossible for ECB to occur from}

poly-gate and result in the signi_{ﬁcant increase in I}Bas VGis applied.

The possible region providing sufﬁcient electrons can be attributed to the partial n+_{poly gate area of body-tied SOI devices. By cutting}

the T-gate structure along A–A′, a cross-sectional structure can be obtained and is shown in the inset ofFig. 3. It can be observed that part of the poly gate near the body contact has been covered by an n+doped. Therefore, the ECB becomes signiﬁcant between the n+

section of the poly gate and the n substrate when VG applying,

Fig. 1. NBTI-induced threshold voltage shift versus stress time for SOI p-MOSFETs under GB and FB operations. The inset shows the gate current comparison of GB and FB devices. 11 W.-H. Lo et al. / Thin Solid Films 528 (2013) 10–18

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resulting in a gradual increase of IB. This can be demonstrated

completely by variation the device of widths (W) and lengths (L) dur-ing IB and IG measurement, since the amount of current density

should be related to cross section of currentﬂux, meaning the area of n+_{poly gate.}_{Fig. 3}_{shows the I}

Band IGat VG=−0.5 V with

differ-ent W/L for PD SOI p-MOSFETs. The experimdiffer-ental data indicates that theﬁrst stage of IBillustrates only linear dependence with L, rather

than W. On the other hands, the cross section of currentﬂux does change with L, instead of W, which proves that these electrons are tunneling from the n+poly gate, corresponding to the green area in the top view of PD SOI p-MOSFETs with a T-gate structure. After that, there is another origin to cause the FB effect at linear region which indicates the exponentially increasing IBat VGb−1 V (second

stage of IB). According to the IGtunneling model we mentioned, this

could be caused by the EVB mechanism, as shown in the inset of

Fig. 2(b). Under a sufﬁciently large vertical electric ﬁeld (VG),

elec-trons tunnel from the valence band (EV) of the poly-Si gate to the

con-duction band (EC) of channel (Si substrate). However, it has been

reported that EVB only occurs as the VGapplying exceeds−1.1 V to

separate the band structure with ultra thin insulator. Thus, carriers have a probability to conduct by tunneling. Nevertheless, we would like to propose another possible that is similar to the AHI model, i.e., that of AEI, shown inFig. 4(a), to explain the second stage of IB.

The AEI mechanism comes if the gate oxide is thin enough, holes can still tunnel from the inversion layer to the poly gate (anode) and generate hot electrons by impact ionization in the poly gate depletion region under higher VG. Then, these hot electrons could

tunnel insulator directly or overcome the barrier height of oxide to traverse toward the body (cathode). To conﬁrm the strength of this mechanism, there are two operations are introduced into Fig. 2. (a) ID–VGcharacteristic and corresponding Gm–VGunder GB and FB operations. (b) IG–VGand IB–VGcurves for different p+poly gate areas. The inset shows the schematic

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distinguishing the different origins of IG, resulting in the

accumula-tion of electron. The IGand IBversus VGof the device underﬂoating

and grounded S/D operations have been measured. InFig. 4(b), the results show the IBand IGare insigniﬁcant with S/D ﬂoating, but IB

is increasing related to IGas S/D ground. It can be clearly seen that

the gate leakage current becomes deficient because the S/D cannot supply sufficient minority carriers (holes) to the inversion layer. Ad-ditional, the IB exhibits only the linear component (first stage) of

the ECB as discussed previous. On the contrary, under grounded S/D operation, IGshows an obvious increase, and the second stage of IB

oc-curs simultaneously. This proves that the exponential increase of IB

can be attributed to the holes comes from the S/D as inversion layer produces rather than the electron–hole pair separated in the EVof

the p+_{poly gate. This relationship is consistent with that in the AHI}

model, which implies that AEI indeed exists and is the dominant mechanism of the GIFBE in PD SOI p-MOSFETs.

3.2. Part II: inﬂuence of mechanical strain on gate-induced-ﬂoating-body-effect (GIFBE) in PD SOI p-channel MOSFETs through NBTI reliability

Furthermore, to introduce the mechanical strain into the investi-gation of GIFBE on PD SOI p-MOSFETs, the second part will discuss the impact of strain on GIFBE by NBTI analysis. Fig. 5 shows the NBTI-induced threshold voltage (Vth) shift versus time for the PD

SOI p-MOSFET FB and GB devices with strain and unstrain and the il-lustration of bending sample as shown in the inset of Fig. 5. For unstrained devices, it can be seen that the FB device has more insig-niﬁcant degradation than the GB devices, which has been explained early. For strained devices, the NBTI reliabilities of FB and GB devices are all improved under strained operation. In addition, Fig. 5(b) shows a nearly unchanged thermal activation energy (Ea) of NBTI

with strain (∼0.085 eV). Also, it can be observed that the Vthshift

ver-sus time shows a similar slope under logarithmic scale, meaning the time-power law owns a close exponential value (n ~ 0.24). This

suggests that the strain does not change the NBTI mechanism itself, but only change the degradation level of NBTI. Therefore, the reduc-tion of NBTI under strained operareduc-tion should be attributed from effec-tively Eox lowering. However, there are two different physical

mechanisms to reduce Eoxduring NBT stress for FB and GB devices

as strain was introduced.Fig. 6(a) shows the IGfor GB device with

strained and unstrained operations. The slight decrease of IG is

found under compressive strain, showing that the compressive strain can reduce Eoxeffectively. As compressive strain is applied, the light

hole band (LH) is separated from two-fold degeneration and transfers a lower energy state of hole. Therefore, there are amounts of hole that tend to stay with the LH band which result to a larger bar-rier height of EV, leading to a reduction of tunneling probability, and

the illustration of band diagram is shown on the inset ofFig. 6(a). Ad-ditionally, the results of theoretical calculations have shown that the effective mass of hole indeed becomes large under uniaxial compres-sive strain[12]. According to those, the reduction of IGunder uniaxial

compressive strain due to higher barrier height and larger effective mass can diminish the penetration probability of hole[13], suppress-ing the generation of interface states dursuppress-ing NBTI. However, it can be seen that the FB device has a signiﬁcantly less degradation than GB device under compressive strain. This is because the GIFBE becomes more obvious since IBincrease under compressive strain as shown

inFig. 6(b). As the result, it can be seen that the IBcurve of strained

device is larger than the unstrained one not only in thefirst stage where is the tunneling current from n+poly gate by ECB but also within the second stage which is result from AEI. In order to compre-hend the increase in IBunderfirst stage, the IBwith S/Dfloating for

strained and unstrained GB devices is measured as shown in

Fig. 7(a). The strained IBwith S/Dﬂoating enhances as VGincreases,

since strain-induced band gap narrowing results more electron–hole pairs. As electrons tunnel form n+poly gate to channel, the potential difference can make electrons to gain enough energy, ionizing the stable Si-bond, therefore generating electron–hole pairs. Further Fig. 3. IBfor various W and L dimensions. IBis obtained from the gate voltage of−0.5 V while S/D is grounded. The inset shows the cross-sectional view taken from line A–A′ in the

top view of the T-gate structure, illustrating the p+_{poly gate, the partial n}+_{poly gate, and the n}−_{substrate, and it's top view of the T-gate structure.}

13 W.-H. Lo et al. / Thin Solid Films 528 (2013) 10–18

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then, the second stage IB also increases under strain operation as

shown inFig 6(b). As we mentioned, the second stage IBis attributed

to the AEI model which is associated with the amount of channel

carriers and tunneling current. Generally, IGis decreased since higher

barrier height and larger effective mass as shown inFig. 6(a), there-fore the AEI-induced IBcurrent should be suppressed. However, the

Fig. 4. (a) The energy diagram of the AEI model for an ultrathin gate oxide in PD SOI p-MOSFETs. (b) IG–VGand IB–VGcharacteristics for PD SOI p-MOSFETs under S/Dﬂoating and

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strain effect increases the effective IB, especially over VG=−1 V,

which may be related to theﬁrst stage increase of IB. To clearly

distin-guish the contribution of the strain effect on the second stage of IB,

the pure AEI-induced electron current (effective IB) was also

obtained, as shown inFig. 7(b), by subtracting the ECB tunneling component from the second increase of IB. This unusual phenomenon

is caused by the band gap narrowing induced by the mechanical strain effect. Because the impact ionization rate is exponential to the energy band gap, the narrowing band gap induces more addition-al electron generation in the poly depletion region by impact

ionization even though IGdecreases. Moreover, the decrease in

pene-tration probability of hole, the additional improvement on NBTI reli-ability for strained FB device can be attributed to the signiﬁcant GIFBE, lowering the oxide electricﬁeld by more electrons accumulate at body.

4. Conclusion

This work investigates the impact of mechanical strain on GIFBE for partially depleted silicon-on-insulator p-type metal–oxide– Fig. 5. (a) Time evolution of threshold voltage shift in SOI PD p-MOSFETs for FB and GB devices with unstrained and strained. The inset shows an illustration of bending sample and a body current comparison of devices with compressive strain and unstrained. (b) Temperature dependence of threshold voltage shift of devices with compressive strain and unstrained, with activation energy extracted from the power law with time under NBTI.

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semiconductorﬁeld effect transistors (PD SOI p-MOSFETs). First part, we demonstrate the original mechanism of GIFBE on PD SOI p-MOSFETs results from the electrons tunneling from the process-induced partial n+_{poly gate and AEI model, rather than the EVB. In}

addition to, the second part shows that the strained FB device has less NBTI degradation than the unstrained devices. This behavior can be attributed to the fact that more electron accumulation induced by strain effect reduces the Eoxsigniﬁcantly during NBTI stress. This is

because strain-induced band gap narrowing increases impact ioniza-tion rate to generate addiioniza-tional electrons, reducing NBTI.

Acknowledgment

Part of this work was performed at United Microelectronics. The work was supported by the National Science Council under Contract Corporation NSC100-2120-M110-003.

Fig. 6. (a) IG–VGcharacteristics for PD SOI p-MOSFETs with compressive strain and unstrained. The inset shows an illustration of variation of valance band diagram before and after

compressive strain. (b) The body current with S/D grounded for GB devices with compressive strain and unstrained. The inset shows the gate current (source current + drain cur-rent) for GB devices with compressive strain and unstrained.

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References

[1] S. Abo, M. Mizutani, K. Nakayama, T. Takaoka, T. Iwamatsu, Y. Yamaguchi, S. Maegawa, T. Nishimura, A. Kunomura, Y. Horino, M. Takai, in: Proc. Conf. Ion Im-plantation Technol, 2000, p. 285.

[2] A. Mercha, J.M. Raﬁ, E. Simoen, E. Augendre, C. Claeys, IEEE Trans. Electron. De-vices 50 (2003) 1675.

[3] J. Pretet, T. Matsumoto, T. Poiroux, S. Cristoloveanu, R. Gwoziecki, C. Raynaud, A. Roveda, H. Brut, in: Proc. ESSDERC, 2002, p. 515.

[4] M. Casse, J. Pretet, S. Cristoloveanu, T. Poiroux, C. Fenouillet-Beranger, F. Fmleux, C. Raynaud, G. Reimbold, Solid State Electron. 48 (2004) 1243.

[5] C.H. Dai, T.C. Chang, A.K. Chu, Y.J. Kuo, S.C. Chen, C.C. Tsai, S.H. Ho, W.H. Lo, Guangrui Xia, Osbert Cheng, C.T. Huang, IEEE Electron Device Lett. 31 (2010) 540. [6] C.H. Dai, T.C. Chang, A.K. Chu, Y.J. Kuo, S.C. Chen, C.T. Tsai, W.H. Lo, S.H. Ho, Guangrui Xia, Osbert Cheng, C.T. Huang, Surf. Coat. Technol. 205 (2010) 1470. [7] W.H. Lo, T.C. Chang, C.H. Dai, W.L. Chung, C.E. Chen, S.H. Ho, Osbert Cheng, C.T.

Huang, IEEE Electron Device Lett. 33 (2012) 303.

[8] R. Mishra, D.E. Ioannou, S. Mitra, R. Gauthier, IEEE Electron Device Lett. 29 (2008) 262. Fig. 7. (a) IB–VGcurves withﬂoating S/D for strained and unstrained GB devices. The inset shows the schematic diagram of electrons tunneling from conduction band (ECB) from the

partial n+

poly gate for an ultra thin gate oxide in PD SOI p-MOSFETs and a cross section of the device. (b) Comparison of effective body current versus gate voltage for compressive strained and unstrained devices. The inset shows the cross section and the schematic diagram of AEI mechanism under strain.

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[9] R. Mishra, S. Mitra, R. Gauthier, D.E. Ioannou, C. Seguin, R. Halbach, Microelectron. Eng. 84 (2007) 2085.

[10] C.H. Dai, T.C. Chang, A.K. Chu, Y.J. Kuo, F.Y. Jian, W.H. Lo, S.H. Ho, Guangrui Xia, Osbert Cheng, C.T. Huang, IEEE Electron Device Lett. 32 (2011) 847.

[11] T. Ghani, K. Mistry, P. Packan, S. Thompson, M. Stealer, S. Tyagi, in: VLSI Symp. Tech Dig, 2000, p. 174.

[12] X. Yang, J. Lim, G. Sun, K. Wu, T. Nishida, S.E. Thompson, Appl. Phys. Lett. 88 (2006) 052108.

[13] T. Irisawa, T. Numata, E. Toyoda, N. Hirashita, T. Tezuka, N. Sugiyama, S.I. Takagi, IEEE Trans. Electron. Devices 55 (11) (Nov. 2008) 3159.