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國 立 交 通 大 學

電信工程學系碩士班

碩 士 論 文

低功率、低相位雜訊之雙頻帶

電壓控制振盪器設計

A Dual-Band LC-VCO with Low Power

Low Phase Noise

研 究 生:詹豐吉

指導教授:唐震寰 教授

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低功率、低相位雜訊之雙頻帶電壓控制振盪器設計

A Dual-Band LC-VCO with Low Power Low Phase Noise

研 究 生:詹豐吉 Student:Feng-Chi Chan

指導教授:唐震寰 教授 Advisor:Jenn-Hwan Tarng

國 立 交 通 大 學

電 信 工 程 學 系 碩 士 班

碩 士 論 文

A Thesis

Submitted to Department of Communication Engineering College of Electrical Engineering and Computer Science

National Chiao Tung University in Partial Fulfillment of the Requirements

for the Degree of Master

in

Communication Engineering

June 2007

Hsinchu, Taiwan, Republic of China

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低功率、低相位雜訊之雙頻帶電壓控制振盪器設計

研究生:詹豐吉 指導教授:唐震寰

國立交通大學

電信工程學系 碩士班

摘要

本篇論文的研究焦點著重於降低電壓控制振盪器其功率消耗及相位雜訊的 設計。利用電流再利用的架構,可以使電壓控制振盪器在運作時的工作電流只需 傳統型電壓控制振盪器運作時的一半而達到低功率消耗的目的。同時,我們也提 出在NMOS的基極端外加電阻,此方法可有效降低NMOS熱雜訊進而降低電壓控 制振盪器的相位雜訊。根據上述架構及方法,我們完成低功率、低相位雜訊 2.5/3.5GHz之雙頻帶電壓控制振盪器。由量測結果(TSMC 0.18-μm 1P6M CMOS 製程),實作之IC均與模擬結果相近並達到預期之特性。在距離中心頻率10-kHz 和1-MHz相位雜訊分別下降7.0dB和4.0dB。此設計的提供電壓為1.3V消耗功率為 3.12mW,其工作頻率於2.5GHz和3.5GHz時,相位雜訊在距離中心頻率1 MHz分 別為-121dBc/Hz和-117dBc/Hz。

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A Dual-Band LC-VCO with Low Power

Low Phase Noise

Student:Feng-Chi Chan Advisor:Dr. Jenn-Hwan Tarng

Department of Communication Engineering

National Chiao Tung University

Abstract

The research described in this thesis focuses on the design of a low power consumption and phase noise LC-VCO. With the current-reused topology, the proposed LC-VCO can operate using only half amount of DC current compared with the conventional topologies to achieve low power consumption. Here, we also propose to add an external resistor at the substrate node of the NMOS transistor, which reduces the substrate thermal noise of the NMOS transistor effectively and the phase noise of the LC-VCO as well. Based on proposed topology and novel method, we implement a low power and low phase noise dual-band LC-VCO, which operates at 2.5/3.5 GHz. The proposed dual-band LC-VCO is implemented by TSMC 0.18-μm 1P6M CMOS process and the measured results are similar to simulation ones. Therefore, the performances of the proposed LC-VCO achieve anticipation. The result shows that the phase noise reduction is about 7.0 dB and 4.0 dB at 10-kHz and 1-MHz offset frequency, respectively. With only 1.3 V bias voltage and 3.12 mW power

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consumption, the proposed LC-VCO operates 2.5 GHz and 3.5 GHz with phase noise of -121 dBc/Hz and -117 dBc/Hz, respectively, at 1 MHz offset frequency.

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在碩士研究的這二年歲月,首先要感謝的是我的指導教授 唐震寰教授並致 上我最誠摯的謝意。感謝老師在專業的通訊領域中,給予我不斷的指導與鼓勵, 並賦予了實驗室豐富的研究資源與環境,使得這篇碩士論文能夠順利完成。 其次,要感謝波散射與傳播實驗室的學長們—鄭士杰學長、劉文舜學長、莊 秉文學長、宜興學長、和穆學長、孟勳學長、舜升學長、懷文學長在研究上的幫 助與意見,讓我獲益良多。感謝電資 810 實驗室的夥伴們—奕慶、育正、志瑋、 思云、蓓縝、雅仲、俊諺、佩宗、清標、唐源、竣義、敦智等在課業及研究上的 互相砥礪與切磋,以及生活上的多彩多姿。讓實驗室在嚴肅的研究氣氛中增添了 許多歡樂,有了你們,更加豐富了我這二年的研究生生活。另外,也要感謝助理— 梁麗君小姐,在生活上的協助和籌劃每次的美食聚餐饗宴。 最後,要感謝的就是我最親愛的家人,媽媽、哥哥、妹妹,由於他們在我求 學過程中,一路陪伴著我,給予我最溫馨的關懷與鼓勵,讓我在人生的過程裡得 到快樂,更讓我可以專心於研究工作中而毫無後顧之憂。感謝雅虹默默在身旁為 我加油,聆聽我的心事。 鑒此,謹以此篇論文獻給所有關心我的每一個人。 詹豐吉 誌予 九十六年六月

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Table of Contents

Abstract (Chinese)

...Ⅰ

Abstract (English)

...Ⅱ

Acknowledgement

...Ⅳ

Table of Contents

...Ⅴ

List of Tables

...

List of Figures

...

Chapter 1 Introduction

1

1.1

Background and Problems………

1

1.2

Related Works………

3

1.3

Thesis Organization………

4

Chapter 2 Basics of Voltage Controlled Oscillator (VCO) 5

2.1 Conventional LC-VCO Architectures………

5

2.2 Performance Parameters………...

9

2.2.1 Phase Noise……….

9

2.2.2 Tuning Range……….

11

2.2.3 Tuning Sensitivity (K

VCO

)………

12

2.2.4 Output power……….

13

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2.2.6 Power consumption………...

13

2.3 Noise Model of VCO……….

14

2.3.2

Time Invariant Model………...

14

2.3.2

Time Variant Model………..…

16

Chapter 3 An Effective Way to Reduce the Thermal Noise

of NMOS Transistors

22

3.1 Introduction………...

22

3.2 The Small-Signal Model of MOS Transistors……….

24

3.3 Reducing Thermal Noise of NMOS………

26

Chapter 4 Design of a Dua-Band LC-VCO for 2.5/3.5 GHz

WiMAX

36

4.1 Introduction………...

36

4.2 Proposed Voltage controlled Oscillator Architecture……….

38

4.3 A Dual-Band LC-VCO for 2.5 GHz/3.5 GHz WiMAX...

47

4.4 Simulated and measured results………

59

Chapter 5 Conclusions

67

References………

68

Appendix A Basic Oscillator Theory

………...

73

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List of Tables

Table 3.1 Summary of LNA performance and comparison with published

LNAs

………….……….

34

Table 3.2 Summary of LC-VCO performance and comparison with published

LC-VCOs

………

35

Table 4.1 Compared the proposed LC-VCO with Recently Published LC-VCOs

..

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List of Figures

Figure 1.1 Global spectrum of WiMAX

……….

2

Figure 2.1 Colpitts oscillator (biasing not shown)

………

6

Figure 2.2 Hartley oscillator (biasing still not shown)

………..

7

Figure 2.3 Clapp oscillator (biasing still not shown)

………

7

Figure 2.4 The simple differential negative resistance oscillator

………

8

Figure 2.5 Output spectrum of ideal and realistic oscillators

………

10

Figure 2.6 Lesson’s phase noise model

………

11

Figure 2.7 Phase and amplitude impulse response model

………

16

Figure 2.8 Impulse current injects into LC-tank

………

17

Figure 2.9 Waveforms for impulse excitation

………

17

Figure 2.10 Conversion of noise to phase sidebands

………

21

Figure 3.1 RF NMOS schematic cross section with the parasitic components

24 Figure 3.2 The equivalent circuit model for RF MOS transistor

………...

25

Figure 3.3 The complete small-signal circuit model for RF MOS transistor

…...

26

Figure 3.4 The adopted small-signal circuit model for RF MOS transistor

…….

26

Figure 3.5 Equivalent circuit model of the substrate with an added resistor Rbx, which is located between the substrate node and the source node of the RF NMOS transistor

………

27

Figure 3.6 Simplified equivalent circuit model of the substrate with an added resistor Rbx

………...

28

Figure 3.7 the simplified equivalent noise circuit model with the added external resistor Rbx:(a) the voltage noise model and (b) the current noise model model

………

29

Figure 3.8 Circuit schematics (a) Proposed UWB LNA (b) Proposed WiMAX VCO In both circuits, the external resistor is added between the body and the source

………..

30

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Figure 3.9 Simulation results (a) S-parameters versus signal frequency of LNA; (b)

Noise figure versus signal frequency with and without Rbx

………..

32

Figure 3.10 Simulated results of phase noise versus offset frequency with and without Rbx

………..

33

Figure 3.11 Simulated results of phase noise versus Rbx

………...

34

Figure 4.1 Block diagram of a PLL-based frequency synthesizer

……….

36

Figure 4.2 Two typical LC tank oscillator structures

………..

39

Figure 4.3 Phase noise for the complementary and All-NMOS

………

40

Figure 4.4 Complementary cross-coupled LC-VCO without the tail current source

……….

40

Figure 4.5 The current-reused LC-VCO

………...

41

Figure 4.6 Simulated tuning range of the conventional and proposed LC-VCO at 3.5 GHz

………

42

Figure 4.7 Simulated KVCO of the conventional and proposed LC-VCO at 3.5 GHz

………

42

Figure 4.8 Simulated phase noise of the conventional and proposed LC-VCO at 3.5 GHz

………

43

Figure 4.9 Simulated output power of the conventional and proposed LC-VCOat 3.5 GHz

………

43

Figure 4.10 Current-reused LC-VCO combined with the external resistor Rbx

44 Figure 4.11 Simulated tuning range of the conventional, current-reused, and proposed LC-VCO at 3.5 GHz

………

45

Figure 4.12 Simulated KVCO of the conventional, current-reused, and proposed LC-VCO at 3.5 GHz

………..

45

Figure 4.13 Simulated phase noise of the conventional, current-reused, and proposed LC-VCO at 3.5 GHz

………

46

Figure 4.14 Simulated output power of the conventional, current-reused, and proposed LC-VCO at 3.5 GHz

………

46

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Figure 4.16 The conventional complementary cross-coupled pair dual band

LC-VCO

……….

49

Figure 4.17 The current-reused dual-band LC-VCO

………

50

Figure 4.18 The proposed dual-band LC-VCO

………...

51

Figure 4.19 The equivalent circuit of LC-Tank after shunting the C3 and C4

……

52

Figure 4.20 Simulated tuning range of the conventional and current-reused LC-VCO at 2.5 GHz

………

52

Figure 4.21 Simulated KVCO of the conventional and current-reused LC-VCO at 2.5 GHz

………

53

Figure 4.22 Simulated phase noise of the conventional and current-reused LC-VCO at 2.5 GHz

………

54

Figure 4.23 Simulated output power of the conventional and current-reused LC-VCO at 2.5 GHz

………

54

Figure 4.24 Simulated tuning range of the conventional and current-reused LC-VCO at 3.5 GHz

………..

55

Figure 4.25 Simulated KVCO of the conventional and current-reused LC-VCO at 3.5 GHz

………

55

Figure 4.26 Simulated phase noise of the conventional and current-reused LC-VCO at 3.5 GHz

………

56

Figure 4.27 Simulated output power noise of the conventional and current-reused LC-VCO at 3.5 GHz

………

57

Figure 4.28 The equivalent model of pad-effect

………..

58

Figure 4.29 The equivalent model of bond-wire-effect

……….

58

Figure 4.30 The equivalent circuit of parasitic effect of a wire

………..

58

Figure 4.31 The complete circuits of proposed LC-VCO

………..

59

Figure 4.32 The chip layout of proposed LC-VCO

………..

59

Figure 4.33 The Microphotograph of proposed LC-VCO

……….

60

Figure 4.34 The PCB layout

………

60

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Figure 4.36 Measured and simulated tuning range of proposed VC0 at 2.5 GHz

..

61

Figure 4.37 Measured and simulated output power of proposed VC0 at 2.5 GHz

.

62 Figure 4.38 Measured output spectrum of proposed VCO at 2.5 GHz

………….

62

Figure 4.39 Measured and simulated phase noise of proposed VC0 at 2.5 GHz

63 Figure 4.40 Measured and simulated tuning range of proposed VC0 at 3.5 GHz

..

63

Figure 4.41 Measured and simulated output power of proposed VC0 at 3.5 GHz

.

64 Figure 4.42 Measured output spectrum of proposed VCO at 3.5 GHz

………….

64

Figure 4.43 Measured and simulated phase noise of proposed VC0 at 3.5 GHz

65 Figure A.1 The block diagram of closed-loop feedback system

………

73

Figure A.2 Schematic of the ring oscillator

………...

75

Figure A.3 Schematic diagram of the one-port negative-resistance oscillator

…..

76

Figure A.4 Schematic diagram of the two-port negative-resistance oscillator

…..

77

Figure A.5 Negative-resistance and LC-tank resistance

………...

78

Figure A.6 Series to parallel

………...

78

Figure A.7 Equivalent resont model

……….

78

Figure A.8 Input impedance of NMOS cross-coupled pair

………...

79

Figure B.1 The thermal noise model of resistor

……….

81

Figure B.2 The drain current noise model of MOS transistor

………...

82

Figure B.3 Equivalent gate resistance consists of gate poly and channel

………

83

Figure B.4 The gate noise model of MOS transistor

………...

83

Figure B.5 Induced gate current noise and small signal model in MOS transistor

...

………..

84

Figure B.6 The correlation noise circuit for RF MOS transistor

………

85

Figure B.7 (a) Dangling bonds at oxide-silicon interface and (b) flicker spectrum

……….

86

Figure B.8 Tow major shot noise in the NMOS

……….

87

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Chapter 1 Introduction

Chapter 1 Introduction

1.1 Background and Problems

The 802.16 WiMAX (Worldwide Interoperability for Microwave Access) is a recently proposed metropolitan area network that may ignite the broad band wireless access as well as providing backhaul for 802.11 WLAN hotspots [1]. WiMAX communication techniques have attracted great interests in both academia and industry in the past few years for applications in wide-range and high-speed wireless systems. Many people expect that the combination of WiMAX and WLAN will give a complete promising wireless solution for delivering high speed internet access to business, homes, and WiFi hotspots [2]. The Institute of Electrical and Electronics Engineers (IEEE) has recently approved 2.3 GHz, 2.5 GHz, 3.5 GHz, and 5.2 GHz bands for WiMAX deployment. Figure 1.1 shows the global spectrum of WiMAX. Requirements of WiMAX transceivers are strict since the transmission distance is very far and the data rate is very fast. Therefore how to design a high performance transceiver is an important issue and challenge.

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Chapter 1 Introduction

Figure 1.1 Global spectrum of WiMAX.

The VCO is used to provide clean, stable, and precise carrier signals of frequency translation in wireless transceivers. There are several common goals in design WiMAX VCO including low phase noise, low power consumption, low cost, satisfactory output power, and sufficient tuning range. How to design a low phase noise, low power consumption, satisfactory output power, and sufficient tuning range VCO is an arduous challenge. We start this thesis with the deep analysis of the phase noise, power consumption, output power, and tuning range problems, and get thorough insight into the recently-published literatures. After that, we try to find new ways of achieving these problems.

The thesis proposes a new dual-band VCO architecture to cover 2.5 GHz to 2.69 GHz and 3.4 GHz to 3.7 GHz for WiMAX systems, which uses a current-reused

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Chapter 1 Introduction

architectureto achieve low power consumption and decrease the area of the circuit. In addition, a novel and effective method by adding an external and large resistor to the substrate node of the MOS is also proposed. The proposed method reduces the thermal noise of the substrate and then yields low phase noise. The novel proposed dual-band VCO topology not only achieves low power consumption but also attains low phase noise.

1.2 Related Works

In the design a VCO, low phase noise and low power consumption are two important requirements. The low power consumption may be achieved by reducing the supply voltage and/or the current in the VCO core circuit. The low voltage operation mainly relies on scaling down metal-oxide-semiconductor (MOS) threshold voltage VT.

However, the low voltage limits the signal amplitude, which in turn limits the signal-to-noise ratio (SNR) and increases the phase noise of VCO. Therefore, how to control a low phase noise effectively at the low power level becomes an important and challenge issue. [3] suggests to add an external circuit called a harmonic tuned (HD) LC tank to suppress the harmonic frequency of the circuit. This method can reduce the phase noise effectively, but it also increases both the die area and power consumption. Another method is to use high Q (quality factor) passive components such as inductors and varactors in the circuit to reduce resonator’s thermal noise [4-5]. However, this method may be not so effective since the maximum achievable Q of the passive component is mainly limited by the semiconductor process and may only be slightly improved by design or layout techniques [6].

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Chapter 1 Introduction

1.4 Thesis Organization

The thesis is organized into five chapters including the introduction. Chapter 2 deals with the basic concepts of VCO design, its metrics and some popular voltage-controlled oscillator (VCO) topologies. Chapter 3 proposes new method to reduce the thermal noise at the substrate of the NMOS effectively. In chapter 4, we design the low phase noise low power consumption dual-band VCO with the simulated and measured results. Chapter 5 conclusion is drawn.

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

Chapter 2

Basics of Voltage Controlled Oscillator

(VCO)

2.1 Conventional LC-VCO Architectures

The frequency of most radio frequency (RF) oscillators must be adjustable, hence the voltage-controlled oscillator (VCO) is an extremely important block of the wireless communication system. The VCO is used as a local oscillator to up-conversion or down-conversion signals. Although ring oscillator has wider tuning range, phase noise is worse. On the other hand, the LC-tank VCO has lower phase noise, but the tuning range is narrow. In the modern wireless communication system, the VCO must be have extremely low phase noise, hence the LC-tank VCO is be adopted. In this section, the some kinds of LC-tank oscillators are presented.

The basic ingredients in these oscillators are simple:one transistor plus a resonator. Many of the oscillators are named after the fellows who first came up with the topologies but, as we’ll see, a more or less unified description of these designs is possible. As mentioned in the earlier example, a capacitive voltage divider off of the tank provides feedback to an amplifier in a Colpitts oscillator as shown in Figure 2.1.

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

In alternative versions of the Colpitts, the feedback is from source back to the gate rather than from drain to source. Illustrated in Figure 2.1, the equivalent parallel resistance in the tank is approximately equal to (1+C1/C2)2/gm.

Figure 2.1 Colpitts oscillator (biasing not shown).

Illustrated in Figure 2.2, the equivalent parallel resistance in the tank is approximately equal to (1+L2/L1)2/gm, enhancing the equivalent Q by roughly the

same factor. As shown in Figure 2.2, this oscillator called Hartley oscillator is essentially identical to the Colpitts, but use a tapped inductor for feedback instead of a tapped capacitor. The Hartley oscillator has its origins in the very early days to radio, when tapped inductors were readily available. It is much less common today. One could also use a tapped resistor, in principle, but that particular configuration doesn’t seem to have a name attached to it.

A modified Colpitts oscillator is called the Clapp oscillator as shown in Figure 2.3, with a series LC replacing the long inductor. The Clapp oscillator is actually just a Colpitts oscillator with an additional tap on the capacitive divider chain.

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

Figure 2.2 Hartley oscillator (biasing still not shown).

Figure 2.3 Clapp oscillator (biasing still not shown).

As shown in Figure 2.4, a circuit that has become a frequently recurring idiom in recent years uses a cross-coupled differential pair to synthesize the negative resistance. The signal fed back from the drain of a transistor to its source must pass through an impedance transformer so as to avoid loading the tank excessively. In

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

many oscillators, such as the circuit of Figure 2.7, the allowable signal amplitudes are constrained by the available supply voltage or breakdown voltage considerations. Useful output may be obtained either through a buffer interposed between the oscillator core and load, or through a capacitive voltage divider to avoid spoiling resonator Q.

Tuning of all LC-tank oscillators may be accomplished by realizing all or part of C1 or C2 as a variable capacitor (varactor), and tuning its effective capacitance with an appropriate bias control voltage. Since CMOS junction capacitors have relatively poor Q, it is advisable to use only as much junction capacitance as necessary to achieve the desired tuning range.

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

2.2 Performance Parameters

2.2.1 Phase Noise

An ideal output spectrum of oscillator has only one impulse at the fundamental frequency as shown in Figure 2.5(a). A realistic oscillator has a spectrum with spurious signals due to its harmonics or intermodulation products. In addition, the frequency spectrum of the realistic oscillator exhibits skirts around the carrier frequency. The realistic oscillator output spectrum and the definition of phase noise is shown in Figure 2.5(b). The phase noise due to random fluctuations caused by thermal and other noise sources, and appears as a broad continuous distribution localized about the output signal. The phase noise is defined as the ration of power in one phase modulation sideband to the total signal power per unit bandwidth at a particular offset, fm, from the signal frequency, and is denoted as L(fm). It is usually

expressed in describes relative to the carrier power per Hertz of bandwidth (dBc/Hz). Phase noise is typical expressed as [10]

( )

10log SSB Hz,1

( )

m

(

)

m C P f L f dBc Hz P ⎡ ⎤ = ⎣ ⎦ , (2-1) WherePSSB Hz,1

( )

fm represents the single sideband power at a frequency offset of f from the carrier with a measurement bandwidth of 1Hz, Pm C is the carrier power.

From (2-1), the output power must be maximized in order to reduce to phase noise, but it will suffer from high DC power consumption.

Lesson has proposed an equation of phase noise by analyzing a feed back oscillator and is written as [11]

( )

3 2 1 0 2 10log 1 1 2 f S FKT L P Q ω ω ω ω ω ⎧ ⎡ Δ ⎤⎫ ⎪ ⎪ Δ = ⎨ ⋅ +⎢ ⎜ Δ ⎟ ⎥⋅ + Δ ⎬ ⎢ ⎝ ⎠ ⎥ ⎪ ⎦ ⎢ ⎪ ⎩ ⎭ , (2-2)

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

(a) (b)

Figure 2.5 Output spectrum of ideal and realistic oscillators.

where F is the excess noise factor, K is the Boltamann’s constant, T is the standard noise temperature, ω0 is the oscillator frequency, Q is the loaded Q, and

3

1 f

ω

Δ

is

the corner frequency, where the slope of the phase noise spectral density changes from -30 dB/dec to -20 dB/dec. Figure 2.6 shows the Lesson’s phase noise model. The equation is from the cure fitting after measured results of VCO. Therefore,

3

1 f

ω

Δ

is

from measured results. If the output wave form is odd-symmetry, it can suppress 1f noise effectively. This will be lower

3

1 f

ω

Δ

. From equation (2-2),

increase Q factor of LC-tank and output power can improve phase noise.

Low phase noise can be achieved by using low noise figure or low flicker noise active device and high-Q resonator. Moreover, using a low noise power supply or filtering out the noise of power supply are good approaches to reduce phase noise.

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

Figure 2.6 Lesson’s phase noise model.

2.2.2 Tuning Range

For the LC-VCO design, Choosing suitable inductors and varactors to cover all the frequency band of the specified application is important. A CMOS oscillator must be designed with a large tuning range to overcome process variations. The output frequency of LC-VCO is tuned by varactors, which is like as diode varactors or MOS varactors, so the capacitance versus tuning voltage characteristic is important. In general, the NMOS cross-coupled pair LC-VCO has higher tuning range than double cross-coupled LC-VCO topology for equal effective tank transconductance.

When control voltage change, the bias voltage of transistor will also change. S parameter and Γ will change according to DC current variation. This phenomenon in will cause output frequency shift. This is called pushing effect. To avoid pushing effect, using high quality resonator can reduce the pushing effect. In addition, using regulator also can overcome pushing effect such as band gap circuits. Loading effect is another important issue. When loading change, its impedance is also change. This will cause output frequency shift, too. This called load pulling effect. To avoid this

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

issue, we can use buffer circuit to overcome load pulling effect.

2.2.3 Tuning Sensitivity (K

VCO

)

The varactor is basically a reverse biased pn junction diode whose depletion capacitance is a function of voltage [12]. Even though popular, this type of tuning does not have a wide tuning range and is also sensitive to temperature variation. We now quantify the KVCO of such an arrangement. We definition of KVCO with units in

Hz/s: 0 0 0 1 1 2 2 VCO If tune tune d d df K dV dV dV ω ω π π = ⋅ = ⋅ = (2-3) KVCO in general should be designed to be as small as possible. However, it

must be large enough that f0 can span the whole frequency range with a tuning voltage, Vtune, that is within the power supply. KVCO should be made small because the varactor

is connected to the LC-tank via a small fixed capacitor. If KVCO is large, then this

coupling capacitor is large and the varactor has a large influence on the resonant frequency of the LC-tank. In addition, the varactor itself has a low Q factor, in particular when compared with the inductor or capacitor in the oscillator. This is due to the resistance in the varactor itself and also due to packing. A large varactor influence and a low Q varactor mean that the varactor resistance is translated across to the tank circuit, and this would reduce the Q of the tank significantly.

The gain, KVCO, of idea LC-VCO must keep constant in the whole tuning

range. In fact, the KVCO is not a constant, the tuning characteristic (oscillation

frequency versus control voltage) is nonlinearity. Thus, the minimum variation of KVCO across the tuning range is needed for phase-locked loops (PLLs) performance

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

2.2.4 Output Power

In general, it is not easy to predict the output power of the realistic VCO, but we can know that the maximum output power of VCO is not larger than the output power of the transistor in the VCO through large-signal analysis. The output power must be maximized in order to make the waveform less sensitive to noise or to lower phase noise. It trades with power consumption, supply voltage, and tuning range. The designer can choose the active devices whose parameter is known. Therefore, when the VCO is designed, we also can predict the output power of the VCO.

2.2.5 Harmonic Rejection

The VCO has a good harmonic rejection performance that means it is closed to a sinusoidal output waveform. In wireless communication systems, harmonic rejection is specified how much smaller the harmonics of the output signal are compared with the fundamental output power.

2.2.6 Power Consumption

With fast growth in the radio-frequency (RF) wireless communications market, the demand for low-power and high-performance but low-cost RF solutions is rising. Low–power operation can extend the lifetime of the battery and save money for consumers.

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

2.3 Noise Model of VCO

Phase noise is the most important parameter in the VCO design since the most critical performance specification for an oscillator is phase noise. In a receiver, the phase noise of the LO limits the ability to detect a weak signal in the presence of a strong signal in an adjacent channel. In a transmitter, phase noise results in energy being transmitted outside of the desired band. There are two models that are Lesson’s model and Hajimiri model to be presented. Lesson has developed a time invariant model to describe the noise of oscillators. Hajimiri proposed a linear time variant phase noise model. This model can more accurately predict the phase noise of VCO.

2.3.1 Time Invariant Model

In this section, phase noise analysis is described by using time invariant model. Time invariant means whenever noise sources injection, the phase noise in VCO is the same. In the other words, phase shift of VCO caused by noise is the same in any time. Therefore, it’s no need to consider when the noise is coming. Suppose oscillator is consists of amplifier and resonator. The transfer function of a band-pass resonator is written as

( )

2 1 1 1 j RC H j j LC RC ω ω ω ω = + − (2-4)

The transfer function of a common band-pass is written as

( )

0 2 0 2 0 j Q H j j Q ω ω ω ω ω ω ω = + − (2-5) Compare equation (2-4) with (2-5). Thus,

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO) 0

1

LC

ω = and Q0RC (2-6) The frequency ω ω= 0+ Δ which is near oscillator output frequency. If ω ω0 Δω, we can use Taylor expansion for only first and second terms. Hence

( )

0 2 1 H j j Q ω ≈ + ω ⋅ Δ (2-7) ω

The close-loop response of oscillator is expressed by

( )

( )

0 1 1 2 j Q G j H j ω ω ω ω − = ≈ − ⋅ Δ (2-8) When input noise density isSi

( )

ω , the output noise density is

( )

( ) ( )

2 0 2 0 2 i S S G FkT Q ω ω ω ω ω ⎛ ⎞ = = Δ ⎝ ⎠ (2-9) The above equation is double sideband noise. The phase noise faraway center frequency Δω can be expressed by

( )

10 log 2 0 2 2 S FkT L P Q ω ω ω ⎡ ⎤ Δ = ⎢ ⋅ ⎥ Δ ⎢ ⎝ ⎠ ⎥ ⎣ ⎦ (2-10) Where

F

is empirical parameter (“often called the device excess noise number”),

k

is Boltzman’ s constant,

T

is the absolute temperature,

P

S is the average power

dissipated in the resistive part of the tank, ω0 is the oscillation frequency, and

Q

is the effective quality factor of the tank with all the loading in place(also known as loaded

Q

). From equation (2-10), increasing power consumption and higher

Q

factor can get better phase noise. Increasing power consumption means increasing the power of amplifier. This method will decrease noise figure (NF) and improve phase noise.

From, equation (2-10), we can briefly understand phase noise. But the equation and actual measured results are different. The VCO spectrum is shown as Figure 2.9. The phase noise equation can be modified as the same as equation (2-19) that is called

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO) Lesson’s model.

( )

3 2 1 0 2 10log 1 1 2 f S FKT L P Q ω ω ω ω ω ⎧ ⎡ Δ ⎤⎫ ⎪ ⎪ Δ = ⎨ ⋅ +⎢ ⎜ Δ ⎟ ⎥⋅ + Δ ⎬ ⎢ ⎝ ⎠ ⎥ ⎪ ⎦ ⎢ ⎪ ⎩ ⎭

2.3.2 Time Variant Model

In this section, we use the Hajimiri model to explain the phase noise. An oscillator can be modeled as a system with n inputs (each associated with one noise source) and two outputs that are the instantaneous amplitude and excess phase of the oscillator, ( )A t and Φ . ( )( )t A t and Φ are functions of time. Noise inputs to ( )t

this system are in the form of current sources injecting into circuit nodes and voltage sources in series with circuit branches. For each input source, both systems can be viewed as single-input, single-output systems. The time and frequency-domain fluctuations of ( )A t and Φ can be studied by characterizing the behavior of two ( )t

equivalent systems shown in Figure 2.7.

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

At first, we assume that an impulse current injects into a lossless LC-tank as illustrated in Figure 2.8. If the impulse happens to coincide with a voltage maximum as shown in top of Figure. 2.9. The amplitude increase

ΔV = ΔQ/C

, but the timing of the zero crossings does not change. An impulse injected at any other time displaces the zero crossing as shown in bottom of Figure 2.9. Hence, an impulsive input produces a step in phase, so the integration is an inherent property of the impulse to phase transfer function. Because the phase displacement depends on that the impulse is applied, the system in time variant.

Figure 2.8 Impulse current injects into LC-tank.

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

Hajimiri proposed a linear time variant phase noise model which is different from the Lesson’s model. This impulse response can be written as

( )

( ) ( )

0 max , h t u t q ω τ τ τ Φ Γ = − , (2-11) where

q

max is the maximum charge displacement across the capacitor and

u(t)

is the

unit step. The function Γ

( )

x is called the impulse sensitivity function (ISF), and is a frequency and amplitude independent function that is periodic in2π . Once the ISF has been determined, we may compute the excess phase through use of the superposition integral. Hence

( )

( ) ( )

1

( ) ( )

0 max 1 , t h t i t d i t d q

τ

τ

ω τ

τ

∞ Φ −∞ −∞ Φ =

⋅ =

Γ ⋅ (2-12)

This equation can be expanded as a Fourier series:

( )

0

(

)

0 0 1 cos 2 n n n C C n ω τ ∞ ω τ θ = Γ = +

+ (2-13) Where the coefficients Cn are real and θn is the phase of nth harmonic of the ISF. We

assume that noise components are uncorrelated, so that their relative phase is irrelevant, we will still ignore θn. Equation (2-13) can be rewritten as

( )

0

( )

( ) (

)

0 1 max 1 cos 2 t t n n C t i d C i n d q

τ τ

τ

ω τ τ

∞ −∞ −∞ = ⎡ ⎤ Φ = +

⎦ (2-14)

Equation (2-14) allows us to compute the excess phase caused by an arbitrary noise current injected into the system, once the Fourier coefficients of the ISF have been determined. Now we consider the injection of a sinusoidal current whose frequency is near an integer multiple m of the oscillation frequency, so that

(

0

)

( ) mcos

i t =I mω + Δω t⎦ (2-15) Substituting (2-15) into (2-14) where Δ ω ω0 and n=m. We can simplify Equation (2-14) as

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

( )

(

)

max sin 2 m m I C t t q ω ω Δ Φ ≈ Δ (2-16)

( )

cos

[

0 ( )

]

out V t = ω t+ Φ t (2-17) Then, substituting equation (2-16) into (2-17). Suppose

max 1 2 m m I C q Δω < . Therefore, the sideband power relative to the carrier is given by

( )

2 max 10log 4 m m SBC I C P q ω ω ⎛ ⎞ Δ ≈ Δ ⎝ ⎠ (2-18) In general, a noise signal can be separated into two type noise source:white noise and flicker noise. First, input an noise current only with the white noise and its noise power spectral density is in2

f

Δ . The total single sideband phase noise spectral density in dB below the carrier per unit bandwidth is given by

( )

2 2 0 2 2 max 10log 4 n m m SBC i C f C q ω ω ∞ = ⎛ ⎞ ⎜ Δ ⎟ ⎜ ⎟ Δ ≈ ⎜ Δ ⎟ ⎜ ⎟ ⎝ ⎠

(2-19)

According to Parseval’s theorem. Thus,

( )

2 2 2 2 0 0 1 2 m rms m C π x dx π ∞ = = Γ = Γ

(2-20) Therefore we can use quantitative analysis to analyze the phase noise sideband power due to the white noise source as following equation

( )

2 2 2 2 max 10log 2 n rms SBC i f C q ω ω ⎛ ⎞ Γ ⎜ Δ ⎟ Δ ≈ ⎜ ⎟ Δ ⎜ ⎟ ⎜ ⎟ ⎝ ⎠ (2-21)

Where qmax = CVmax, Vmax is the largest amplitude of VCO, and

2 4 n i kT f = R Δ .

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

( )

10 log 4 2 0 2 rms S kT L P Q ω ω ω ⎡ ⎤ Δ ≈ ⎢ Γ ⎥ Δ ⎢ ⎝ ⎠ ⎥ ⎣ ⎦ (2-22) If input noise of VCO is 1/f noise, the power spectral density is written as

1 2 2 1 , f n n f i i ω ω = Δ , (2-23) Where ω1/f is the 1/f corner frequency of 1/f noise. This equation represents the

phase noise spectrum of an arbitrary oscillator in 1/f2 region of the phase noise spectrum. Quantitative analysis for the relationship between the device corner 1/f and the 1/f3 corner of the phase noise can be illustrated by following equation.

( )

2 2 0 1 2 2 max 10log 8 n f i C f L q ω ω ω ω ⎛ ⎞ ⎜ ⎟ Δ ⎜ ⎟ Δ ≈ Δ Δ ⎜ ⎟ ⎜ ⎟ ⎝ ⎠ (2-24)

Here we consider the case of a random noise current in(ω) whose power spectral

density has both a flat region and a 1/f region as shown in Figure 2.10. Noise components located near integer multiples of the oscillation frequency are transformed to low frequency noise sidebands for SФ(ω) and it is become phase noise

in the spectrum of Sv(ω) as illustrated in Figure 2.10.

It can be see that the total SФ(ω) is given by the sum of phase noise

contributions from device noise of the integer multiples of ωo and weighted by the

coefficients Cn. The theory predicts the existence of 1/f2, 1/f3, and flat regions for the

phase noise spectrum. The low frequency noise sources are weighted by the coefficient C0 and show a dependence on the offset frequency. The white noise terms

are weighted by other Cn coefficients and give rise to the 1/f2 region of phase noise

spectrum. From Figure 2.10, it is obviously that if the original noise current i(t) contains 1/fn low frequency noise terms, they can appear in the phase noise spectrum as 1/fn+2 regions.

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Chapter 2 Basics of Voltage Controlled Oscillator (VCO)

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

Chapter 3 An Effective Way to Reduce Thermal

Noise of NMOS Transistors

3.1 Introduction

Even though the performances of RF CMOS transistors have been improved by advanced semiconductor process technology, the inherent noise is still an arduous problem to the design of RF circuits. In addition, it is the trade-off between low power consumption and low noise in the RF circuit design, therefore, how to reduce the noise without increasing the power consumption is extremely important issue and greatly valued.

In the RF circuit, the main noise sources come from the MOS transistors, the power supplies, the current sources, the resistances, and the thermal noise associated with the loss in the LC resonator. However, resonator’s thermal noise can be reduced by using inductors, capacitors, and varactors which have a high quality factor, Q.

At past research, two popular ways to reduce phase noise of the LC-VCO are adding external circuits and enhancing the quality factor (Q) [3], [6]. [3] suggests that

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

an external circuit called a harmonic tuned (HD) LC tank is added to suppress the harmonic frequency of the circuit, but this method has some drawbacks. This method leads to the area of circuit become larger and the cost goes up. In addition, it also makes the power consumption increase.

Another method is to enhance the Q. This method can reduce phase noise of LC-VCO without increasing area and power consumption, however, this method is not so effective since the maximum achievable Q for passive components is mainly limited by semiconductor process technology.

A new and efficient method to reduce noise without increasing power consumption is proposed. The proposed method is that adding an external and large resistance at the substrate node of NMOS transistor can reduce the thermal noise at substrate injecting the drain. Furthermore, the low noise amplifier (LNA) and the LC-tank voltage controlled oscillator (VCO) are instanced to illustrate the proposed method. This reduction can decrease not only noise figure of the low noise amplifier (LNA) and phase noise of the LC-tank voltage controlled oscillator (VCO) but also improve input matching performance of the LNA. The proposed method is analyzed through mathematical derivations and simulations for ultra-wideband (UWB) LNA and worldwide interoperability for Microwave Access (WiMAX) LC-VCO circuit designs. It is found that the method could have broad applications in RF circuit design.

In this chapter, section 3.2 briefly describes the RF MOS architecture. Some noise sources which affect the noise level in the RF circuit are presented in Section 3.3. In section 3.4, the simulation results are provided, including some comparisons.

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

3.2 The Small-Signal Model of MOS Transistors

Recently, many researches focus on modeling a complete device models in order to predict the circuit performance correctly. It has been known that for analog and RF applications, the accuracy of circuit simulation is strongly determined by device models. To have an efficient design environment, design tools with accurate models for devices and interconnect parasitics are essential. So the accurate device models become crucial to predict the circuit performance. Figure 3.1 shows RF NMOS schematic cross section with the parasitic components [15]. Resistances and capacitances which are produced by parasitic effect have relations with semiconductor process.

Figure 3.1 RF NMOS schematic cross section with the parasitic components.

MOS transistor models have been originally developed for digital and low-frequency analog circuit designs which focus on the dc current, the conductance, and intrinsic charge/capacitance behavior up to the megahertz. In the modern wireless communication systems, the operating frequency increases to gigahertz range.

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

Therefore, an RF model with the consideration of the high-frequency (HF) behavior of both intrinsic and extrinsic components in MOS is extremely important to achieve accurate and predicts results in the simulation of RF circuit design. Figure 3.2 shows the equivalent circuit model for RF MOS transistor including parasitic resistances and capacitances. We design and analyze RF circuits using 0.18-μm semiconductor process in this study. The 0.18-μm process and the device models are provided by Taiwan Semiconductor Manufacturing Company (TSMC), hence the semiconductor parameters of MOS and the characteristic parameters of devices are based on TSMC providing.

Figure 3.2 The equivalent circuit model for RF MOS transistor.

Figure 3.3 shows the gate-body capacitance Cgb, parasitic gate-drain capacitance Cgdo,

parasitic gate-source capacitance Cgso, gate-drain resistance Rgd, intrinsic drain-body

resistance Rbd, intrinsic source-body resistance Rsb, parasitic drain-body capacitance

Cdb, and parasitic source-body capacitance Csb [16]. It is the complete small-signal

circuit model for RF MOS transistor. In order to simplify the circuit and some components be negligibly small, we neglect the Lg, Ls, Ld, Cgso, Cgdo, Cgb, and Rgd.

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

Figure 3.3 The complete small-signal circuit model for RF MOS transistor.

Figure 3.4 that shows the adopted small-signal circuit model for RF MOS transistor is similar to the model of TSMC providing. We use the model showed in Figure3.5 to design and analyze the RF circuit in the after discussion.

Figure 3.4 The adopted small-signal circuit model for RF MOS transistor.

3.3 Reducing Thermal Noise of NMOS

In CMOS technology, the substrate parasitic impedance can induce the substrate thermal noise of RFIC circuits due to the leaky current through the drain/source to the substrate. We propose the new and effective method that is adding

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

an external and large resistance at the substrate node of NMOS to reduce the thermal noise of the substrate node injecting the drain node in the NMOS. In this thesis, we do no add this resistance at the PMOS. The reason is the source node of PMOS that connects to VDD. Since the source node connect to VDD, the thermal noise of substrate

at PMOS increase. The source of NMOS connects to ground, so this phenomenon does not exist. To explore the method, a small signal equivalent circuit model of the substrate with an external added resistor is developed and is shown in Figure 3.5. In order to simplify the circuit and the component be negligibly small, we neglect the Rs

and Rds.

Figure 3.5 Equivalent circuit model of the substrate with an added resistor Rbx,

which is located between the substrate node and the source node of the RF NMOS transistor.

The impedance of the substrate,

Z

sub, is derived and given as:

0 0 1 1 ( ) //( ) sub bd b bx sb bd sb Z R R R R j C

ω

j C

ω

⎡ ⎤ = + + + + ⎣ ⎦ (3-1) in (3-1), we find that

(

)

(

)

0 0 0 0 0 1 1 ( ) //( ) 1 sb sb b bx sb b bx sb sb sb sb b bx sb j R C R R j C R R R j R C j C R R j C ω ω ω ω ω + + × + + = + + +

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

(

) (

(

0

)

)

0 0

1

1

(

) //(

)

1

b bx sb sb b bx sb sb sb b bx sb

R

R

j R C

R

R

R

j C

j

R

R

R

C

ω

ω

ω

+

× +

+

+

=

+

+

+

(3-2) If

R

bx is large enough, let

(

)

2 2 2 0 Rsb Rb Rbx Csb 1

ω

+ + ⎤  , and since

R

bx



R

b, bx sb

R



R

, (3-1) can be written as 2 2 0 0

1

(

)

sb bd sub bd b bx sb sb bd

C

C

Z

R

R

R C

j C C

ω

ω

+

=

+

+

+

(3-3) Let 0 1 sub sub sub Z R j Cω = +

(

)

2 2 0

1

sub bd b bx sb

R

R

R

R C

ω

+

+

(3-4)

//

sb bd sub sb bd sb bd

C

C

C

C

C

C

C

×

=

+

(3-5) From equation (3-4), increase of the added external resistance, Rbx lead to reduction of

the equivalent substrate resistance Rsub and theC is not affected by Rsub bx. So we know

that Rsub is proportion to Rbx. Figure 3.6 shows the simplified equivalent circuit model

of the substrate with an added resistor Rbx.

Figure 3.6 Simplified equivalent circuit model of the substrate with an added resistor Rbx.

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

Figure 3.7 (a) shows the simplified equivalent voltage noise circuit model with the added external resistor and Figure 3.7 (b) shows the simplified equivalent current noise circuit model with the added external resistor.

Figure 3.7 the simplified equivalent noise circuit model with the added external resistor Rbx:(a) the voltage noise model and (b) the current noise model.

We choose the current noise model since the noise factor of the LNA and the phase noise of LC-VCO are based on current noise model to calculate. Here, the proposed method is applied to ultra-wideband (UWB) LNA and worldwide interoperability for Microwave Access (WiMAX) LC-VCO to validate its effectiveness. Figure 3.8 (a) illustrates the proposed UWB LNA architecture with an

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

external resistance Rbx added to the transistor M1. To explore the noise figure of the

LNA, the noise factor is derived first and is equal to the ratio between the input noise power and the output noise power of the circuit.

Figure 3.8 Circuit schematics (a) Proposed UWB LNA (b) Proposed WiMAX LC-VCO In both circuits, the external resistor is added between the body and the source.

According to the proposed UWB LNA and using the substrate model shown in Figure 3.7 (b), after some derivations the noise factor of the LNA is given by

2 0 0 2 2 0 0 2 1 1 ( ) 5 1 1 2 2 , 5 5 s sub s T s T s s m sub s T s T Q Z F Q Q Q R G C C Z Q Q ω ω γ δα α ω ω ω δα ω δγ ω ω ⎛ ⎞ + ⎛ ⎞ = + + + ⎝ ⎠ ⎝ ⎠ ⎛ ⎞ ⎛ ⎞ + + ⎝ ⎠ ⎝ ⎠ (3-19) where 0 1 s s gs Q Rω C

= , α and γ are bias-dependent parameters, δ is the coefficient of gate noise, and C is the correction coefficient for the gate noise and drain noise, and ω0 is the center frequency, ωT is the cutoff frequency. C2 is the correction coefficient

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

for the gate noise and substrate noise. From equation (3-19), we find that the noise factor is direct proportion to

Z

suband

Z

subis inverse proportion to

R

bx. Therefore, the

noise factor,F , is inverse proportion to

R

bx. Figure 3.8 (b) shows the proposed

WiMAX LC-VCO using an external resistance Rbx of transistor M1. According to the

Hajimiri-Lee phase noise model and after some derivations, phase noise of the LC-VCO is given by 3 3 2 2 2 2 1/ 2 2 2 2 max max 2 2 1/ 2 2 max { } 10log{( )(1 ) ( ) 8(2 ) 2 8(2 ) (1 ) ( )}, 2 2(2 ) rms rms p f rms p f inp inn f f L f q f f q f inl f f q f ω π π π ω π π Γ Γ Δ Δ Δ = + + Δ Δ Δ Γ Δ + + Δ Δ (3-20)

where

Δ

f

is the offset frequency from the carrier,

q

maxis the total charge swing of

the tank, Γrmsis root mean square value of impulse sensitivity function, 2

/

inp Δf , and inn2/Δf is PMOS and NMOS noise power spectral density, inl2/Δf is

resonator’s thermal noise. It is noted that with the external resistance 2/

sub

in Δ is a f

part of inn2/Δf equal to 4 2

sub mb

kTR g that is decreased with the external resistance

according to equation (3-17). We propose the new method is effective since the most noise contribution is provided by NMOS in this LC-VCO topology.

In simulation, the TSMC 0.18-μm 1P6M CMOS process, the low power UWB LNA design is proposed. A low supply voltage of 1.5V is chosen, and the total power consumption is 9.0mW. This proposed method not only reduces the noise figure but also improve the input matching performance in the LNA. The simulation results are shown as Figure 3.9 (a).In the Figure 3.9 (b), it shows that the noise figure (NF) is smaller when Rbx=30kΩ to compare with the case without Rbx. It is found that the

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

noise figure is at least less than 2.7dB in 6.0~10.6GHz and its minimum value is 2.28dB at 6.5GHz. Furthermore, the simulation result shows that there is about 0.1 dB to 0.3 dB of noise figure (NF) reduction with common source UWB LNA.

(a)

(b)

Figure 3.9 Simulation results (a) S-parameters versus signal frequency of LNA; (b) Noise figure versus signal frequency with and without Rbx.

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

A low power and low phase noise WiMAX LC-VCO is proposed. A low supply voltage of 1.2V is chosen, and the core circuit power consumption is 0.996mW. In the Figure 3.10, it shows that the phase noise of LC-VCO is smaller when Rbx=30

kΩ to compare with the case without Rbx. It is found that when LC-VCO operates at

3.5 GHz, there is about 7.0 dB and 4.0 dB of phase noise reduction at 100 kHz and 1 MHz offset frequency, respectively. In addition, the proposed LC-VCO operates at 3.5 GHz with phase noise of -121 dBc/Hz at 1 MHz offset frequency.

The phase noise versus Rbx as shown in Figure 3.11, we can find that when the

value of Rbx is about larger than 30 kΩ, the phase noise almost limited. Therefore, it is

a reason that why we choose the value of Rbx to be 30 kΩ. In addition, this proposed method is effective through mathematical derivations and numerical simulations for UWB LNA and WiMAX LC-VCO. The performance of the propose LNA and LC-VCO are summarized in Table 3.1 and Table 3.2, respectively, with comparison to other recently published papers.

Figure 3.10 Simulated results of phase noise versus offset frequency with and without Rbx.

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

Figure 3.11Simulated results of phase noise versus Rbx.

Table 3.1

Summary of LNA performance and comparison with published LNAs.

Ref. Tech. BW (GHZ) S11 (dB) Gain (dB) NF (dB) VDD (V) Power (mW) [21] 0.18-μm CMOS 2.3-9.2 <-9.9 9.3 4.0 1.8 9.0 [22] 0.18-μm CMOS 2.6-9.2 <-11.5 10.9 3.5 1.8 7.1 [23] 0.18-μm SiGe 0.1-11 <-12 8 2.9 1.8 21.6 [24] 0.13-μm CMOS 7.2-8.6 <-9 28 3.9 1.5 3.9 [25] 0.18-μm CMOS 2-10.1 <-9.76 10.2 3.68 1 7.2 Our work 0.18-μm CMOS 5-10.6 <-13.7 14 2.8 -0.75 2.8

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Chapter 3 An Effective Way to Reduce Thermal Noise of NMOS Transistors

Table 3.2

Summary of LC-VCO performance and comparison with published LC-VCOs.

Ref. Tech. Freq.

(GHz) PN (dBc/Hz)# Out Power (dBm) Power (mW) F.O.M (dBc/Hz) [4] 0.35-μm CMOS 2.06 -116* 2.33 22.62 -173.2* [14] 0.18-μm CMOS 2.2 -122.5 N/A 5.92 -189.5 [26] 0.18-μm GaAs 4 -120 2 25.5 -178 [27] 0.13-μm CMOS 2.17 -132 N/A 5.92 -189.5 Our work 0.18-μm CMOS 3.5 -121 -2.16 22.62 -191

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Chapter 4 Design of a Dual Band VCO for 2.5 GHz and 3.5 GHz WiMAX

Chapter 4 Design of a Dual-Band LC-VCO for

2.5/3.5 GHz WiMAX

4.1 Introduction

A critical building block of almost any wireless or wireline transceiver is the local oscillator (LO). When use with a mixer, the LO allows frequency translation and channel selection of radio frequency (RF) signals. The LO is typically implemented as a phase-locked loop (PLL) as shown as Figure 4.1, wherein a voltage-controlled oscillator (VCO) is phase-locked to a high-stability crystal oscillator [30].

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Chapter 4 Design of a Dual Band VCO for 2.5 GHz and 3.5 GHz WiMAX

In the design of the frequency synthesizer, the most critical building block is the VCO, which dominates the PLL performance, such as phase noise and tuning range. The VCO is usually embedded in a PLL as a tunable frequency synthesizer to provide clean, stable, and more precise carrier signals for frequency up/down-conversion [31]. A high-frequency (HF) CMOS VCO has strict requirements in the transceivers of wireless communication systems. Low power consumption and low phase noise are the challenges in VCO designs. Typically, a VCO is usually comprised of a gain element and a resonator. The resonator determines the oscillation frequency, and when it is composed of energy-storing inductors and capacitors, it is often referred to as an LC tank. A voltage-controlled varactor diode allows the oscillation frequency of the VCO to be varied.

Recently, the demand for high-quality performances but low-cost solutions is raising in the transceivers of modern wireless communication systems [32]. Low–power operation can extend the lifetime of the battery and save money for consumers. The low power consumption can be achieved by reducing the supply voltage and/or the current in the VCO core circuit. Although the low voltage operation can relies on scaling down metal-oxide-semiconductor (MOS) threshold voltage VT,

the low voltage limits the signal amplitude, which in turn limits the signal-to-noise ratio (SNR) and degrades the VCO performance. Kwok and Luong [33] proposed a transformer-feedback oscillator, which swing the output signals dynamically above the supply voltage and below the ground potential to increase the carrier power and to lower the phase noise. This approach does not reduce the VT but in fact it increases

the effective dynamic drain-to-source voltage at a fixed DC voltage. In addition, the another challenge in designing VCOs is minimizing phase noise while maintaining smallest power consumption [34].

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Chapter 4 Design of a Dual Band VCO for 2.5 GHz and 3.5 GHz WiMAX

be low enough since the most critical performance specification for an oscillator is phase noise. In a receiver, the phase noise of the LO limits the ability to detect a weak signal in the presence of a strong signal in an adjacent channel. In a transmitter, phase noise results in energy being transmitted outside of the desired band. To achieve low phase noise, we have discussed and proposed the new and efficient method to reduce the phase noise of a VCO without increasing power consumption in Chapter 3.

In this chapter, we will focus on how to design a low-power-consumption low-cost and low-phase-noise dual-band LC-VCO for WiMAX. In order to conform with Taiwan giving fresh impetus to WiMAX, we design a dual-band LC-VCO covering 2.5 GHz and 3.5 GH. The section 4.2 briefly describes the current-reused LC-VCO topology that can only operate with only half the amount of DC current compared to those of the conventional LC-VCO topology. The current-reused dual-band LC-VCO combined with an external and large resistor at the substrate node of NMOS is proposed in the section 4.3. In section 4.4, the simulated and measured results are compared.

4.2 Proposed Voltage Controlled Oscillator Architecture

Figure 4.2 shows two typical LC tank oscillators. Figure 4.2(a) uses all-NMOS cross-coupled pair to provide negative-GM and Figure 4.2(b) employs all-PMOS

cross-coupled pair. In both structures, MOS coupled pair is an active element to compensate for the losses of the inductor and the capacitor.

The phase noise of PMOS cross-coupled pair oscillator is lower than NMOS structure since the intrinsic noise of PMOS is lower than NMOS. Nevertheless, the output power of NMOS cross-coupled pair oscillator is larger than PMOS structure.

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Chapter 4 Design of a Dual Band VCO for 2.5 GHz and 3.5 GHz WiMAX

To sum up, we can use the NMOS and PMOS cross-coupled pairs that is called complementary cross-coupled pair) to provide negative GM. There are several reasons

why the complementary structure is superior to the all-NMOS structure [35].

Figure 4.2 Two typical LC tank oscillator structures.

1. The complementary structure offers better rise- and fall-time symmetry. It makes less up-conversion of 1/ f noise and other lower frequency noise sources.

2. The complementary structure offers higher transconductance for a given current, which results in a better start-up behavior.

3. The complementary structure also exhibits better noise performance for all bias points illustrated in Figure 4.3

As long as the oscillator operates in the current-limited regime, the tank voltage swing is the same for both oscillators. However if we desire to operate in the voltage-limited region, the all-NMOS structure can offer a larger voltage swing.

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Chapter 4 Design of a Dual Band VCO for 2.5 GHz and 3.5 GHz WiMAX

Figure 4.3 Phase noise for the complementary and All-NMOS.

Figure 4.4 illustrates the schematic of the complementary cross-coupled LC-VCO without the tail current source, which is adopted in this work. From the phase noise point of view, this topology reveals better noise performance than the one in Figure 4.3. This is due to the fact that the 1/f 3 noise of the topology without the tail current can only originate from the flicker noise of the MOS transistor switches.

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Chapter 4 Design of a Dual Band VCO for 2.5 GHz and 3.5 GHz WiMAX

These switches are expected to feature lower flicker noise than the tail current source that dominates the 1/f 3 noise, for two main reasons. First, the switches operate in triode region for large portions of the oscillation period; hence, they exhibit lower current flicker noise than the tail transistor that continuously operates in saturation. Second, switched MOS transistors are known to have lower flicker noise than transistors biased in the stationary condition [36]. Nevertheless, the main drawback of this topology is a higher sensitivity of the frequency to the voltage supply (frequency pushing). This effect can be alleviated by using a supply voltage regulator.

Here, we propose the current-reused LC-VCO that uses both NMOS and PMOS transistor in cross-coupled pair as a negative conductance generator to achieve low power consumption easily. As shown in Figure 4.5, the series stacking of NMOS and PMOS allows the supply current to be reduced by half compared to that of the conventional LC-VCO while providing the same negative conductance. This topology is not only low-power-consumption but also low-cost since it only used one inductor and two MOS transistors, but the conventional LC-VCO used two inductors and four MOS transistors.

數據

Figure 3.1 RF NMOS schematic cross section with the parasitic components.
Figure 3.3 The complete small-signal circuit model for RF MOS transistor.
Figure 3.6 Simplified equivalent circuit model of the substrate with an added resistor  R bx
Figure 3.7 (a) shows the simplified equivalent voltage noise circuit model with  the added external resistor and Figure 3.7 (b) shows the simplified equivalent current  noise circuit model with the added external resistor
+7

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