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Single Crystalline GaN Epitaxial Layer Prepared on Nano-Patterned Si(001) Substrate

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Single Crystalline GaN Epitaxial Layer Prepared on

Nano-Patterned Si(001) Substrate

C. C. Huang,

a

S. J. Chang,

a,z

C. H. Kuo,

b

C. H. Wu,

c

C. H. Ko,

c

Clement H. Wann,

c

Y. C. Cheng,

d

and W. J. Lin

d

aInstitute of Microelectronics & Department of Electrical Engineering, Center for Micro/Nano Science and Technology, Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 70101, Taiwan

bInstitute of Lighting and Energy Photonics, National Chiao Tung University, Guiren, Tainan 71150, Taiwan c

Taiwan Semiconductor Manufacturing Company, Hsinchu 300, Taiwan

dMaterials and Electro-Optics Research Division, Chung Shan Institute of Science and Technology, Taoyuan 325, Taiwan

The authors report the growth of GaN epitaxial layers on nano-patterned Si(001) substrates prepared by the standard facilities used in integrated circuit (IC) industry. It was found that we could achieve high-quality single crystalline GaN by using the 50 nm SiO2 recess patterned Si(001) substrate. It was also found that we can reduce the tensile stress in GaN epitaxial layer by about 95% using the nano-patterned Si(001) substrate, as compared to the conventional un-patterned Si(111) substrate.

VC2011 The Electrochemical Society. [DOI: 10.1149/1.3569753] All rights reserved.

Manuscript submitted December 23, 2010; revised manuscript received March 2, 2011. Published April 4, 2011.

GaN-based high-brightness light-emitting diodes (LEDs) were first demonstrated in 1993.1 Since then, the development of these LEDs is very successful over the past few decades. With a wide direct bandgap, GaN-based materials can also be used as laser diodes,2 high electron mobility transistors3 and ultraviolet (UV) photodetectors.4 Conventional GaN-based epitaxial layers were grown either on sapphire or on SiC substrates. However, SiC sub-strates are expensive while sapphire subsub-strates are electrical insulators with poor thermal conductivity. Instead of using these substrates, epitaxy of GaN on Si is cost effective. To grow GaN on Si, Si(111) substrate is normally used due to its 6-fold atomic arrangement (i.e., 3-fold symmetry) at the surface which is more suitable for the epi-taxial growth of hexagonal GaN.5However, Si(001) substrates are used in the mainstream silicon technology. Thus, growing GaN on Si(001) is preferred for the integration of GaN-based optical devices with Si-based microelectronics. However, previous studies showed that GaN growth on Si(001) leads to polycrystalline structures or very rough surface.5This is mainly due to the fact that the 4-fold symmetry of Si(001) allows GaN to grow with two preferred rota-tional alignments. The large mismatches in thermal expansion coef-ficient and lattice constant between Si and GaN also lead to high threading dislocation (TD) density in the epitaxial layer and possible formation of crack networks. It has been shown that these problems can be partially solved by using tilted Si(001) substrate6and/or by inserting a proper intermediate layer.7

Patterned substrate and epitaxial lateral overgrowth (ELO) are two commonly used methods to reduce TD density in GaN prepared on sapphire substrate. Similar reduction in TD density has also been reported for GaN on Si(111).8,9It should be noted the features used in conventional patterned substrate and ELO are both in the order of micrometers. Recently, it has been shown both theoretically and experimentally that TD density in GaN epitaxial layers can be fur-ther reduced by nanometer-sized patterns.10 This was attributed to the fact that nano-scaled features can effectively minimize the strain energy induced by lattice mismatch. To prepare nano-patterns, one can use nano-sphere lithography,11,12 laser holography13or anodic aluminum oxide (AAO) process.14Using these methods, it has been shown that nano-patterns can indeed further reduce TD density in GaN prepared on sapphire substrate.15,16However, it is difficult to apply these methods to large-sized substrates with good uniformity and good reproducibility. On the other hand, nanometer-sized pat-terns can be formed on large-sized Si(001) substrates easily in cur-rent integrated circuit (IC) industry. In this study, we report the growth of GaN on Si(001) substrates nano-patterned by e-beam

li-thography and dry etching. Physical and optical properties of the GaN epitaxial films will also be discussed.

Experimental

Prior to the growth of GaN epitaxial layers, we used standard IC processing facilities in Taiwan Semiconductor Manufacturing Com-pany (TSMC) to form two different kinds of nano-patterns (i.e., SiO2 recess and Si recess) on Si(001) substrates. We first cleaned

the Si(001) substrates by standard RCA method. An e-beam lithog-raphy system was then used to define parallel stripes along the <100> direction on the chemically cleaned substrates. A dry etcher was subsequently used to define the nano-patterns with an etching depth of 200 nm. The etched regions were then filled with SiO2by

plasma enhanced chemical vapor deposition (PECVD). For SiO2

recess substrates, we immersed the substrates in dilute HF for 60 s to remove 50 nm of the deposited SiO2. As shown in Fig. 1a, the

width of the remaining Si nano-stripes was kept at 50 nm while the spacing between two neighboring Si nano-stripes was kept either at 50 nm (i.e., 50 nm SiO2recess) or at 200 nm (i.e., 200 nm SiO2

recess). For Si recess substrates, we used dry etching to remove the exposed Si nano-stripes. As shown in Fig. 1b, the width of the remaining SiO2nano-stripes was kept at 50 nm while the spacing

between two neighboring SiO2 nano-stripes was kept either at 50

nm (i.e., 50 nm Si recess) or at 200 nm (i.e., 200 nm Si recess). The nano-patterned substrates were subsequently loaded onto a metalor-ganic chemical vapor deposition (MOCVD) system to grow the GaN epitaxial layers. Figures 2aand2bshow schematic diagrams of the growth steps for the samples prepared on SiO2 recess

sub-strates and Si recess subsub-strates, respectively. After loading the nano-patterned substrates onto the MOCVD system, we treated the substrates in hydrogen ambient at 1080C, followed by the growth of a 50-nm-thick low-temperature (LT) AlN nucleation layer at 720C and a 1.5-lm-thick GaN layer at 1080C.

For comparison, we also prepared GaN epitaxial layers on con-ventional un-patterned Si(111) substrate. As shown in Fig. 2c, the structure consists of a 50-nm-thick high-temperature (HT) AlN nucleation layer grown at 1240C and a 2-lm-thick GaN layer grown at 1120C. A transmission electron microscopy (TEM) was then used to analyze structural properties of the as-grown samples. Micro-photoluminescence (PL) characteristics of the samples were also measured by using a 3 mW continuous wave (CW) He-Cd laser operated at 325 nm as the excitation source. The luminescence sig-nal generated from the samples was recorded by a lock-in amplifier at room temperature. Micro-Raman measurements were also per-formed at room temperature using a 532 nm yttrium aluminum gar-net (YAG) laser as the excitation source.

z

E-mail: [email protected]

Journal of The Electrochemical Society, 158 (6) H626-H629 (2011)

0013-4651/2011/158(6)/H626/4/$28.00VCThe Electrochemical Society

H626

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Results and Discussion

Figure 3shows cross-sectional TEM image of the sample pre-pared on un-pattern Si(111) substrate. It can be seen clearly that a significant amount of TDs were generated from the GaN/Si(111) interface due to the large mismatches in lattice constant and thermal expansion coefficient between GaN and Si(111). Similar result has also been reported elsewhere.8,9Figures4a4d, show cross-sectional

TEM images of the samples prepared on 50 nm SiO2 recess

pat-terned Si(001) substrate, 50 nm Si recess patpat-terned Si(001) sub-strate, 200 nm SiO2recess patterned Si(001) substrate and 200 nm

Si recess patterned Si(001) substrate, respectively. For the sample prepared on 50 nm Si recess patterned Si(001) substrate, it was found that LT AlN can not fill the 50 nm trench completely due to the large aspect ratio. As a result, a LT AlN layer was formed, as shown in Fig.4b. It is possible that the LT AlN was first grown on the SiO2nano-stripes and then extended horizontally to form a

con-tinuous planar-like layer. Since this LT AlN was initiated on top of the amorphous SiO2, the subsequently deposited GaN layer will also

become amorphous. As we increased the spacing between the neigh-boring SiO2nano-strips to 200 nm, it was found that LT AlN was

deposited uniformly on the exposed Si(001) surface. As shown in Fig.4d, we could thus achieve crystalline GaN epitaxial layer with the LT AlN serving as the nucleation layer. Grown vertically from the exposed Si(001) surface, it should be noted that the subsequently

deposited GaN epitaxial layer should contain both hexagonal phase and cubic phase.

Figure4ashows TEM image of the sample prepared on 50 nm SiO2 recess patterned Si(001) substrate. With 50 nm spacing

between two neighboring Si nano-stripes, it is difficult to initiate the growth vertically from the exposed SiO2surface. Thus, the growth

should be initiated horizontally from the sidewalls of the Si nano-stripes. Similarly, TDs generated during the initial growth should also be generated from the sidewalls of the Si nano-stripes, propa-gated horizontally and eventually terminated at the sidewalls of the neighboring Si nano-stripes. As a result, we could achieve single crystalline GaN epitaxial layer with only few TDs. As we increased the spacing between two neighboring Si nano-stripes to 200 nm, vertical growth initiated from the exposed SiO2 surface should

become dominated. As shown in Fig.4c, the subsequently deposited GaN layer will also become amorphous.

Figure 5 shows micro-Raman spectra measured from samples prepared on un-patterned Si(111) substrate, 200 nm Si recess pat-terned Si(001) substrate and 50 nm SiO2 recess patterned Si(001)

substrate. For the sample prepared on un-patterned Si(111) sub-strate, only one Raman peak at 565.0 cm1was observed. This peak should be attributed to the high frequency E2mode of the hexagonal

GaN.17,18Similar peaks located at 566.3 and 566.9 cm1were also

Figure 1. Schematic diagrams of the processing steps used to prepare (a) SiO2recess patterned Si(001) substrate and (b) Si recess patterned Si(001) substrate.

Figure 2. Schematic diagrams of the MOCVD growth steps for (a) samples prepared on SiO2recess substrates and Si recess substrates, (b) samples prepared on Si recess patterned Si(001) substrate, and (c) samples prepared on Si(111) substrate. Figure 3. Cross-sectional TEM image for the samples prepare on un-pat-terned Si(111) substrate.

Journal of The Electrochemical Society, 158 (6) H626-H629 (2011) H627

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observed from the samples prepared on 200 nm Si recess patterned Si(001) substrate and 50 nm SiO2recess patterned Si(001) substrate,

respectively. It has been shown previously that the E2mode Raman

peak of the unstrained hexagonal GaN is located at 567.0 cm1.19In other words, the Raman peak position red-shifted by 2.0, 0.7, and 0.1 cm1 for the samples prepared on un-patterned Si(111) sub-strate, 200 nm Si recess patterned Si(001) substrate and 50 nm SiO2

recess patterned Si(001) substrate, respectively. It has also been reported that the relationship between the E2 mode Raman peak

shift (Dx) and the in-plane biaxial stress (rxx) can be expressed as:

Dx¼ 4.3rxxcm1GPa1.20Using the equation, it was found that

in-plane biaxial stress in the sample prepared on conventional un-patterned Si(111) substrate was around 0.48 GPa. In contrast, in-plane biaxial stress in the sample prepared on 200 nm Si recess pat-terned Si(001) substrate was 0.16 GPa while the sample prepared on 50 nm SiO2 recess patterned Si(001) substrate was only around

0.023 GPa. In other words, we can reduce tensile stress in the GaN

epitaxial layer by about 95% using the 50 nm SiO2recess patterned

Si(001) substrate, as compared to the conventional un-patterned Si(111) substrate. Other than the E2mode Raman peak of the

hexag-onal GaN, an additihexag-onal peak located at 557 cm1was also observed from the sample prepared on 200 nm Si recess patterned Si(001) substrate. This peak should be attributed to TO mode of cubic GaN.21,22The observation of this peak indicates that GaN epitaxial layer prepared on 200 nm Si recess patterned Si(001) substrate exhibits both cubic and hexagonal phases.

Figure 6 shows micro-PL spectra measured from the samples prepared on un-patterned Si(111) substrate, 200 nm Si recess pat-terned Si(001) substrate and 50 nm SiO2 recess patterned Si(001)

substrate. As expected, it was found that only one PL peak located at 365 nm was observed from the sample prepared on un-patterned Si(111) substrate. This peak is attributed to band edge emission of the stable hexagonal GaN.23In contrast, one extra peak located at

Figure 4. (Color online) Cross-sectional TEM images of the samples on (a) 50 nm SiO2 recess patterned Si(001) substrate, (b) 50 nm Si recess patterned Si(001) sub-strate, (c) 200 nm SiO2 recess patterned Si(001) substrate and (d) 200 nm Si recess patterned Si(001) substrate.

Figure 5. Micro-Raman spectra measured from the samples prepared on un-patterned Si(111) substrate, 200 nm Si recess un-patterned Si(001) substrate and 50 nm SiO2recess patterned Si(001) substrate.

Figure 6. Room-temperature micro-PL spectra measured from the samples prepared on un-patterned Si(111) substrate, 200 nm Si recess patterned Si(001) substrate and 50 nm SiO2recess patterned Si(001) substrate.

Journal of The Electrochemical Society, 158 (6) H626-H629 (2011) H628

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375 nm was observed from the sample prepared on 200 nm Si recess patterned Si(001) substrate. This peak is attributed to band edge emission of the metastable cubic GaN.24,25The observation of the

peak at 375 nm again indicates that some cubic GaN was indeed formed in the epitaxial layer. This suggests that hexagonal phased GaN and cubic phased GaN co-existed in this particular sample. Such an observation also agrees with the micro-Raman result shown in Fig.5. Similar to the sample prepared on un-patterned Si(111), it was found that only the hexagonal phased GaN peak at 365 nm was observed from the sample prepared on 50 nm SiO2recess patterned

Si(001) substrate. It should be noted that the 5.5 nm PL full-width-half-maximum (FWHM) observed from the sample prepared on 50 nm SiO2recess patterned Si(001) substrate was much smaller than

that observed from the sample prepared on un-patterned Si(111) substrate (i.e., 10.2 nm). The significantly smaller FWHM indicates that the GaN epitaxial layers prepared on 50 nm SiO2recess

pat-terned Si(001) substrate was single crystalline with good crystal quality. It also suggests that the nano-patterned Si(001) substrate proposed in this study is potentially useful for the performance improvement of GaN-based opto-electronic devices.

Conclusion

In summary, we report the growth of GaN epitaxial layers on nano-patterned Si(001) substrates prepared by the standard facilities used in IC industry. It was found that we could achieve high-quality single crystalline GaN by using the 50 nm SiO2recess patterned Si(001)

sub-strate. It was also found that we can reduce the tensile stress in GaN epitaxial layer by about 95% using the nano-patterned Si(001) sub-strate, as compared to the conventional un-patterned Si(111) substrate.

Acknowledgments

The authors wish to thank the Minister of Economic Affair (MOEA) supported by MOEA grants No.98-EC-17-A-09-02-0769. This work was also supported in part by the Center for Frontier Mate-rials and Micro/Nano Science and Technology, National Cheng Kung University (NCKU) and in part by the Advanced Optoelectronic Technology Center, NCKU, under projects from the Ministry of Edu-cation. The authors also thank the Bureau of Energy, Ministry of Eco-nomic Affairs of Taiwan, for financially supporting this research under contract No. 98-D0204-6 and the LED Lighting and Research Center, NCKU, for the assistance in related measurements.

National Cheng Kung University assisted in meeting the publication costs of this article.

References

1. S. Nakamura, M. Senoh, and T. Mukai,Jpn. J. Appl. Phys., 32, L8 (1993). 2. S. Nakamura, M. Senoh, S. Nagahama, N. Iwasa, T. Yamada, T. Matsushita,

H. Kiyoku, and Y. Sugimoto,Jpn. J. Appl. Phys., 35, L74 (1996).

3. Y. Z. Chiou, S. J. Chang, Y. K. Su, C. K. Wang, T. K. Lin, and B. R. Huang,IEEE Trans. Electron Devices, 50, 1748 (2003).

4. M. L. Lee, J. K. Sheu, W. C. Lai, S. J. Chang, Y. K. Su, M. G. Chen, C. J. Kao, G. C. Chi, and J. M. Tsai,Appl. Phys. Lett., 82, 2913 (2003).

5. P. Kung, D. Walker, M. Hamiton, J. Diaz, and M. Razeghi,Appl. Phys. Lett., 74, 570 (1999).

6. S. Joblot, F. Semond, F. Natali, P. Venne´gue`s, M. Lau¨gt, Y. Cordier, and J. Mas-sies,Phys. Status Solidi C, 2, 2187 (2005).

7. S. Nishimura, H. Hanamoto, K. Terashima, and S. Matsumoto,Mater. Sci. Eng., B, 93, 135 (2002).

8. F. Schulze, A. Dadgar, J. Bla¨sing, and A. Krost, Appl. Phys. Lett., 84, 4747 (2004).

9. S. J. Chang, Y. C. Lin, Y. K. Su, C. S. Chang, T. C. Wen, S. C. Shei, J. C. Ke, C. W. Kuo, S. C. Chen, and C. H. Liu,Solid-State Electron., 47, 1539 (2003). 10. Y. Honda, Y. Kawaguchi, Y. Ohtake, S. Tanaka, M. Yamaguchi, and N. Sawaki,

J. Cryst. Growth, 230, 346 (2001).

11. N. P. Kobayashi, J. T. Kobayashi, X. Zhang, P. D. Dapkus, and D. H. Rich,Appl. Phys. Lett., 74, 2836 (1999).

12. A. Alizadeh, P. Sharma, S. Ganti, S. F. Leboeuf, and L. Tsakalakos,J. Appl. Phys., 95, 8199 (2004).

13. Y. K. Su, J. J. Chen, C. L. Lin, S. M. Chen, W. L. Li, and C. C. Kao,J. Cryst. Growth, 311, 2973 (2009).

14. B. J. Kim, M. A. Mastro, H. Jung, H. Y. Kim, S. H. Kim, R. T. Holm, J. Hite, C. R. Eddy, Jr., J. Bang, and J. Kim,Thin Solid Films, 516, 7744 (2008).

15. J. Lee, D. H. Kim, J. Kim, and H. Jeon,Curr. Appl. Phys., 9, 633 (2009). 16. L. C. Chen, C. K. Wang, J. B. Huang, and L. S. Hong, Nanotechnology, 20,

085303 (2009).

17. D. D. Manchon, Jr., A. S. Barker, Jr., P. J. Denn, and R. B. Zatterson,Solid State Commun., 8, 1227 (1970).

18. L. A. Falkovsky, W. Knap, J. C. Chervin, and P. Wisnievski,Phys. Rev. B, 57, 11349 (1998).

19. M. Kuball,Surf. Interface Anal., 31, 989 (2001).

20. K. Y. Zang, Y. D. Wang, S. J. Chua, L. S. Wang, S. Tripathy, and C. V. Thompson,

Appl. Phys. Lett., 88, 141925 (2006).

21. B. H. Bairamov, O. Guerdal, A. Botchkarev, H. Morkoc, G. Irmer, and J. Monecke,

Phys. Rev. B, 60, 16741 (1999).

22. S. Tripathy, S. J. Chua, P. Chen, and Z. L. Miao,J. Appl. Phys., 92, 3503 (2002).

23. A. Dadgar, J. Blasing, A. Diez, A. Alam, M. Heuken, and A. Krost,Jpn. J. Appl. Phys., 39, L1183 (2000).

24. X. L. Sun, H. Yang, L. X. Zheng, D. P. Xu, J. B. Li, Y. T. Wang, G. H. Li, and Z. G. Wang,Appl. Phys. Lett., 74, 2827 (1999).

25. Z. X. Liu, A. R. Goni, K. Syassen, H. Siegle, C. Thomsen, B. Schoettker, D. J. As, and D. Schikora,J. Appl. Phys., 86, 92 (1999).

Journal of The Electrochemical Society, 158 (6) H626-H629 (2011) H629

) unless CC License in place (see abstract). ecsdl.org/site/terms_use

address. Redistribution subject to ECS terms of use (see 140.113.38.11

數據

Figure 4a shows TEM image of the sample prepared on 50 nm SiO 2 recess patterned Si(001) substrate
Figure 6 shows micro-PL spectra measured from the samples prepared on un-patterned Si(111) substrate, 200 nm Si recess  pat-terned Si(001) substrate and 50 nm SiO 2 recess patterned Si(001)

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