Novel Isolated High-step-up DC-DC Converter with Voltage Lift

Novel Isolated High-step-up DC–DC Converter with Voltage Lift

Tsorng-Juu Liang, Member, IEEE, Jian-Hsieng Lee, Shih-Ming Chen, Jiann-Fuh Chen, Member, IEEE, and Lung-Sheng Yang

Abstract –A novel two-switch high-step-up isolated converter with voltage lift is proposed in this paper. The proposed isolated converter utilizes a transformer with low turn ratio to achieve high step-up gain. The secondary winding charges two boosting capacitors in parallel as switches during the switch-on period, and two boosting capacitors are discharged in series during switch-off period. Thus, the converter has high voltage gain with appropriate duty ratio. In addition, by using two clamping diodes and capacitor on the primary side, leakage energy is recycled and the voltage spikes of the two active switches are clamped, thereby improving conversion efficiency. Finally, experimental results based on a prototype implemented in the laboratory with input voltage 24 V, output voltage 200 V, and output power 200 W verify the performance of the proposed isolated converter; full- load efficiency is nearly 93%.

Index Terms – High-step-up, two-switch isolated converter, voltage lift technique, high voltage gain

I. I NTRODUCTION

In 2011, the March 11 earthquake in Japan severely damaged several reactors at the Fukushima Nuclear Plant, thereby releasing a significant amount of radioactive material into the atmosphere. This event has led people to consider global abolishment of nuclear power plant operations.

Furthermore, in recent years, massive amounts of petrochemical energy has been used, producing high levels of pollution that cause drastic climate change from the release of greenhouse gases. Thus, the development of clean and green renewable energy conversion systems, such as photovoltaic (PV), fuel cell, and tide energy conversion systems need to be accelerated. Front-end stage circuits of these applications need a high-step-up converters. These converter can be also applied in battery backup systems for uninterrupted power supplies (UPS) and high-intensity discharge (HID) lamp ballasts for motorcycle/automobile lighting also require high-step-up converters [1],[2].

Manuscript received April 29, 2011; revised September 19, 2011; Accepted for publication October 29, 2011.

Copyright © 2011 IEEE. Personal use of this material is permitted.

However, permission to use this material for any other purposes must be obtained from the IEEE by sending a request to [email protected].

T.-J. Liang, J.-H. Lee, S.-M. Chen and J.-F. Chen are with the Department of Electrical Engineering / Advanced Optoelectronic Technology Center (AOTC) / Green Energy Electronics Research Center (GREERC) National Cheng- Kung University, Tainan, Taiwan, R.O.C. (Corresponding author e-mail:

[email protected]) .

L.-S. Yang is with the Department of Electrical Engineering, Far East University, Tainan, Taiwan. (e-mail: [email protected]).

Conventional isolated converters such as flyback, forward, push–pull, and SEPIC converters can achieve high voltage gain by adjusting the turn ratio of the transformer. However, leakage of inductance energy in the transformer causes high voltage spikes in the switches, reducing system efficiency [3]–

[5]. In order to reduce the voltage spike, snubber circuits can be used to reduce the voltage spike, such as resistor–capacitor–

diode (RCD) snubber circuits, non-dissipative snubber circuits, and active clamp circuits [7]–[9].

Many non-isolated topologies have been presented to obtain high step-up voltage gain in the past decade [10]–[26].

These non-isolated converters can be used with the coupled- inductor [10]–[16], cascaded technique [17]–[22], and switched-inductor and switched-capacitor techniques [23]–[26]

to obtain high voltage gain with the appropriate duty ratio.

However, non-isolated converters cannot meet the safety standards needed in galvanic isolation. In order to meet the safety standards of galvanic isolation, some isolated converters for high-step-up applications have been proposed. These converters are secondary-series boost converters [27],[28], voltage-lift techniques [29],[30], and boost-type converters integrated with transformer [31],[32] to obtain high voltage gain. Active clamp circuits can be used to recycle energy leakage and also reduce voltage spike of switches. Since these circuits require two or more drive signals. This will increase the drive circuit and control complexity.

This paper proposes a novel high-efficiency high-step-up isolated DC–DC converter using one control gate driver signal and diodes D 1 and D 2 to recycle leakage energy of the transformer to the input side. According to the concept of charge in parallel and discharge in series, output capacitors C 1

and C 2 and diode D 3 and D 4 are utilized to form two voltage double circuits and obtain high voltage gain. The system configuration of the proposed isolated DC–DC topology is depicted in Fig. 1. The circuit includes DC input voltage V in , input capacitor C in , two clamping diodes D 1 and D 2 , two active switches S 1 and S 2 , transformer Tr, two boosting capacitors C 1

and C 2 , two boosting diodes D 3 and D 4 , output diode D o , output capacitor C o , output load R. Switches S 1 and S 2 are controlled simultaneously by one control signal. The transformer includes magnetizing inductance L m and leakage inductance L kp and L ks . Compared with the flyback converter or other high-step up isolated converters [29],[30] in the same output voltage, the transformer only needs a small safety standard distance.

The features of proposed isolated converter are as follows:

1) meets the safety standards of galvanic isolation.

2) smaller safety standards distance of transformer.

3) high step-up voltage gain.

4) two diodes in the primary side is used to recycle the leakage inductance energy of the transformer and also clamp the voltage of active switches, Thus, system efficiency is improved.

Fig. 1. Proposed isolated DC–DC converter circuit

II. O PERATING P RINCIPLE OF THE P ROPOSED C ONVERTER

In order to simplify the analysis of the proposed converter, the following are assumed over one switching period:

1) The capacitors C in , C 1 , C 2 , and C o are large enough; thus, V in , V C1 ,V C2 , and V o are regarded as constant values.

2) The active switches and all diodes are regarded as ideal.

3) The turn ratio of the transformer is defined as

P S

N

n  N (1)

where N P and N S are the winding turns in the primary and secondary side, respectively.

4) The parasitic inductors, capacitors, and resistors of circuit traces are ignored.

(A) CCM Operation

The key waveforms of the proposed converter at continuous condition mode (CCM) operation is depicted in Fig.

2 and discussed in detail below. In CCM operation, the operating mode of the proposed isolated converter can be divided into six operating modes over one switching period:

1) Mode I [t 0 , t 1 ]: During this subinterval, active switches S 1

and S 2 are simultaneously on. Diodes D 1 , D 2 , D 3 , and D 4

are reverse-biased, whereas D o is forward-biased. The equivalent circuit of the isolated DC–DC converter is depicted in Fig. 3(a). The primary magnetizing inductance L m stores energy from the DC input voltage V in . The voltage across magnetizing inductance L m and leakage inductance L k in series is V in . The primary current of i in , i SW1 , i Lk and i SW2 are equal. The current continually increases. However, the secondary winding current i s

decreases because the secondary leakage inductor L ks limits the flow to the output. The secondary winding voltage v Ls

and boosting voltages V C1 and V C2 are linked in series to

release energy to the output capacitor C o and the output load R. When secondary winding current i s drops to zero, boosting capacitors C 1 and C 2 begin to charge the DC input voltage V in . The energy is delivered from the primary side N p to secondary side N s through D 3 and D 4 . This operating mode ends when i Lk = i Lm at t = t 1 .

2) Mode II [t 1 , t 2 ]: During this subinterval, switches S 1 and S 2

remain simultaneously on. Diodes D 1 , D 2 , and D o are reverse-biased, whereas D 3 and D 4 are forward-biased. The equivalent circuit of the isolated DC–DC converter is depicted in Fig. 3(b). The primary magnetizing inductance L m continues to store energy from the DC input voltage V in . Portions of the energy from DC input voltage V in is delivered to the secondary winding through D 3 and D 4 to charge the boosting capacitors C 1 and C 2 , respectively. The voltages across C 1 and C 2 are nearly equal to nV in , whereas the current i D3 is almost equal to i D4 . The output capacitor C o is releases energy to output load R. This operating mode ends when active switches S 1 and S 2 are turned off simultaneously at t = t 2 .

3) Mode III [t 2 , t 3 ]: During this subinterval, active switches S 1

and S 2 are simultaneously off. Diodes D 1 , D 2 , and D o are reverse-biased, whereas D 3 and D 4 are forward-biased. The equivalent circuit of the isolated DC-DC converter is depicted in Fig. 3(c). The leakage current i LK charges the parasitic capacitor C DS1 and C DS2 of active switches S 1 and S 2 . The voltages of V S1 and V S2 increase until t 3 . Boosting capacitors C 1 and C 2 continue to charge the DC input voltage V in through the secondary winding. D 3 , D 4 , and output capacitor C o continue to release energy to output load R. This operating mode ends when the voltage V S1 and V S1 are equal to V in ; diodes D 1 and D 2 are forward-biased at t = t 3 .

4) Mode IV [t 3 , t 4 ]: During this subinterval, active witches S 1

and S 2 are simultaneously turned off. Diodes D 1 , D 2 , D 3 , and D 4 are forward-biased, whereas D o is reverse-biased.

The equivalent circuit of the isolated DC–DC converter is depicted in Fig. 3(d). The leakage current i LK flows through D 1 and D 2 to charge the input capacitor, clamping the maximum spike voltage of the two active switches so that the leakage energy can be recycled. The leakage current i LK

decreases quickly. Boosting capacitors C 1 and C 2 continue to produce energy in parallel mode. This operating mode ends when the clamping diode currents i D1 and i D2 equal zero at t = t 4 .

5) Mode V [t 4 , t 5 ]: During this sub-interval, active switches S 1

and S 2 are simultaneously off. Diode D o is forward-biased, whereas diodes D 1 , D 2 , D 3 , and D 4 are reverse-biased. The equivalent circuit of the isolated DC–DC converter is depicted in Fig. 3(e). The two capacitors C DS1 and C DS2

voltage decays are caused by resonant current through the leakage inductance L k and the parasitic capacitor C DS1 and C DS2 of active switches S 1 and S 2. Boosting capacitors C 1

and C 2 still produce energy in parallel mode and output capacitor C o continues to release energy to output load R.

This operating mode ends when capacitors C DS1 and C DS2

are equal to (V o /n-V in )/2 at t = t 5 .

6) Mode VI [t 5 , t 6 ]: During this subinterval, active switches S 1

and S 2 are simultaneously off. Diode D o is forward-biased,

whereas diodes D 1 , D 2 , D 3 , and D 4 are reverse-biased. The equivalent circuit of the isolated DC–DC converter is depicted in Fig. 3(f). The energy of magnetizing inductance L m is delivered to the secondary winding N p and N s . Secondary-side voltage V Ls is linked in series with V C1 and V C2 to release energy to output capacitor C o and output load R. This operating mode ends when active switches S 1 and S 2

are turned on simultaneously at t = t 6 .

0 0

v _S1 , v _S2 i D1 , i D2

t

t

0 0

0 t

t

t

0 t

DT s (1-D)T s

T s

i _SW1 , i _SW2 i Lk

i Lm

v _gs1 , v _gs2

0

i S

t

t 0 t 1 t 2 t 3 t 4 t 5 t 6

ModeI ModeII ModeIII ModeIV ModeV ModeVI

0 t

i in

0

i D3 , i D4

t

0

i Do

t

0 t

i Co

Fig. 2. Key waveforms of the proposed converter at CCM operation

(a) Mode I

(b) Mode II

(c) Mode III

(d) Mode IV

(e) Mode V

(f) Mode VI

Fig. 3. Equivalent circuits of the isolated DC–DC converter over one switching period at CCM operation: (a) Mode I; (b) Mode II; (c) Mode III; (d) Mode IV; (e) Mode V; (f) Mode VI.

(B) DCM Operation

The key waveforms of the proposed converter at discontinuous condition mode (DCM) operation is depicted in Fig. 4. To simplify the analysis for DCM operation mode, the leakage inductances L kp and L ks of the transformer are neglected. Equivalent circuits of the isolated DC–DC converter over one switching period at DCM operation are depicted in Fig. 5. There are three operating modes in DCM:

1) Mode I [t 0 , t 1 ]: During this sub-interval, active switches S 1 and S 2 are simultaneously on. Diodes D 1 , D 2 , and D o are reverse-biased, whereas D 3 and D 4 are forward-biased. The equivalent circuit of the isolated DC–DC converter is depicted in Fig. 5(a). The primary magnetizing inductance L m stores energy from the DC input voltage V in . Portions of the energy by DC input voltage V in is delivered to the secondary winding through D 3 and D 4 to charge capacitors C 1 and C 2 . The voltages across C 1 and C 2 are nearly equal to nV in , and current i D3 is nearly equal to i D4 . Output capacitor C o releases energy to output load R. This operating mode ends when active switches S 1 and S 2 are turned off at t = t 1 . 2) Mode II [t 1 , t 2 ]: During this subinterval, active switches S 1

and S 2 are simultaneously off. Diode D o is forward-biased, whereas diodes D 1 , D 2 , D 3 and D 4 , are reverse-biased. The equivalent circuit of the isolated DC–DC converter is depicted in Fig. 6(b). The magnetic energy of L m , C 1 , and C 2 are released to output capacitor C o and output load R.

This mode ends when the energy stored in L m is depleted at t = t 2 .

3) Mode III [t 2 , t 3 ]: During this subinterval, active switches S 1

and S 2 are simultaneously off. Diodes D 1 , D 2 , D 3 , D 4 , and D o are reverse-biased. The equivalent circuit of the isolated DC-DC converter is depicted in Fig. 6(c). The energy stored in output capacitor C o is discharged to load R. This mode ends when active switches S 1 and S 2 are turned on at t = t 3 .

0

v _S1 , v _S2

t

0

0 t

t

D 1 T s D 2 T s

T s

i Lm

v _gs1 , v _gs2

0

i S

t

t 0 t 1 t 2 t 3

ModeI ModeII ModeIII

0 t

i _Lk , i _in , i _SW1 , i _SW2

0

i D3 , i D4

t

0

i Do

t

0 t

i Co

Fig. 4. Key waveforms of the proposed converter at DCM operation

D o

V o

C o

S 2

N p

S 1

D 1

D 2

V in C in L m

N s

L kp

C 1

D 3

D 4

C 2

R

T r

L ks

(a) Mode I

D o

V o

C o

S 2

N p

S 1

D 1

D 2

V in C in L m

N s

L kp

C 1

D 3

D 4

C 2

R

T r

L ks

(b) Mode II

D o

V o

C o

S 2

N p

S 1

D 1

D 2

V in C in L m

N s

L kp

C 1

D 3

D 4

C 2

R

T r

L ks

(c) Mode III

Fig. 5. Equivalent circuits of the isolated DC–DC converter over one switching period at DCM operation: (a) Mode I; (b) Modes II; (c) Mode III.

III. S TEADY - STATE A NALYSIS OF THE P ROPOSED C ONVERTER

In steady-state condition analysis, total leakage inductance of the proposed isolated converter continues to be ignored.

(A) CCM Operation

While active switches S 1 and S 2 are simultaneously on, D 3

and D 4 are forward-biased. The primary magnetizing inductance voltage v Lp , boosting capacitors voltage C 1 and C 2

are given by

in

Lp V

v  (2)

in C

C v nV

v ₁  ₂  (3) While active switches S 1 and S 2 are simultaneously off, the primary magnetizing-inductance voltage v Lp for this interval is

n V V

v _Lp  2 _in  ^O (4)

Application of the principle of volt-second balance to primary- side magnetizing inductance L m yields

 ^{DT S }  DT ^{T S} _S ^{ } O in

in dt

n V V dt

0 V ( 2 ) 0 (5) Using (5), the voltage gain is

D D n V M V

in o

CCM 

 

 1

) 2

( (6)

Based on (6), the voltage gain compared of traditional flyback converter and proposed converter at CCM operation with turn ratio n=3 is depicted in Fig. 6. From Fig. 6, the voltage gain of the proposed converter becomes higher than the traditional flyback converters.

The active switches S 1 and S 2 ,diodes D 1 – D 4 , and diode D o of

voltage stresses are given by

2 2

1

in o S S

n v v v

v 



 (7)

in D

D v v

v ₁  ₂  (8)

in o D

D v v nv

v ₃  ₄   (9)

in o

Do v nv

v   (10)

Fig. 6. Voltage gain compared of traditional flyback converter and proposed converter at CCM operation

(B) DCM Operation

In DCM operation, three modes are discussed. The key waveform is depicted in Fig. 4.

When active switches S 1 and S 2 are simultaneously on, D 3 and D 4 are forward-biased. The primary magnetizing- inductance voltage v Lp , capacitors voltage C 1 and C 2 are given by

in

Lp V

v  (11)

in C

C v nV

v ₁  ₂  (12) The peak value of the magnetizing inductance current is given by

S m in

Lmp D T

L

I  V ₁ (13)

When active switches S 1 and S 2 are simultaneously off, the primary magnetizing inductance voltage v Lp for this interval is

n V V

v _Lp  2 _in  ^O (14)

The peak value of the magnetizing inductance current is given by

S m

in o

Lmp D T

L n V V

I 2

 2

 (15)

When active switches S 1 and S 2 are simultaneously off, output diode D o is reverse-biased. The primary magnetizing inductance voltage v Lp for this interval is

 0

v Lp (16) Application of the principle of volt-second balance to primary- side magnetizing inductance L m yields

0 0 )

2

( _{( )}

0

) (

2 1

1 1 2

1   

 

  

 s

s

s s

s

T T D D T

D D D T

T D

o in

in dt dt

n V V dt

V (17)

Using (17), the duty cycle D 2 is given by

in O

in

n V V

D D V

2

1

2   (18)

Based on Fig. 4, the average current of i Co is obtained as

O Lmp

Co D I I

I  n ₂ 

2

1 (19)

Substituting (13), (18), and I Co = 0 into Equation (19) yields

R V n V

V T D V

I nL ^O

in O

S in m

Co 



 )

2 2 (

1 ² ₁ ² (20)

Because I Co equals zero under steady state, (20) can be rewritten as

R V n V

V T D V nL

O

in O

S in m



 ) 2 2 (

1 ² ₁ ² (21)

The normalized magnetizing inductance time constant is defined as

S m

RT

 L

 (22)

where T s is the switching period .

Substituting (22) into (21), the voltage gain is given by

 2

2 2 D 1

n V n

M V

in o

DCM     (23)

(i.e., voltage gain versus duty ratio at DCM operation with different τ and at CCM operation under n = 3 ).

Using (23), the voltage gain versus duty cycle at CCM and DCM with different τ is depicted in Fig. 7.

Fig. 7. Voltage gain versus duty ratio at CCM operation and at DCM operation with different τ with n = 3

(C) Boundary Operating Condition between CCM and DCM If the proposed converter is operated in boundary- condition mode (BCM) (Figs. 2 and. 4), the output current of BCM I oB is given by

s m

o o

oB D T

n L D V D R

I V 1 ) ² ( 1 ) ² 2 (

2  



 (25)

The boundary normalized magnetizing inductance time constant defined as

S m

LB RT

 L

 (26) Using (25), τ LB can be obtained as

) 2 ( 2

) 1 (

2 2

D n

D D

LB 

 

 (27)

The curve of τ is plotted in Fig. 8. If τ is smaller than τ LB , the proposed isolated converter is operated in DCM; otherwise, the proposed isolated converter is operated in CCM

Fig. 8. Boundary condition of the proposed converter with n = 3

IV. D ESIGN AND E XPERIMENT OF THE P ROPOSED C ONVERTER

The laboratory prototype sample is implemented to demonstrate the practicability of the proposed isolated converter. The system specifications and components are as follows:

1) Input DC voltage V in : 24 V 2) Output DC voltage V o : 200 V 3) Maximum output power: 200 W 4) Operating frequency: 50 kHz

5) Input capacitor C in : 3300 F/35 V aluminum capacitor 6) Diodes D 1 and D 2 : SBR20A60CTFP Schottky diode 7) Switches S 1 and S 2 : IRLB3036

8) Transformer: ETD-59, core PC-40, N p :N s = 1:3, L m = 43.5 H; L k = 0.27 H

9) Boosting capacitors C 1 and C 2 : 100 F/ 250 V aluminum capacitor

10) Diodes D 3 , D 4 , and D o : MBR20200CT Schottky diode 11) Output capacitor C o : 220 F/ 250 V aluminum capacitor

The experimental results at full load P o = 200 W and V in

= 24 V are shown in Fig. 9. Figure 9(a) shows the waveforms v S1 , v S1 , i D1 , and i D2 . The current waveform i D1 equals i D2

because their current path is the same. In addition, i D1 and i D2

indicate that the leakage energy is recycled when S 1 and S 2 are turned off. The reduced loss is approximated 3.4 W. Figure 9(b) shows the waveforms of v D1 , v D1 , and i Lk , and Figure 9(c) shows the waveforms of v C1 , v C2 , i D3 , and i D4. Capacitors C 2 and C 3 are similar to forward converters charging energy in parallel when switches S 1 and S 2 are turned on, and the discharged energy in series is similar to a flyback converter when switches S 1 and S 2 are turned off. Current i D3 is approximately equal to i D4 . Figure 9(d) shows the waveforms of v D3 , v D4 , and i S. The voltage stresses of D 3 and D 4 are approximately equal. The current of secondary winding i S. is equal to i D3 + i D4 when switches S 1 and S 2 are turned on.

Figure 9(e) shows the voltage and current waveforms of v Do

and i Do . The experimental results at P o = 40 W and V in = 24 V are shown in Fig. 10. The voltage waveforms of v S1, v S2, v D1, v D2,

v D1, and v Do have some oscillations caused by the parasitic capacitor C DS1 and C DS2 of the active switches S 1 and S 2 . The primary magnetizing inductance L m and the leakage inductance L k are formed in resonance when i Lm =0. Figure 11 shows the experimental conversion efficiency of the proposed isolated converter. Maximum efficiency is 96.2%, and efficiency is 92.9% at full load. High current on primary side cause higher conduction loss and resistance R T of transformer loss under high power condition. Thus, the efficiency is decreased at high power. Hence, the efficiency decays when the output power increases. The power loss analysis of the proposed converter at full load P o = 200 W and V in = 24 V are shown in Table 1 [33],[34]. The measured efficiency at 92.9 % and the calculated results at 95.52 % are slightly different, because the calculated results are losses of neglect switching, iron, and resistance of circuit traces.

(a)

(b)

(c)

(d)

(e) Fig. 9. Experimental waveforms at P o = 200 W

(a)

(b)

(c)

(d)

(e) Fig. 10. Experimental waveforms at P o = 40 W

Fig. 11. Experimental conversion efficiency of proposed isolated converter Table 1. Power loss analysis of the proposed converter at full load 200W

Components Parameters Loss (W) %

Switches S 1 and S 2 1.9 mΩ 0.58 0.29 Clamping Diodes D 1 and D 2 0.7 V 0.2 0.1 Resistance R T of transformer 28 mΩ 5.24 2.62 Boosting diode D 3 and D 4 0.7 V 2.8 1.4

Output diode D 0 0.7 V 0.7 0.35

Total loss 9.52 4.76

V. C ONCLUSIONS

In this paper, forward and flyback converters are successfully integrated using voltage-lift technique to achieve high voltage gain. Energy stored in the primary leakage inductance during on-time is returned to v in via clamping diodes D 1 and D 2 . This not only improves converter efficiency, it also reduces voltage spike of active switches such that low- voltage stresses and low on-resistance R on switches can be selected. The CCM and DCM operating principle and steady state of voltage gain are analyzed in detail. Finally, a prototype of the proposed converter with input voltage 24 V, output voltage 200 V, output power 200 W, maximum efficiency of 96.2%, and switch voltage spikes lower than 48 V is achieved in the laboratory.

A CKNOWLEDGMENTS

The authors gratefully acknowledge financial support from the National Science Council of Taiwan under project NSC 100-3113-E-006-019-, and from the Bureau of Energy, Ministry of Economic Affairs 100-D0204-2.

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Tsorng-Juu (Peter) Liang (M’93-SM’10) was born in Kaohsiung, Taiwan. He received his B.S. degree in Electrophysics from National Chiao-Tung University, Hsinchu, Taiwan, in 1985. He received his M.S. and Ph.D. degrees in Electrical Engineering from the University of Missouri, Columbia, USA, in 1990 and 1993, respectively.

He is currently a Professor of Electrical Engineering and Director of Green Energy Electronics Research Center (GREERC), National Cheng-Kung University (NCKU), Tainan, Taiwan. Currently, he is the Associate Editor of IEEE Trans. on Power Electronics, the Associate Editor of IEEE Trans. on Circuits and Systems-I, and the Technical Committee Chair of IEEE CAS Systems Power and Energy Circuits and Systems Technical Committee. He is also on the Board of Directors for Compucase Enterprise Co., Ltd, Leadtrend Technology Co., Ltd and Catcher Technology Co., Ltd.

Dr. Liang has authored or coauthored 50 journal and more than 100 conference papers. He was the Director of Electrical Laboratories at NCKU from 2001-2004. In 2008, he received Outstanding Engineer, The Chinese Institute of Electrical Engineering, Kaohsiung Chapter and Outstanding Professor Award, Taiwan Power Electronics Conference. In 2010, he received Teaching Excellence Award, National Cheng Kung University and Outstanding Engineers Professor Award, The Chinese Institute of Electrical Engineering, Kaohsiung Branch. He is a member of the IEEE Societies of power electronics, industrial electronics, circuits and system, and industrial applications. His research interests include high efficiency power converters, high efficiency lighting systems, renewable energy conversion, and power ICs design.

Jian-Hsieng Lee was born in Miaoli, Taiwan, in 1980. He received the B.S. and M.S. degrees in electrical engineering from I-Shou University, Taiwan, in 2003 and 2005, respectively. He is currently pursuing the Ph.D. degree at National Cheng-Kung University, Taiwan. His research interests include high efficiency power converters, renewable energy conversion, electronic ballasts, and high efficiency lighting systems.

Shih-Ming (Orion) Chen was born in Tainan, Taiwan, R.O.C. He received his B.S.

and Ph.D. degree in Electrical Engineering from National Cheng-Kung University, Tainan, Taiwan, in 2003 and 2011, respectively.

From 1991 to 1995, he was employed as a research and design engineer at LUMIN Electronics, Taiwan. From 1995 to 1999, he was employed as a section manager of the engineer department at Delta Electronics, Inc., Taiwan. From 1999 to 2002, he was employed as a manager in charge the Tainan R&D Center at Sino-American Electronic Co., LTD., Taiwan. From 2002, he has worked as a section manager at Product Development of LCD-TV Head Division, CHIMEI Optoelectronics Corp. Since 2009, he has rejoined Delta Electronics as senior manager in the division of LCD display power. Now, he is an assistant professor of Green Energy Electronics Research Center (GEERC) in the Department of Electrical Engineering, National Cheng Kung University. His research interest are DC to DC converters, photovoltaic inverter, switching power supply, uninterrupted power system, CCFL/EEFL inverter design, and LED driver and chromatics control.

Jiann-Fuh Chen (S'79–M'80) was born in Chung-Hua, Taiwan, R.O.C., in 1955. He received his B.S., M.S. and Ph.D. degrees in electrical engineering from NCKU in 1978, 1980 and 1985, respectively.

Since 1980, he has been with the department of Electrical Engineering at NCKU, where he is currently a professor and the director of department of electrical engineering. His research interests are power electronics and energy conversion.

Lung-Sheng Yang was born in Tainan,

Taiwan, in 1967. He received the B.S. degree

in electrical engineering from National

Taiwan Institute of Technology, Taipei,

Taiwan, in 1990, the M.S. degree in electrical

engineering from National Tsing Hua

University, Hsinchu, Taiwan, in 1992, and

the Ph.D. degree in electrical engineering

from National Cheng Kung University,

Tainan, in 2007. Now, he is a assistant

researcher in the Department of Electrical

Engineering, National Cheng Kung

University. His research interests are power

factor correction, dc–dc converters,

renewable energy conversion, and electronic ballast.