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[PDF] Top 20 Reliability of laser-activated low-temperature polycrystalline silicon thin-film transistors

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Reliability of laser-activated low-temperature polycrystalline silicon thin-film transistors

Reliability of laser-activated low-temperature polycrystalline silicon thin-film transistors

... Polycrystalline silicon thin-film transistors 共poly-Si TFTs 兲 are attractive for many applications, such as the switching devices as well as peripheral driving circuits in the active ... See full document

4

Characteristics and stress-induced degradation of laser-activated low temperature polycrystalline silicon thin-film transistors

Characteristics and stress-induced degradation of laser-activated low temperature polycrystalline silicon thin-film transistors

... and reliability of laser-activated polycrystalline silicon thin-film transistors 共poly-Si TFTs兲 under the stress condition of drain voltage (V d ) ⫽12 ... See full document

8

A reliability model for low-temperature polycrystalline silicon thin-film transistors

A reliability model for low-temperature polycrystalline silicon thin-film transistors

... ) of the devices stressed at 100 ◦ C and 25 ◦ C, ...GS of −20 V and variable values of V DS ...the low |V DS | stress condition, the |∆V th | decreases with the increase of the |V DS ... See full document

3

Plasma-induced damage on the performance and reliability of low-temperature polycrystalline silicon thin-film transistors

Plasma-induced damage on the performance and reliability of low-temperature polycrystalline silicon thin-film transistors

... 2006. Polycrystalline silicon thin-film transistors 共poly-Si TFTs兲 are key devices in flat-panel displays 共FPDs兲, such as active-matrix liq- uid crystal displays ...mobility of ... See full document

6

Channel Film Thickness Effect of Low-Temperature Polycrystalline-Silicon Thin-Film Transistors

Channel Film Thickness Effect of Low-Temperature Polycrystalline-Silicon Thin-Film Transistors

... impacts of channel film thickness on LTPS-TFTs have been investigated in this ...channel film thickness have lower S/D series resistance and large grain size of channel film, providing ... See full document

5

Low-temperature and low thermal budget fabrication of polycrystalline silicon thin-film transistors

Low-temperature and low thermal budget fabrication of polycrystalline silicon thin-film transistors

... The ultrahigh vacuum chemical vapor deposition (UHVICVD) grown poly-Si was served as the channel film, the chemical mechanical polishing (CMP) technique was used to polish the channel[r] ... See full document

3

Bias temperature instabilities for low-temperature polycrystalline silicon complementary thin-film transistors

Bias temperature instabilities for low-temperature polycrystalline silicon complementary thin-film transistors

... realization of system on panel 共SOP兲, low-temperature polycrystalline silicon complementary thin- film transistors 共LTPS CTFTs兲 have attracted much research ... See full document

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Low-Temperature Polycrystalline-Silicon Tunneling Thin-Film Transistors With MILC

Low-Temperature Polycrystalline-Silicon Tunneling Thin-Film Transistors With MILC

... (MILC) thin-film transistors (TFTs) exhibit higher on- state current, steeper subthreshold slope, and lower minimum leakage than solid-phase-crystallization ...reduction of defects at grain ... See full document

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Degradation of Low Temperature Polycrystalline Silicon Thin Film Transistors under Negative Bias Temperature Instability Stress with Illumination Effect

Degradation of Low Temperature Polycrystalline Silicon Thin Film Transistors under Negative Bias Temperature Instability Stress with Illumination Effect

... diagram of the device during the darkened NBTI ...generation of dangling bonds from the Si ...oxygen of SiO 2 to form many OH groups bonded to Si atoms and Si dangling ...diagram of the device ... See full document

5

Analysis of negative bias temperature instability in body-tied low-temperature polycrystalline silicon thin-film transistors

Analysis of negative bias temperature instability in body-tied low-temperature polycrystalline silicon thin-film transistors

... ∆N ox and ∆V th . We can conclude that ∆N bulk alone cannot explain the measured ∆V th and that ∆N ox must be taken into account. By expanding the model proposed for bulk-Si MOSFETs [17], we introduce a model to explain ... See full document

3

Plasma damage-enhanced negative bias temperature instability in low-temperature polycrystalline silicon thin-film transistors

Plasma damage-enhanced negative bias temperature instability in low-temperature polycrystalline silicon thin-film transistors

... bias temperature instability (NBTI) be accelerated by plasma damage in low-temperature polycrystalline silicon thin-film tran- sistors (LTPS TFTs) is ...the thin ... See full document

3

Passivation-Induced Subthreshold Kink Effect of Ultrathin-Oxide Low-Temperature Polycrystalline Silicon Thin Film Transistors

Passivation-Induced Subthreshold Kink Effect of Ultrathin-Oxide Low-Temperature Polycrystalline Silicon Thin Film Transistors

... IV. C ONCLUSION In summary, low-temperature (260 ◦ C) ultrathin ECR gate oxide poly-Si TFTs have been fabricated. The ultrathin gate poly-Si TFTs demonstrate good gate controllability in supe- rior ... See full document

3

Application of fluorine doped oxide (SiOF) spacers for improving reliability in low temperature polycrystalline thin film transistors

Application of fluorine doped oxide (SiOF) spacers for improving reliability in low temperature polycrystalline thin film transistors

... Department of Engineering and System Science, National Tsing Hua University, Hsin-Chu, 300, Taiwan, ROC Available online 19 September 2008 Abstract The novel process of self-aligned fluorine doped oxide ... See full document

5

Effects of grain boundaries on performance and hot-carrier reliability of excimer-laser annealed polycrystalline silicon thin film transistors

Effects of grain boundaries on performance and hot-carrier reliability of excimer-laser annealed polycrystalline silicon thin film transistors

... Excimer-laser-annealed polycrystalline silicon thin film transistors 共poly-Si TFTs兲 have been extensively investigated due to their potential for integration into peripheral ... See full document

8

Low-temperature polycrystalline silicon thin-film flash memory with hafnium silicate

Low-temperature polycrystalline silicon thin-film flash memory with hafnium silicate

... rate of memory-window narrowing increases upon increasing P/E cycles, and the one with thick tunnel oxide had more serious memory-window ...important reliability concern for the Flash ...disturbs of ... See full document

6

Study on electrical degradation of p-type low-temperature polycrystalline silicon thin film transistors with C-V measurement analysis

Study on electrical degradation of p-type low-temperature polycrystalline silicon thin film transistors with C-V measurement analysis

... Department of Photonics & Display Institute, National Chiao Tung University, Hsinchu, 300 Taiwan Available online 11 September 2006 Abstract Laser recrystallized low-temperature ... See full document

4

A New Pixel Circuit for Driving Organic Light-Emitting Diode With Low Temperature Polycrystalline Silicon Thin-Film Transistors

A New Pixel Circuit for Driving Organic Light-Emitting Diode With Low Temperature Polycrystalline Silicon Thin-Film Transistors

... member of Industrial Technology Research Institute/Electronics Research & Service Organization and the TFT LCD development as a panel de- ...project of low temperature polycrystalline ... See full document

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Process induced instability and reliability issues in low temperature poly-Si thin film transistors

Process induced instability and reliability issues in low temperature poly-Si thin film transistors

... E XPERIMENTAL N-channel LTPS TFTs with 1.5um LDD structure were fabricated in this study. A 43-nm-thick amorphous-Si layer was deposited on a buffer layer and crystallized by excimer laser annealing. Channel ... See full document

2

Effect of bias stress on mechanically strained low temperature polycrystalline silicon thin film transistor on stainless steel substrate

Effect of bias stress on mechanically strained low temperature polycrystalline silicon thin film transistor on stainless steel substrate

... excimer laser annealing 共ELA兲 with a wave- length of 308 nm and an energy density of 400 mJ /cm 2 ...thick silicon dioxide as gate dielectric was depos- ited by ...dose of 2 ⫻10 15 ions ... See full document

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Polycrystalline silicon thin-film transistors with location-controlled crystal grains fabricated by excimer laser crystallization

Polycrystalline silicon thin-film transistors with location-controlled crystal grains fabricated by excimer laser crystallization

... position-manipulated silicon grains are essential to high-performance and good uniformity ...Institute of Physics. 关DOI: 10.1063/1.2801525兴 Low-temperature polycrystalline ... See full document

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