Measurement Results

In order to validate results of the analysis and design considerations, several PGI circuits with different total number of stages were fabricated in a TSMC 0.35-µm mixed mode process.

To increase the flexibility of the measurements, pump capacitors are connected externally. A 2-stage PGI-3 circuit with different values of Cm was tested under VDD = Vclk = 1.5 V, RL = 100 kΩ, fs = 1 MHz, CO = 330 pF, and C1 = C2 = Cm. Three kinds of the output voltage data are plotted in Fig. 4.21 for the comparison. The first one is obtained from the simulation results of the presented model. The second one is obtained from the measured output voltage for D = 0.5. The last one is also obtained from the measured output voltage but the value of D is calculated from (4.42). The performance data and the corresponding error are summarized in Table 4.2.

Table 4.2 Simulated results of the model and measured results of the 2-stage PGI design.

Fig. 4.21 Measured output voltages of a 2-stage PGI-3 circuit under different values of Cm.

For this typical example, measured output voltages are close to Vo,avg of the model, e.g., for Cm = 100 pF, the mean values of the measured output voltage Vout are 3.65 V and 3.67 V when D = 0.5 and 0.57 calculated from (4.42), respectively, and Vo,avg is 3.75 V when using the model simulation. It can be seen from Table 4.2 that the error voltages in this case are lower than 0.1 V, and all relative errors of the measurement are less than 5 %. The measured output voltage is smaller than the model simulation output voltage Vo,avg, due to additional parasitic capacitors, parasitic resistors, and extra switching losses. Leakage currents of any nature will also cause deviations from the model. In the case of Cm above 150 pF, where Cm/CO is above 0.45, Fig. 4.21 shows that the Vout measured as D is obtained from (4.42) is more accurate than that measured as D = 0.5. However, even though the ratio of Cm/CO is increased, relative errors in the case of D = 0.5 only increase slightly. This agrees with the theoretical result

depicted in Fig. 4.16. Consequently, as these data suggest, even the output voltage of the PGI circuit can be approximately predicted by the formula (4.48) from the deduced model, and accuracy can be increased by choosing an appropriate ratio of Cm/CO.

Further experiments of the 2-stage PGI-3 circuit at D = 0.5 were also taken by changing the ratio of C1 to C2. The measured data are shown in Fig. 4.22. The curves of Vout-to-Kand CTP --to-K give information that K = 1 is the optimum selection to generate a desired DC output voltage. For instance, when Vout = 3.6 V is considered, Fig. 4.22 shows that K = 1 gives the minimum CTP. This observation is in accordance with the prediction of (4.58).

Fig. 4.22 Measured output voltages of a 2-stage PGI-3 circuit with a different ratio of C1 and C2.

4.5 Summary

A complete equivalent model of high efficient charge pumping gain increase circuits with a resistive load and the corresponding thorough analysis are proposed in this chapter. The equations of this average model also have been deduced for design within an acceptable

accuracy tolerance. By using the presented model and equations, the output behavior and the characteristics of PGI circuits can be approximately predicted. Furthermore, the pump capacitances and the switching period can be determined in satisfying the requirement of a desired final output voltage with a ripple ∆Vo. Based on the analysis presented, with a given resistive load and a desired output voltage across it, an optimal number of pump stages and equalized pump capacitors have been proved for the objective of minimum total pump capacitance, which represents minimum chip size.

In addition, the influence of the duty ratio D on the output voltage and the accuracy of the model under general clocks (D = 0.5) have been discussed. The simulation results of the presented model and the SPICE simulations of PGI circuits exhibit satisfactory agreement on transient behavior and the final value of the output voltage. Analysis of the measurement results for an integrated 2-stage PGI-3 circuit with resistive load also has validated the model.

A comparison of data shows that the relative errors are lower than 5 %.

Since the structure of each pump stage model is simple and regular, it is easy to construct the complete model of a multi-stage PGI circuit. The importance of having a model like this is not only because it increases understanding of the output behavior of PGI circuits, but it also helps in the design procedure, giving an initial estimate of the silicon area required for pump capacitors to be used. Furthermore, although the derivation of the model was based on a PGI circuit, it is shown that the same design strategy can also be applied to any other improved charge pump designs that have no voltage drop within the inner stages and the output stage.

Chapter 5

Charge Pump Regulator Design Based on the Proposed Equivalent Model

5.1 Introduction

Conventional charge pump circuits are usually designed to operate at a fixed pump frequency with a rated output voltage without regulation. However, for most charge pump applications, the output load current is often inconstant. The output voltage generated by charge pump circuits has to be quite accurate, independent of the current drawn by the load, process, and environmental variations. Therefore, it is necessary to design a charge pump regulator to guarantee the output voltage level at the different loading.

The proposed average model provides a good substitute for a practical pumping gain increase circuit for mathematical analysis. By using the equivalent model, characterization of pumping gain increase circuits can be performed in a pencil-and-paper manner. Therefore, this model is helpful to plan the control scheme in arithmetic for an embodiment of the regulator based on the pumping gain increase circuit. With an appropriate control scheme, a desired output voltage can be obtained under changing conditions.

In this chapter, a design method of a charge pump regulator based on the proposed equivalent model is presented for battery power applications. A design example of a 2-stage

pumping gain increase circuit with a desired output voltage of 3 V across a resistive load is presented with a battery power of 1.5 V. In section 5.2, basic control concepts of conventional charge pump regulators are described. Section 5.3 gives characterization of the converter consisting of an equivalent model and a voltage controlled oscillator (VCO). A feedback control scheme employing a simple compensator is also described. In section 5.4, time-domain simulations of the model case and of the practical regulator in transistor level are presented for verification. Consequently, according to the design procedure, a charge pump style DC/DC regulator with a simple control scheme can be obtained.