Metal Gate n‐Si
6.2 Analytical Model for double-gate structure
Based on triangular potential approximation, a quantum simulator for planar bulk structure has been established and its validity has been proved by excellent gate current reproduction in previous chapters. However, FinFET devices usually have an ultra-thin body structure for the purpose of eliminating SCE and DIBL. The conventional subband energy calculation and estimation of depletion charge density have to be modified. Furthermore, due to the ultra-thin body structure of FinFET, a simulator based on double-gate structure was adopted to characterize and fit the experimental tunneling leakage current of FinFET. The details of the simulator framework for double-gate structure are described as below.
Ultra-narrow double-gate structure induces additional confinement that we call structure confinement. Combining the effects of structure confinement with the field confinement, the subband energy estimation in double-gate structure can read as [6.5],[6.6]: where E(j,i) represents the energy of the j-th subband in the i-th valence band; mzhi is the out-of-plane effective mass associated with the i-th valence band; Fs is the silicon surface electric field strength; and tbody is the distance between two controlled gate stacks. The first term in right hand side is responsible for evaluating field confinement effect. Based on triangular potential approximation, the is theoretically estimated at 2/3 but it is used as fitting factor in this work. However, the values of that we
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obtained are all close to theoretical value (2/3) even for different subband, as will be shown below. The second term in right hand side is responsible for evaluating structure confinement effect. Those two terms on right hand side of (6.1) are calculated for tbody = 10 nm and tbody = 20 nm, as shown in Fig. 6.1. In Fig. 6.1, we find that the structure confinement dominates at small gate bias for tbody = 10 nm.
The depletion activity is restricted to the small number of dopant in ultra thin double-gate structure. Two depletion conditions, partial and full depletion, are considered in calculation:
2 ( )
2 2
Full
sub body Depletion sub body
Si sub depl depl
Si sub depl depl Si sub depl
If q N Vg qN t Q q N Vg (6.3) where Qdepl is depletion charge density; Nsub is substrate doping concentration; and
depl(Vg) is potential band bending across depletion region versus gate voltage bias.
Equation (6.2) presents full depletion condition, which shows that half of dopants in substrate are totally depleted. Equation (6.3) presents partial depletion condition.
Deletion charge density calculations for different tbody and Nsub are shown in Fig. 6.2.
For Nsub = 1μ1018 cm-3, partial deletion condition only occurs at tbody = 50 nm. For Nsub = 2μ1018 cm-3, partial deletion appears on smaller body thickness (tbody = 40 nm) at small gate bias range.
To verify our analytical model for double-gate structure, we comprehensively compare and fit the numerical results [6.7] with analytical ones. With adjusting factor in (6.1), the analytical model shows good reproduction of numerically calculated subband energies for (110) surface from tbody = 10 nm to 50 nm, as shown in Fig. 6.3. The corresponding fitting factors are labeled in Figures. The surface potential and surface electric field calculated by numerical method are reproduced by analytical model as well, as shown in Fig. 6.4. The independence of on process
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parameters for getting good reproduction of numerical subband energy is shown in Fig. 6.5 and this result confirms that the compact model is reliable once the for particular tbody has been determined. Finally, gate tunneling current calculated with numerical method matches that calculated with analytical method, as shown in Fig.
6.6. Hence, the validity of analytical model for double structure is proved.
Best fitting values of for different tbody are collected in Fig. 6.7. We find that the values of have linear relation with tbody between 10 nm and 50 nm. The corresponding linear fitting equations are also shown in Fig. 6.7. The gate current change of tunneling current calculated with the obtained by linear fitting equation with respect to that calculated with best fitting values of versus tbody is plotted in Fig.
6.8. Small discrepancy of gate current change between tbody = 10 nm and 50 nm is obtained. Hence, with introducing the linear fitting equation of in calculation, our analytical model not only works well for different process parameters but also performs well for different tbody. For extensive discussion, the values of for (001) surface are collected as well, as shown in Fig. 6.9. Linear relations of with tobdy
between tbody = 10 nm and tbody = 50 nm are still observed for (001) surface.
Additionally, a possible mechanism that a strong interaction of the carriers is controlled by two different gates may cause the linear equation of breakdown as tbody scales from 10 nm to 5 nm, as shown in Fig. 6.7 and 6.9. Hence, the compact model needs more investigation as tbody is smaller than 10 nm.
6.3 Experimental and Fitting
N-type FinFETs with 0.8-nm EOT HfO2 based high-/metal-gate on (001) wafer were used for this work. The n-FinFET structure is schematically shown in Fig. 6.10.
Gate material parameters are labeled in Fig. 6.11 in terms of the abrupt energy band diagram in flat-band condition. Due to the small ratio of top gate width to fin height,
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the FinFET under study can approximately reduce to a double-gate structure.Through Cg-Vg fitting technique, as shown in Fig. 6.12, we obtained effective oxide thickness (EOT) of 0.8 nm, metal-gate work function m of 4.6 eV and p-type body doping concentration of 1μ1018 cm-3. The permittivity of HfO2 (k) is estimated at 22 0 [6.8]
and to meet EOT = 0.8 nm, the permittivity of IL (IL) is determined to be 6.6 0. Corresponding band offset of IL (IL) to silicon conduction band is therefore 2.44 eV [6.9].
As shown in Fig. 6.13, the temperature dependence of experimental Ig of FinFET devices is weak, indicating that direct/F-N tunneling mechanism dominates the gate current. Following the guidelines [6.3], both Ig-Vg and dlnIg/dVg fittings were conducted as demonstrated in Fig. 6.14, valid only for Vg > 1 V. This leads to k = 1.1 eV, mk* = 0.02 mo, and mIL* = 1.22 mo. Note that a serious deviation occurs at high Vg. Thus, we further took into account a transition (intermixing) layer between high- and IL. The experiments in the open literatures [6.10],[6.11] in terms of the TEM analysis, as shown Fig. 6.15, can support this. The refitting results are shown in Fig.
6.16. Obviously, fitting quality can be improved with the transition layer included, especially for the parabolic one. In this case, the permittivity, band offsets, and tunneling effective masses of transition layer vary in linear or parabolic type, as schematically plotted in the inset of Fig. 6.16. For the first time, the combination of Cg-Vg, Ig-Vg and dlnIg/dVg-Vg fittings can thereby serve as corroborating evidence for the existence of the transition layer. Note that the extracted values of k and mk* were kept unchanged in extra fitting. The reasons are that the height of dlnIg/dVg peak and its Vg position are most sensitive to mk* and k, respectively, according to fitting guidelines [6.3].
Here we want to stress that in the presence of transition layer, the conventional approach with no dlnIg/dVg fitting leads to poor reproduction as shown in Fig. 6.17.
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The corresponding material parameters are therefore incorrect. Thus, the tunneling effective masses in hafnium dioxide and hafnium silicate in the literature [6.4],[6.8],[6.12]-[6.17], which were obtained using the conventional method only, were all overestimated. As depicted in Fig. 6.18, the correct tunneling effective masses, due to the incorporation of dlnIg/dVg fitting, should lie at around 0.02 mo, the minimum value to date.
The model suitable for double gate structure for calculating electron tunneling current from IL/Si interface states has been constructed and the picture of this mechanism is shown in Fig. 6.19. Calculated Jinterface reproduces the gate leakage of FinFET at low gate voltage bias even without considering the transition layer in high- stacks, as shown in Fig. 6.20. Summation of calculated direct tunneling current from inversion layer and interface states in the presence of a linear/parabolic gradual transition layer in high- gate stacks is shown in Fig. 6.21. Excellent reproduction of electron gate tunneling leakage versus Vg in a wide range of six decades for FinFET devices is obtained, especially for the case of parabolic transition layer included in model.
Using (3.7) and (3.8), the experimental substrate current due to valence band electron tunneling can be calculated, as shown by a red line in Fig. 6.24. However, the turn-on voltage of simulated valence band electron tunneling current is much larger than that of experimental data. One idea is used to explain the deviation between experimental Ib and simulated result. As schematically shown in Fig. 6.25, we assume that an energy region called window sitting above valence band edge allows extra valence electron tunneling through gate stacks. With Window = 0.21 eV, the fitting quality can be improved, as shown as blue line in Fig. 6.24. Hence, based on good fitting result under the assumption of extra electron tunneling current from the region in forbidden band gap close to valence band edge, we suggest that the interface
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quality of gate stack around valence band edge is poor.
6.4 Extra Evidence
Further, C-V curve fitting for planar devices on the same wafer was performed, as shown in Fig. 22. The discrepancy from experimental data is due to large leakage current for large area of planar test device used. However, the fitting can still be performed near the turning point of C-V curve (around Vg = 1 V) in Fig. 6.22 while keeping the same EOT and m as the FinFET devices under the same process flow of gate stacks. The resulting Nsub is slightly increased relative to FinFET one.
Without changing the material parameters k, mk*, and mIL* obtained in Fig. 6.16 (b), experimental gate tunneling current from planar devices is well modeled, as shown in Fig. 6.23. This further confirms the validity of our proposed fitting approach.
To hold the same mIL* for the fitting of planar devices, the tIL must slightly change from 0.59 nm to 0.54 nm. This points out the fact that the oxidation rate on (001) surface is slightly slower than that of (110) surface even in ultrathin oxide or oxynitride.
6.5 Conclusion
A compact analytical model for double-gate structure has been established. Due to small ratio of top gate width to Fin-height for our FinFET test samples, we find that I-V and C-V characteristics of FinFET device can be described by a simulator based on doubel-gate structure. This simulator in combination with analytical model for double-gate structure has been verified experimentally in this work.
Combination of Cg-Vg, Ig-Vg, and dlnIg/dVg-Vg curve fittings has been established. The merits of determining gate material parameters in high-/metal-gate FinFETs, more accurately and in greater detail, have been justified. The results
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obtained may provide relevant information for the manufacturing process analysis and device physics oriented study. Furthermore, we have argued that the physical origin of gate leakage current at low gate bias is attributed to electron tunneling from IL/Si interface states to metal electrode.
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0.0 0.5 1.0 1.5 2.0 2.5 3.0 0
50 100 150 200 250 300 350 400 450
Subband Energy (meV)
Vg (V) E(2,1)
tbody = 10nm tbody = 20nm
EOT = 0.84 nm
Field Confinement Structure Confinement (110) Surface
Fig. 6.1 Calculated subband energy associated with field confinement (line) and structure confinement (line+symbol) versus Vg for tbody = 10 nm and tbody = 20 nm.
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Fig. 6.2(a) Calculated depletion charge density versus Vg for Nsub = 1μ1018 cm-3 and different tbody.
Fig. 6.2(b) Calculated depletion charge density versus Vg for Nsub = 2μ1018 cm-3 and different tbody.
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2-fold(j=1, j=2) = (0.6715,0.682)
4-fold(j=1, j=2) = (0.67,0.68) tbody = 10nm
(110) Surface
Line+Symbol : Numerical Result (Schred) E(1,1) E(2,1)
E(1,2) E(2,2)
Line : Analytical Model (This Work) E(1,1) E(2,1)
Line + Symbol : Numerical Result (Schred) E(1,1) E(2,1)
E(1,2) E(2,2)
Line : Analytical Model (This Work) E(1,1) E(2,1)
E(1,2) E(2,2)
EOT = 0.84 nm Nsub = 1x1018 cm-3
m= 4.6 eV
2-fold(j=1, j=2) = (0.6709,0.6802)
4-fold (j=1,j=2) = (0.6694,0.6782)
Subband Energy (meV)
Vg (V)
(b)
Fig. 6.3 (a) Comparison of numerically calculated subband energies (line + symbol) versus Vg with analytical ones (line) for tbody = 10 nm. Other parameters and fitting factor used in calculation are labeled in figure.
Fig. 6.3 (b) Comparison of numerically calculated subband energies (line + symbol) versus Vg with analytical ones (line) for tbody = 20 nm. Other parameters and fitting factor used in calculation are labeled in figure.
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2-fold(j=1, j=2) = (0.6703,0.679)
4-fold(j=1, j=2) = (0.6688,0.6776) tbody = 30nm
Line + Symbol : Numerical Simulation (Schred) E(1,1) E(2,1)
E(1,2) E(2,2)
Line : Analytical Model (This Work) E(1,1) E(2,1)
2-fold(j=1, j=2) = (0.6697,0.6784)
4-fold(j=1, j=2) = (0.6685,0.677) tbody = 40 nm
Line + Symbol : Numerical Simulation (Schred) E(1,1) E(2,1)
E(1,2) E(2,2)
Line : Analytical Model (This Work) E(1,1) E(2,1)
E(1,2) E(2,2)
Subband Energy (meV)
Vg (V)
(d)
Fig. 6.3 (c) Comparison of numerically calculated subband energies (line + symbol) versus Vg with analytical ones (line) for tbody = 30 nm. Other parameters and fitting factor used in calculation are labeled in figure.
Fig. 6.3 (d) Comparison of numerically calculated subband energies (line + symbol) versus Vg with analytical ones (line) for tbody = 40 nm. Other parameters and fitting factor used in calculation are labeled in figure.
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0.0 0.5 1.0 1.5 2.0 2.5
0 200 400 600 800
(110) Surface
EOT = 0.84 nm N
sub = 1x1018 cm-3
m= 4.6 eV
2-fold(j=1, j=2) = (0.6694,0.6781)
4-fold(j=1, j=2) = (0.6682,0.6767) tbody = 50 nm
Line + Symbol : Numerical Result (Schred) E(1,1) E(2,1)
E(1,2) E(2,2)
Line : Analytical Model (This Work) E(1,1) E(2,1)
E(1,2) E(2,2)
Subband Energy (meV)
Vg (V) (e)
Fig. 6.3 (e) Comparison of numerically calculated subband energies (line + symbol) versus Vg with analytical ones (line) for tbody = 50 nm. Other parameters and fitting factor used in calculation are labeled in figure.
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1.8 Numerical Result (Schred) Analytical Model (This Work)
EOT = 0.84 nm N
sub = 1x1018cm-3
m = 4.6 eV
2-fold(j=1, j=2) = (0.6715,0.682)
4-fold(j=1, j=2) = (0.67,0.68)
2-fold(j=1, j=2) = (0.6715,0.682)
4-fold(j=1, j=2) = (0.67,0.68)
Surface Electric Field (X105 V/cm) Numerical Result (Schred)
Analytical Model (This Work)
tbody = 10nm
(b)
Fig. 6.4 (a) Comparison of numerically calculated surface potential bending (line + symbol) versus Vg with analytical ones (line). Parameters and fitting factor used in calculation are labeled in figure.
Fig. 6.4 (b) Comparison of numerically calculated surface electric field (line + symbol) versus Vg with analytical ones (line). Parameters and fitting factor used in calculation are labeled in figure.
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0.0 0.5 1.0 1.5 2.0 2.5
0 200 400 600 800
(110) Surface
EOT = 1.21 nm Nsub = 6x1017cm-3
m= 4.4 eV
2-fold(j=1, j=2) = [0.6715,0.682]
4-fold(j=1, j=2) = [0.67,0.68]
tbody = 10nm
Subband Energy (meV)
Vg (V)
Line + Symbol : Numerical Result (Schred) E(1,1) E(2,1)
E(1,2) E(2,2)
Line : Analytical Model (This Work) E(1,1) E(2,1)
E(1,2) E(2,2)
Fig. 6.5 Comparison of numerically calculated subband energies (line + symbol) versus Vg with analytical ones (line) for tbody = 10 nm. The material parameters used here are different from those used in Fig. 6.3 but the best fitting values of hold the same with that used in Fig. 6.3.
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0.0 0.5 1.0 1.5 2.0 2.5
10-12 10-10 10-8 10-6 10-4 10-2 100 102 104 106
(110) Surface tbody = 10 nm
EOT=0.84 nm Nsub=1x1018cm-3
m=4.6 eV
Gate Current (A/ c m
2)
Vg (V)
Numerical Result (Schred) Analytical Model (This Work)
Fig. 6.6 Comparison of numerically calculated gate tunneling current with analytical one versus Vg.
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0 10 20 30 40 50
0.665 0.670 0.675 0.680 0.685 0.690 0.695 0.700
=0.670334.5x10-5xtbody
=0.680247.8x10-5xtbody
=0.682429.6x10-5xtbody
Fitting Factor(jth subband
, i
th valley)tbody (nm)
(1,1) (2,1)
(1,2) (2,2) Symbol : Best Fitting
Line : Linear Fitting of
EOT = 0.84 nm Nsub = 1x1018cm-3
m= 4.6 eV (110) Surface
=0.671985.4x10-5xtbody
Fig. 6.7 for best subband fitting versus tbody for (110) surface. Linear fittings of the
are shown as lines and the fitting equations are labeled as well.
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0 10 20 30 40 50
-11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2
(110) Surface EOT = 0.84 nm Nsub = 1x1018 cm-3
m= 4.6 eV
(Ig( Linear Fit)-Ig( Best Fit))/Ig( Best Fit) (%)
tbody (nm) Vg = 1.6V
Fig. 6.8 Gate tunneling current change of gate tunneling current calculated with the linear fitting with respect to that calculated with best fitting versus tbody.
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0 10 20 30 40 50
0.665 0.670 0.675 0.680 0.685 0.690 0.695 0.700
tbody (nm) Fitting Factor (jth subband
, i
th valley)=0.669
=0.678993.5x10-5xtbody
=0.673823.6x10-5xtbody
=0.683595.9x10-5xtbody EOT = 0.84 nm Nsub = 1x1018cm-3
m= 4.6 eV (001) Surface
(1,1) (2,1)
(1,2) (2,2) Symbol : Best Fitting
Line : Linear Fitting of
Fig. 6.9 for best subband fitting versus tbody for (001) surface. Linear fittings of the
are shown as lines and the fitting equations are labeled as well.
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Fig. 6.10 Schematic cross-sectional view of FinFET device used in this work.
STI STI
Drain
Source
Metal Gate High‐ Gate
Dielectric
L W
masktbody Fin Height
STI STI
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Fig. 6.11 Schematic of the abrupt energy band diagram of a metal-gate/high-/interfacial layer(IL)/Si system. The material parameters involved in this work are labeled.
Metal Gate
p‐Si
High‐ IL
E
fVacuum Level
t
kt
IL
m
k
IL
s
IL
k
ILk
*
m m
IL*
kt
body/2
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0.0 0.3 0.6 0.9 1.2
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Capaci ta nce (
F/cm
2)
metal/high-/IL/p-Si EOT = 0.8 nm
m = 4.6 eV Nsub = 1x1018 cm-3
Vg (V)
Measured from FinFET Device Fitting (Schred DG)
Fig. 6.12 Experimental Cg data (symbols) and fitting result for double-gate structure (line) versus Vg for n-type FinFETs. The extracted process parameters are EOT = 0.8 nm, m = 4.6 eV, and Nsub = 1μ1018 cm-3.
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