Fitting with Transition Layer

Even with the best fittings as shown in Fig. 4.4, a discrepancy is noticeable, especially in high Vg region. This is the case of a system of two abrupt barriers (one of high- and one of IL; see the Fig. 4.3). Additionally, the simulated results in previous chapter (Fig. 3.4) show that no model parameters can effectively adjust the curvature of dlnIg/dVg-Vg at a gate bias range behind the peak position. Thus, we change the structure of the high- gate stacks by taking into account a gradual transition (intermixing) layer between HfO2 and SiON in the calculation. To make a fair comparison, refitting was performed with a transition layer between high- and IL.

Here, the involved parameters within the transition layer, including permittivity, band offsets, and tunneling effective masses, all varied in a gradual way in terms of a linear and a parabolic distribution, as schematically plotted in Fig. 4.5. In doing so, the transition layer was equally divided into many abrupt-type barriers. The corresponding EOT becomes

where ox is the permittivity of SiO2; tmix is the physical thickness of transition layer; N is the total number of abrupt barriers in transition layer; and mix(n) is the permittivity of n-th abrupt barrier.

The refitting results are shown in Fig. 4.6. Obviously, fitting quality can be improved with the transition layer included, especially for the parabolic one. This can thereby serve as corroborating evidence for the existence of the gradual transition layer. The TEM analysis, as shown in Fig. 7 (a), can support this. Extracted material

63

parameters are k = 1 eV, mk* = 0.03 mo, mIL* = 0.75 mo, tk = 0.3 nm, tmix = 1.41 nm, and tIL = 0.5 nm for linear-type transition layer; and k = 1 eV, mk* = 0.03 mo, mIL* = 1.46 mo, tk = 0.2 nm, tmix = 1.33 nm, and t_IL = 0.4 nm for parabolic one. Note that the EOT is maintained at 0.75 nm in the way. In a sense, the total physical thickness is 1.93 nm (the parabolic case, for instance), less than that (2.3 nm) without the transition layer. In other words, if the total physical thickness were the same between each other, then the EOT with the transition layer included would be larger than that with no transition layer. This is consistent with recent experiments [4.4]. Once again, extracted mk* remains intact. This dictates some unexplained physical mechanisms, which not only are common to both HfO2 and HfSiON but also are responsible for unconventionally low effective mass in tunneling.

Extra fitting was performed on 1.4-nm EOT TaC/HfSiON/SiON nMOSFETs [4.2]

but with the transition layer taken into account. However, this only led to a poor fitting as shown in Fig. 4.8, meaning that the transition layer essentially does not exist in HfSiON/SiON stack. The corresponding evidence in terms of TEM picture is shown in Fig. 7 (b). This is in agreement with the recent claims from the industry [4.6]: (i) a gate dielectric with a graded dielectric constant is produced between silicon oxynitride layer and high- layer; and (ii) HfSiON-like materials were not included in the list of high- dielectrics associated with the graded layer. Thus, we argue, through this fitting work, that a certain reaction, due to the thermal treatment in the manufacturing process, is active between HfO2 and SiON whereas for HfSiON/SiON stack, it is unlikely to occur.

Unfortunately, TEM analysis cannot precisely determine the thickness of transition layer due to its limited resolution. To further realize how the transition layer affects the gate tunneling current, three shapes of parabolic transition layer between high- layer and IL are considered, as schematically shown in Fig. 4.9. Case I

64

condition is that a transition layer penetrates both high- layer and IL and its simulated results have been shown in Fig. 4.6 (b). Case II condition is that transition layer mainly penetrates IL. Case III condition is that transition layer mainly penetrates high- layer. The refitting results corresponding to the three cases are shown in Fig.

4.10, which appear to be excellent, regardless of which case is chosen for parabolic transition layer in high- stacks. Extracted material parameters are k = 1 eV, mk* = 0.03 mo, mIL* = 1.46 mo, tk = 0.2 nm, tmix = 1.33 nm, and tIL = 0.4 nm for Case I; k = 1 eV, mk* = 0.02 mo, mIL* = 1.9 mo, tk = 1 nm, tmix = 0.95 nm, and tIL = 0.4 nm for Case II; and k = 1 eV, mk* = 0.07 mo, mIL* = 1.11 mo, tk = 0.2 nm, tmix = 0.88 nm, and tIL = 0.7 nm for Case III. The k is unchanged and mk* are still the smallest extracted value to date for three cases.

Based on the equation (3.6) and the description of the tunneling mechanism in Fig.

4.11, the Jinterface can be estimated. Combining direct tunneling current from inversion layer with Jinterface without considering transition layer, refitting work of experimental gate leakage was performed, as shown in Fig. 4.12. The gate leakage data at a gate voltage range of 0.4-0.8 V support the calculated Jinterface, as shown in Fig. 4.12. The same works with additional Jinterface in the presence of a gradual linear/parabolic transition layer between high- layer and IL were performed as well, as shown in Fig.

4.13 and Fig. 4.14. Perfect reproduction of gate leakage at a gate bias range of 0.4-2.4 V was achieved, especially for the case of parabolic transition layer included in the model.

4.4 Conclusion

We have performed dlnIg/dVg curve fitting on TiN/HfO2/SiON samples. Several important arguments have therefore been drawn. First, there should be some unexplained physical mechanisms, which not only are common to both HfO2 and

65

HfSiON but also are responsible for unconventionally low effective mass in tunneling.

Second, a certain reaction, due to the thermal treatment in the manufacturing process, prevails in HfO2/SiON stack while for HfSiON/SiON case, it is unlikely to occur.

Third, by incorporating the Jinterface in model, the gate leakage at low gate bias range can be adequately explained.

66 Measured Data

Schrodinger-Poisson Solver

0.0 0.5 1.0

0.0 0.5 1.0 1.5 2.0 2.5 3.0

3.5

TiN/HfO₂/SiON/p-Si

_metal = 4.5 eV N_sub = 8x10¹⁷ cm^-3 EOT = 0.75 nm

Capacitance (

F/cm

)

Vg (V)

Fig. 4.1 Experimental (symbol) and simulated (line) Cg versus Vg for TiN/HfO2/SiON gate stacks n-MOSFET. The extrated parameters are: effective oxide thickness EOT = 0.75 nm; substrate doping concentration Nsub = 8μ10¹⁷ cm^-3; metal-gate workfunction

m = 4.5 eV.

67

0.0 0.5 1.0 1.5 2.0 2.5

10

10

10

10

10

Solid Symbols: Experiment at T = 300 K Open Symbols: Experiment at T = 343 K TiN/HfO

2/IL/p-Si W/L = 0.24/1 m

S & D & B tied to ground

Electron Gate Current (A)

V

(V)

Fig. 4.2 Experimental gate current versus gate voltage data, measured from different positions on wafer, for two temperatures.

68

Fig. 4.3 Schematic of the abrupt energy band diagram of a metal-gate/high-/IL/Si system for NMOS. The symbols serve as model parameters in calculation.

p‐Si Metal Gate

High‐k IL

E_f