Comparison with Planar MOSFETs with High-κ Dielectrics

Gate oxide scaling has become as the key in scaling silicon CMOS technology. The metal gate and high-κ dielectric are very attractive to maintain low gate leakage and control short channel effects [27,63]. This subsection discusses and compares the dependency of

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Chapter 4 : Random-Dopant-Induced Characteristics Fluctuation in Vertical-Channel Devices process-variation-effect and random-dopant-induced V_th fluctuation on 16-nm-gate planar MOSFETs and bulk FinFETs. The threshold voltage fluctuation for the planar MOSFETs with equivalent oxide thicknesses from 1.2 nm to 0.2 nm (e.g., SiO2 for the 1.2 and 0.8 nm EOTs, Al₂O₃ for the 0.4 nm EOT and HfO₂ for the 0.2 nm EOT) are compared with the results of bulk FinFETs.

Figure 4.11: The gate capacitance as a function of the EOT, where the solid line shows the planar MOSFETs with various EOT and the square symbol indicates the bulk FinFET device with 1.2 nm EOT.

Gate capacitance is one of the most important indexes for channel controllability. Fig-ure 4.11 plots the gate capacitance as a function of the EOT, where the solid line shows

4.1 : Bulk Fin-Type Field Effect Transistors 95

Figure 4.12: The process-variation-induced threshold voltage fluctuation for the studied devices.

the planar MOSFETs with various EOT and the square symbol indicates the bulk FinFET device with 1.2-nm EOT. The planar MOSFET with 0.4-nm EOT, where Al₂O₃ is used for gate dielectric, exhibits a similar gate capacitance with the bulk FinFET device with 1.2-nm EOT because the gate size of the explore bulk FinFETs is about three times larger than the planar MOSFETs. Since the process variation is resulted from the enhancement of the short channel effect, the bulk FinFETs with 1.2-nm EOT is expected to have similar immu-nity against process-variation induced fluctuation with the planar MOSFETs with 0.4-nm EOT. The σV_th,Lg/LER of the planar MOSFETs and bulk FinFETs presented in Fig. 4.12

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Chapter 4 : Random-Dopant-Induced Characteristics Fluctuation in Vertical-Channel Devices

Figure 4.13: The threshold voltage roll-off of the studied devices, where the variation follows the projection of ITRS 2005 roadmap. These results are used to estimate the V_th

fluctuation resulting from the gate-length deviation and the line-edge roughness.

confirmed this viewpoint, in which the V_th roll-off characteristics in Figure 4.13 are used for the σV_th,Lg/LER estimation. The bulk FinFET device with 1.2 nm EOT exhibits a sim-ilar immunity against process-variation-induced fluctuation with the planar MOSFET with 0.4-nm EOT. However, the trend still is not valid in the random-dopant-induced fluctuation.

Figure 4.14 shows the random-dopant-induced V_th fluctuation, σV_th,RD, of the studied devices. The σV_th,RD decreases significantly as the EOT is scaled down. However, the

4.1 : Bulk Fin-Type Field Effect Transistors 97

Figure 4.14: The random-dopant-induced threshold voltage fluctuation for the studied devices.

expectation between gate capacitance and σV_th,RDis invalid. The σV_th,RDof bulk FinFETs approximates the planar MOSFETs with 0.2-nm EOT. To further investigate the mecha-nism of bulk FinFETs in fluctuation suppression, the potential distributions (VG= 1 V VD= 0 V) extracted 1 nm below the top gate of channel are examined. Figure 4.15(a) shows the dopant distribution and Figs. 4.15(b) - 4.15(f) are the explored devices with various EOT.

The potential barriers are induced by the corresponding dopants at positions: A, B, and C, respectively, as shown in Fig. 4.15(a). The potential barrier is largest at C because two discrete dopants are located close to each other there. For planar MOSFETs with various

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Chapter 4 : Random-Dopant-Induced Characteristics Fluctuation in Vertical-Channel Devices

Figure 4.15: Top-gate potential contours of the planar MOSFETs with various EOT ((b) EOT = 1.2 nm, (c) EOT = 0.8 nm, (d) EOT = 0.4 nm, (e) EOT = 0.2 nm) and (f) bulk FinFETs with 1.2 nm EOT. The distributions of potential barriers are induced by the corresponding dopants location (i.e., A, B and C). The corresponding distribution of discrete dopants is shown in (a) and all the plots are extracted 1 nm below the gate oxide.

4.1 : Bulk Fin-Type Field Effect Transistors 99

Figure 4.16: Lateral-gate off-state potential contours for the studied planar MOSFET and bulk FinFET devices, where (b) and (c) show the nominal (continuously doped) and discrete dopant fluctuated cases of bulk FinFETs. The nominal and discrete dopant fluctuated cases of planar MOSFETs with different EOTs are shown in (d)-(h).

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Chapter 4 : Random-Dopant-Induced Characteristics Fluctuation in Vertical-Channel Devices EOTs, the sizes of the potential barriers are suppressed as the equivalent gate oxide thick-ness is reduced. The results for planar MOSFETs, as displayed in Figs. 4.15(b) - 4.15(e) are then compared with that of a bulk FinFET device, as shown in Fig. 4.15(f), indicat-ing that the potential barriers of bulk FinFET are smaller than those of planar MOSFETs, especially at position A. The potential barrier induced by corresponding dopant in A is significantly reduced in bulk FinFET device because of the strong electric field around the corner to suppress the potential barrier induced by dopants. The strengthen electric field is owing to the changed gate structure, which causes the different suppression mechanisms between the planar MOSFETs and bulk FinFETs. Figure 4.16 shows the lateral side poten-tial distributions of the studied devices, in which Fig. 4.16(a) plots the dopant distribution.

Figures 4.16(b) and 4.16(c) show the potential contours of the nominal (continuous chan-nel doping concentration: 1.48×10¹⁸ cm⁻³)) and discrete dopant fluctuated cases of bulk FinFETs with 1.2 nm EOT. Figures 78(d)-78(h) show the nominal and discrete dopant fluc-tuated cases of planar MOSFETs with EOT scaling. The potential fluctuation is mitigated as the equivalent gate oxide thickness is scaled down, as shown in Figs. 4.16(f) - 4.16(h).

For the discrete-dopant-fluctuated bulk FinFET device in Fig. 4.16(c), although the poten-tial distribution is disturbed by a dopant that is located on lateral side of the channel, the overall potential distribution in the case of fluctuation is still quite similar to that in the

4.1 : Bulk Fin-Type Field Effect Transistors 101

nominal case. However, for MOSFETs in Fig. 4.16(e), due to the lack of lateral gate struc-ture, the potential fluctuation is still significant. This result reconfirms the effect of the lateral gate in bulk FinFET devices in suppressing potential fluctuations.

Figure 4.17 plots the top and lateral views of the on-state current density (V_G = 1V;

VD = 1V) of planar and bulk FinFET devices with 1.2 nm EOT. All cross-sectional plots are from 1 nm below the top and lateral side of channel surface. The top views of the channel, as presented in Figs. 4.17(b) and 4.17(e), reveal that bulk FinFET device provides a larger and more uniform current distribution than the planar MOSFET due to the smaller fluctuation of potential. The lateral views of channel, Figs. 4.17(c) and 4.17(d), show that the current conducting paths of planar MOSFETs are easily disturbed by discrete dopants.

However, in the bulk FinFETs, Figs. 4.17(f) and 4.17(g), even current conducting paths are retarded in parts of channel surface; the tri-gate structure of bulk FinFETs provides more alternative conducting paths that prevent a significant fluctuation of conduction current.

Thus, benefiting from the superiority of the vertical channel structure, the bulk FinFET device suppresses potential fluctuations and maintains a more stable conduction current than the planar MOSFET. Figure 4.18 plots the on-/off- state current characteristics of the studied devices. For devices with similar on-state current, the maximum difference of off-state current is declined from approximately 2000 nA/um to 800 nA/um as the EOT is scaled from 1.2 nm to 0.2 nm. Comparing the results for planar MOSFETs with those of

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Chapter 4 : Random-Dopant-Induced Characteristics Fluctuation in Vertical-Channel Devices

Figure 4.17: Cross-sectional views of on-state current density distribution in channel of device, where (b), (c), and (d) show the planar MOSFET device and (e), (f), and (g) show the bulk FinFET device. The corresponding distribution of discrete dopants is shown in (a) and all the cross-section plots are extracted 1 nm below the channel surface.

4.1 : Bulk Fin-Type Field Effect Transistors 103

Figure 4.18: Ion-Iof f current characteristics of the studied 16-nm-gate planar MOSFET and bulk FinFET devices.

bulk FinFETs, even though the planar device with 0.4-nm and 0.2-nm EOTs has a better on-off state characteristic, the bulk FinFET device exhibits a smaller current fluctuation (about 600 nA/um). The bulk FinFET device can provide a more uniform potential distribution and a more stable current flow than that of the planar MOSFET. The additional structural improvement of bulk FinFET devices enhances the immunity of device against random-dopant-induced fluctuation, which cannot be evaluated from the trend of gate capacitance.

The process-variation-effect and random-dopant-fluctuation induced V_th fluctuations are summarized in Table 4.3 and Figs. 4.19. The random dopant effect is the dominating factor

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Figure 4.19: Total threshold voltage fluctuation for the studied devices.

in this scenario. The planar MOSFETs with 0.2-nm EOT and the bulk FinFETs possess the best fluctuation immunity. The Vthfluctuations are suppressed with the gate oxide thickness scaling. However, the immunity of the planar MOSFETs suffers from nature of structural limitations and the use of vertical channel transistors can alleviate this problem.