Five-element circuit model using linear-regression method to correct the admittance
measurement of metal-oxide-semiconductor capacitor
Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Jun-Cheng Liu, Yi-Cheng Chen, Yao-Feng Chang, Shin-Yuan Wang, Chi-Chung Kei, Chien-Nan Hsiao, and Chun-Yen Chang
Citation: Journal of Vacuum Science & Technology B 27, 130 (2009); doi: 10.1116/1.3058724 View online: http://dx.doi.org/10.1116/1.3058724
View Table of Contents: http://scitation.aip.org/content/avs/journal/jvstb/27/1?ver=pdfcov
Published by the AVS: Science & Technology of Materials, Interfaces, and Processing
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the admittance measurement of metal-oxide-semiconductor capacitor
Chao-Ching Cheng
Institute of Electronics, National Chiao-Tung University, Hsinchu, Taiwan 300, Republic of China Chao-Hsin Chien
Institute of Electronics, National Chiao-Tung University, Hsinchu, Taiwan 300, Republic of China and National Nano Device Laboratory, Hsinchu, Taiwan 300, Republic of China
Guang-Li Luo
National Nano Device Laboratory, Hsinchu, Taiwan 300, Republic of China
Jun-Cheng Liu, Yi-Cheng Chen, Yao-Feng Chang, and Shin-Yuan Wang
Institute of Electronics, National Chiao-Tung University, Hsinchu, Taiwan 300, Republic of China Chi-Chung Kei and Chien-Nan Hsiao
Instrument Technology Research Center, National Applied Research Laboratories, Hsinchu, Taiwan 300, Republic of China
Chun-Yen Changa兲
Institute of Electronics, National Chiao-Tung University, Hsinchu, Taiwan 300, Republic of China 共Received 25 June 2008; accepted 1 December 2008; published 12 January 2009兲
The authors present a linear-regression method based on a five-element circuit model to correct measured capacitance-voltage and conductance-voltage curves. This model explains the effects of series resistance and parasitic capacitance/inductance on the frequency dispersion of measured capacitance and the magnification of measured conductance. These extracted parasitic components show significant dependencies on the geometry of capacitor structure, thereby causing different frequency-dependent capacitance characteristics in measurements. © 2009 American Vacuum
Society. 关DOI: 10.1116/1.3058724兴
I. INTRODUCTION
Currently, measurement of capacitance-voltage共C-V兲 and conductance-voltage 共G-V兲 curves is a method commonly used to determine equivalent-oxide thickness 共EOT兲, but also, to extract the interface trap density共Dit兲 in
metal-oxide-semiconductor 共MOS兲 capacitors.1 However, this technique can no longer accurately obtain both EOT and Ditvalues in
MOS capacitors with large gate leakage current and series resistance, especially when scaling the EOT below 1.8 nm.2,3 An equivalent-circuit approach using distributed voltage-controlled resistor-capacitor 共RC兲 networks has been pro-posed to explain these nonideal behaviors on the measured capacitance curves.3It was found that an increase in the mea-sured frequency to the range of radio frequencies共RF兲, e.g., over 10 MHz, is a good approach to overcome these bottle-necks by reducing the overall impedance of the equivalent circuit of the dielectric film.4,5Accordingly, RF C-V probes to measure the leaky oxides catch more attention in recent years.6,7 Another method in tackling the above issue is to introduce a dual-frequency correction using a three-element circuit model.8,9 For better accuracy, four-element10 and five-element11models were subsequently proposed and dem-onstrated by adding either parasitic inductance or capaci-tance. In practice, the validity and application limit of the dual-frequency correction method were found to depend
strongly on the adopted frequencies and capacitor area.11,12 In this study, we propose another five-element circuit model and linear regression of multifrequency admittance measure-ment targeting to recover the real electrical properties of MOS capacitors as the effects of leakage current and para-sitic elements are involved. According to our analyses, the choice of which parasitic component to add, i.e., capacitance or inductance, is closely linked to the structural design of measured devices. In addition, we also evaluated the relative significance of these external components in the admittance correction.
II. EQUIVALENT-CIRCUIT MODEL OF FIVE ELEMENTS
Different to separately extract values of either RS/LS or RS/CS parasitic components in previously reported circuit
models,10,13 we consider the comprehensive influence of these parasitic components in our correction model and ob-tain the more reliable capacitance and conductance charac-teristics of MOS capacitors. Figure 1共a兲 shows the two-element parallel circuit model used for typical admittance characterization in an impedance meter, where Cm is the
measured capacitance and Gm共=1/Rm兲 is the measured
con-ductance. Usually, this model cannot describe the real behav-ior of the small-signal frequency response of a MOS capaci-tor. Thus, we propose an integrated-circuit model with five elements, as shown in Fig.1共b兲, to correct the measured raw data; CC is the corrected dielectric capacitance in parallel
with a corrected conductance GC, where GC includes the
effects of both the gate leakage current and the loss due to ac conductance arising from interface traps. In the part of exter-nal circuit, the conductance GS共=1/RS兲 represents all series
resistances, in parallel with parasitic capacitance CS and in
series with parasitic inductance LS. Equating the real and
imaginary parts of the total impedance in Figs.1共a兲and1共b兲, we can obtain 共Real兲 Gm Gm 2 +共Cm兲2 = GC GC 2 +共CC兲2 + GS GS 2 +共CS兲2 , 共1兲 共Imaginary兲 Cm Gm 2 +共Cm兲2 = CC GC 2 +共CC兲2 + CS GS 2 +共CS兲2 − Ls. 共2兲
Here is the angular frequency. With the assumption of 共GS兲2Ⰷ共CS兲2, the above two equations can be simplified
and rearranged as 共Real兲 Dm Cm共1 + Dm2兲 = DC CC共1 + DC2兲
冉
1 冊
+ RS, 共3兲 共Imaginary兲 1 2C m共1 + Dm2兲 = 1 CC共1 + DC2兲冉
1 2冊
+ RS 2 CS− LS, 共4兲where D = G/C is the dissipation factor. As seen, a
linear-regression plot of Dm/关Cm共1+Dm2兲兴 vs 1/ evidently has
an extrapolated value of RS. Also, we further define an
equivalent parasitic inductance Lequiv, which is equal to the
intercept of共RS兲2CS− LS, and whose value can be extracted
from the inverse-square dependence on angular frequency, as given by Eq.共4兲. To make the above assumption hold, i.e., 共GS兲2Ⰷ共CS兲2, the measured parasitic capacitance CSshould
be lower than 1000 pF at a frequency of 1 MHz for the typi-cal GSvalue of⬃0.01 mhos 共RS⬃100 ⍀ in most cases兲.
III. APPLICATION EXAMPLES AND DISCUSSION
MOS capacitors of the Pt/Al2O3/p-Si/Al-backside
struc-ture were fabricated, where Al2O3 was deposited by the
atomic-layer deposition technique using trimethylaluminum and H2O. The area of the Pt circular dot was estimated to be
⬃3.85⫻10−4cm2 using the optical microscopy. The C-V
and G-V curves were measured using a HP4284 LCR meter, and the gate leakage共I-V兲 characteristics were measured us-ing a Keithley 4200 semiconductor analyzer system. Figure2
illustrates the measured multifrequency C-V curves before 共open symbols兲 and after 共crossover symbols兲 linear-regression correction; a series resistance RS of ⬃110 ⍀ can
be extracted from Eq.共3兲. The inset shows the relationship of 1/关2C
m共1+Dm
2兲兴 vs 1/2 at different accumulation biases
for the extraction of Lequiv, where an extrapolated value of
Lequiv is −5.5H, implying the dominance of the LS term,
rather than the共RS兲2CSterm, in our case. We clearly observe
the frequency dispersion presented at the accumulation ca-pacitance without the correction, accompanying the C-V roll-off behavior due to the high leakage current. Taking into account the effect of these parasitic components, all of the corrected C-V curves perfectly align with one another. The extracted capacitance equivalent thickness 共CET兲 was 21 Å based on the accumulation capacitance at Vg= −2 V.
The corresponding variation of G-V curves as a function of measured frequency is shown in Fig.3. The conductance curve at the accumulation region measured at 1 MHz signifi-cantly decreased after the correction, thereby revealing that a small peak existed at the depletion region due to the contri-bution of interface-state loss. The effect of the external RS
does dominate at higher frequencies, relative to the imped-ance of the overall capacitor. We may overcome this problem by performing the measurement at lower frequencies; so that
FIG. 1. Small-signal equivalent-circuit models of MOS capacitors: 共a兲 simple parallel circuit model and共b兲 new five-element circuit model.
FIG. 2. 共Color online兲 Measured and corrected C-V curves of the Pt/Al2O3/p-Si MOS capacitor with gate area=3.85⫻10−4cm2. The inset
shows the extraction of Lequiv.
131 Cheng et al.: Five-element circuit model using linear regression method 131
the effect of RScan be omitted. However, the leakage-current
issue becomes more severe at lower frequencies; this fact explains why the conductance at accumulation sharply in-creases with increasing negative gate voltage as the fre-quency is lowered to 10 kHz. We can further estimate the corresponding static shunt conductance Gst from the I-V
characteristics shown in the inset of Fig. 3. A value of ⬃2 ⫻10−4 for G
st can be obtained at Vg= −2 V, and it
contrib-uted the most energy loss in measured conductance curves at lower frequencies.
To clarify the dependence of extracted parasitic compo-nents on the capacitor structure, we also prepared two differ-ent MOS capacitors, Al/HfO2/n-Si and n+-poly/SiOxNy/p-Si, respectively, by standard
photolithog-raphy to pattern various gate areas; the corresponding CET are⬃24 and ⬃33 Å for the deposited HfO2and SiOxNythin
films, respectively. Figure 4 shows the dependence of ex-tracted RSand Lequivon the gate-electrode area for two tested
MOS structures, and they exhibit remarkable area depen-dences共RS⬃1/area1/2and Lequiv⬃1/area兲. Both samples
ex-hibit the same trend: the capacitor with a smaller area pos-sesses higher absolute values of RSand Lequiv than that with
a larger area. These findings agree with the previously re-ported study.14 It was also found that larger gate area en-hanced the resultant frequency dispersion共not shown here兲. We note here that this area-induced dispersion behavior can be calibrated effectively by our proposed model.
In addition, we examined other MOS capacitors with dif-ferent high-k dielectrics, e.g., Gd2O3, and found that the
measured capacitances increase with respect to the frequency 共not shown here兲; this anomalous phenomenon has been ob-served by other investigators9and can also be understood by our proposed model. Figures 5共a兲and 5共b兲 show the simu-lated effect of the equivalent inductance Lequiv and series
resistance RSon the frequency dispersion of measured
accu-mulation capacitance. All siaccu-mulation cases illustrated here— after considering the respective parasitic components—will
converge to the single corrected capacitance CC= 920 pF,
i.e., without a frequency-dispersion effect. In Fig. 5共a兲, we observe that the measured capacitances exhibit a significant drop with respect to frequency as the value of Lequivbecomes positive. It implies that when either the CS term dominates
the contribution of the Lequiv or the LS term decreases, we
will likely measure a substantial decrease in accumulation
FIG. 3. 共Color online兲 Measured and corrected G-V curves of the Pt/Al2O3/p-Si MOS capacitor with gate area=3.85⫻10−4cm2. The inset
shows I-V characteristics.
FIG. 4. 共Color online兲 Gate-area dependence of the extracted RSand Lequiv
for Al/HfO2/n-Si and n+-poly/SiON/p-Si MOS capacitors. Note that the
negative value of Lequivpresented here is due to the dominance of Lsterm, as seen from the Lequivdefinition, Lequiv=共RS兲2CS− LS.
FIG. 5. Effects of the value of the Lequiv on the measured accumulation
capacitance Cmas a function of frequency with the共a兲 fixed value of RS 共100 ⍀兲 and 共b兲 fixed value of Lequiv共−10H兲. The corrected accumulation
capacitances with increasing measured frequency. Together with the results from Fig. 4, we conclude that a positive value of the Lequivmay be extracted from a large-area
capaci-tor; accordingly, shrinking the capacitor area causes a nega-tive value of the Lequiv due to the external inductance LS of
concern. In addition, the measured capacitances are also sen-sitive to the variation of series resistance RS, as seen in Fig.
5共b兲. Lower RS led to the increasing capacitances with
re-spect to measured frequency, whereas higher RS caused the
opposite behavior. We thus suggest that relative significance of either series resistance RS or equivalent inductance Lequiv
strongly correlates the geometry of device structure, mea-surements, cable-line connection, and other probing system setup, respectively.
IV. CONCLUSIONS
We proposed a five-element circuit model using a linear-regression method to correct the capacitance and conduc-tance measurements of MOS capacitors with thin oxides and high-k dielectrics. This correction model is able to recover the real electrical properties of measured C-V and G-V curves by considering the presence of both the series resis-tance and equivalent inducresis-tance. These external parasitic components depend on measured capacitor area, and they resulted in different behavior of frequency dispersion in C-V characteristics. This method could be employed in calibrat-ing electrical measurements for different MOS structures with thin-oxide and high-k gate dielectrics.
ACKNOWLEDGMENTS
This study was sponsored primarily by the National Sci-ence Council of the Republic of China under Contracts Nos. NSC96-2221-E-009-236 and NSC96-2221-E-009-202-MY3.
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