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Chapter 2 Overview of the Analog Buffer Circuits Using

2.1 Introduction…

2.1 Introduction

Researches on “system-on-panel” technology have been attracted much attention at present because it provides a chance to realize a compact, light weight, high reliability, and low cost display system [2.1]-[2.3]. Low-temperature polycrystalline silicon thin film transistor is considered to be the best candidate for carrying out system display due to the low temperature process, high carrier mobility and the compatibility to CMOS technology, which allow the integration of the driver circuit and even more complicated parts such as controller circuits, random access memory (RAM), and central processing unit (CPU) with pixel circuits on a single glass substrate. However, LTPS TFTs suffer from huge device-to-device variation due to the pulse-to-pulse variation of laser energy density and random distribution of grain boundaries, such poor uniformity makes the difficulty to fully integrate driving circuit using LTPS TFTs.

To realize integrating driving circuits using LTPS TFTs, output buffers are indispensable for the data driver to drive the large load capacitance of data lines. However, the poor uniformity of LTPS TFTs leads to the non-uniformity of buffer output voltage

across the panel which results in the wrong image displaying. Therefore, many researches employing LTPS TFTs have been tried to carry out analog buffers with high immunity of the device variations [2.4]-[2.17].

Analog buffer circuits using LTPS TFTs are classified into operational amplifier type (op-amp type) analog buffer and source-follower-type analog buffers according to their circuit architecture. Operational amplifier is most commonly used as the output buffer in single crystal silicon integrated circuits. However, the complicated circuit configuration and the huge output voltage variation of op-amp-type analog buffer using LTPS TFT make it not suitable for system-on-panel application. Source-follower-type analog buffer is considered a better candidate because of its simplicity and higher immunity to the device variations of LTPS TFT.

In this chapter, the circuit configuration, operating sequence, advantages and disadvantages of these two types of LTPS TFT analog buffers circuits are introduced. Those analog buffer circuits are simply classified into various types as shown in Fig. 2.1 based on the compensated methods [2.4]-[2.19]. The compensation principles of different types with configuration will be described in detail in this chapter. Furthermore, the output characteristics of the op-amp type analog buffer circuits and source-follower type analog buffer circuits are also discussed in this chapter.

Fig. 2.1. Classification of compensation method for LTPS TFT analog buffer.

2.1.1 Architecture of AMLCD Driver

The block diagram of AMLCD display panel is shown in Fig. 2.2. The periphery circuits blocks of LCD panel are composed of scan driver, data driver, timing controller, DC/DC converter, gamma reference voltage driver, common voltage driver (Vcom driver).

The timing controller decodes the output waveform to generate control signals at corresponding time, which is responsible for controlling the behavior of scan driver and transmitting the RGB (red, green, and blue) signals to the data driver. A DC-DC converter steps up a single externally supplied voltage to various higher level voltages (ex. VDD to 2VDD, 3VDD positive output voltage, and -2VDD, -3VDD negative output voltage) which provide the power supply voltage to the timing controller, interface circuit, source driver, gate driver, reference voltage driver and common voltage driver [2.20]-[2.21]. The gamma reference voltage driver is used to provide the various gamma reference voltages to the digital-to-analog converter (DAC) circuits. The common voltage driver is used to provide the common electrode voltage for the panel. Besides, the scan driver and data driver will be further discussed in the following.

z Scan Driver

The scan drivers generate the scan pattern and turn on each scan line sequentially. The architecture of source driver is shown in Fig. 2.3. It consists of shifter register, level shifter, and output buffer. The shift register is used to store digital input signal and transit them to the next stage, which generates sequential scan pulse for scan line according to the timing clock. The function of the level shifter is to translate the digital signal to a higher level voltage because the higher voltage is needed to turn on the switch element of the active pixel. Since the scan lines can be modeled as RC (resister and capacitor) ladder, the output

buffer is indispensable to drive the RC loading.

z Data driver

Fig. 2.4 shows the architecture of data driver which mainly contains shifter register, data register, level shifter, digital to analog converter (DAC) and output buffer. The first three stages are categorized as digital part, and the other two stages are belonged to analog part. The shift register generates pulse signal for video signal sampling according to the clock signal and transmit the pulse digital RBG signals to the next stage [2.22]. The data register receives the serial data signal and transmits them in parallel. The function of the level shifter is the same as the one used in the scan driver. It is applied to converter the digital RGB signal to a higher level voltage for data driver [2.23]. Because the data signal is transmitted in the digital interface, the digital to analog converter (DAC) is needed to convert the digital RGB video data into analog data signal for displaying the gray level [2.24]-[2.25]. Finally, the selected video data is transmitted to the data line after changing impedance in the output buffer. The purpose of output buffer is to assure the active pixels can be driven into a desired gray level. When the digital to analog converter is insufficient for driving the large loading of data line, the output buffer is used to enhance its driving capability. As the output buffer is applied, the DAC will charge a smaller loading of output buffer instead of a larger loading of data line. Thus, the desired data signal can be transmitted to the active area accurately. Because the LCD panel usually has large loading, especially in larger panel or higher resolution display, the analog buffer is indispensable to drive the large loading of the data lines.

Fig. 2.2. Block diagram of display panel.

Fig. 2.3. Architecture of the scan driver.

Scan Driver

TFT

Fig. 2.4. Architecture of the data driver.

2.1.2 Design Considerations for LTPS-TFTs Analog Buffer

To design the output buffer for the data driver of flat pane display, there are several critical issues to be considered. These include output voltage accuracy, driving capability, layout area, and power consumption.

(1) Output voltage accuracy: Analog buffer is applied to the data driver for ensuring that the data signal outputted from DAC can be transmitted exactly to the active pixel. Thus, the high output voltage accuracy of analog buffer circuits is required to display the desired gray level correctly.

(2) Driving capability: The output settling time for the data drivers must be fast enough to quickly transfer the data signals into the pixels within a line time. Therefore, the analog buffers in the end of data driver must quickly charge or discharge the load capacitance of data bus. Especially in the larger panel area and higher resolution display, the line time becomes shorter while the loading of data line is large. High driving capability of the output buffer is needed to achieve fast transition time and to get sufficient capability for driving large loading of data lines.

(3) Layout area: For the LAAT (line at a time) driving architecture, one analog buffer is needed for each column line. Thus, several hundreds of analog buffers are needed in active matrix display. As the resolution is higher and higher in the future, the amount of analog buffers is increasing and larger area will be occupied. Moreover, a data driver should fit in one pixel pitch, and circuit layout area is limited. Therefore, the simple configuration and less transistors are pursued for high-resolution display.

(4) Power consumption: The power consumption of poly-Si TFT integrated circuits tends to be higher than that of single-crystalline silicon ICs because of inferior electrical characteristics of poly-Si TFT such as higher threshold voltage, lower carrier mobility. For the expanding market of mobile and portable production, the demand of power dissipation is increasing. Since several hundreds of analog buffers are needed in the LAAT (line at a time) driving architecture, large static power is dissipated of analog buffers. Therefore, it needs to design an analog buffer with low power consumption.