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Mechanisms of the Effect of Multi-channel Structure

Chapter 2 Overview of the Analog Buffer Circuits Using

3.3 Results and Discussion

3.3.2 Mechanisms of the Effect of Multi-channel Structure

From the experimental results discussed in the previous section, it seems that multi-channel structure can only improve the uniformity of Vth and SS, but on effect on improving the uniformity of transconductance. In this section, we will propose the mechanisms of the multi-channel effect on device uniformity of LTPS TFTs according to our measurement results.

At first, we suppose that there are three possible mechanisms of improving uniformity of LTPS TFTs by multi-channel structure. They are side-wall effect, passivation effect, and probability effect. These three effects are discussed and analyzed in the following to make out the most important factor in improving uniformity of our multi-channel devices.

z Side-wall effect

The multi-channel structure with nano-scale channels has been verified to effectively enhance the electrical performance and reliability of poly-Si TFTs [3.8]-[3.9]. It is referred to induce side-wall channels on both sides of each channel due to the tri-gate structure. It results in the increasing of effective channel width and excellent gate control. As a result, LTPS TFTs with the multiple nano-scale channels structure can obtain higher electrical performance. Therefore, the standard deviation of the device characteristics is reduced due to the increasing of the average value. However, the smallest channel width of each stripe in the multi-channel devices we fabricated is 1μm, which is impossible to form the tri-gate structure. Moreover, the50nm-thick poly-Si thin film and 50/100nm-thick gate oxide were used in our devices. The side-wall gate control capability is very weak in these devices because of the thick gate oxide. Consequently, the effect of side-wall channel can be almost neglected in our multi-channel devices. The side-wall effect is considered not to be the factor

in improving uniformity of our multi-channel devices.

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z Passivation effect

The passivation of defects in the channel region has been proved to be the effective method for reducing grain boundary traps [3.11]-[3.16]. Trap states in the poly-Si active region have pronounced influence on device characteristics. The threshold voltage and subthreshold swing are strongly influenced by the density of dangling-bond deep states which are thought to mainly originate from dangling bonds in grain boundaries, while the field-effect mobility and leakage current are related to the strain-bond tail states which may mainly come from the intra-grain defects. The multi-channel structure has been reported to get high performance devices due to increase the efficiency of passivation resulting from the expanded passivation path [3.17]-[3.20]. Moreover, it has been verified that the passivation treatment can improves the uniformity of TFT characteristics significantly due to the reduction of localized defect density in the poly-Si film [3.21]. Therefore, it can be sure that the transistors with multi-channel structure which enhance the passivation efficiency can greatly reduce the device variation. Nevertheless, there is no passivation treatment in our devices fabricating process. As a result, the passivation effect is not the cause of improving uniformity in our multi-channel devices.

z Probability effect

For the LTPS TFTs using excimer laser crystallization, due to the non-uniform beam profile and pulse-to-pulse variation of laser energy density, a very non-uniform grain size distribution is always obtained across the whole substrate. The random grain distributions will result to huge variations of electrical characteristic between transistors. As shown in

Fig.3.7(a), when the transistors were fabricated on the substrates, it may located in the small grain region like device 1 or in the large grain region such as device 2. Large trap states densities difference will exist between these two devices and cause the device variations.

When the transistors with multi-channel structure is performed, as shown in Fig.3.7(b), for device 1, several of the divided channels may shift to the large grain region but some still in the small grain region. In comparison with single channel device shown in Fig.3.7(a), the grain boundaries are reduced in the multi-channel device and hence the performance is improved. In the case of device 2, when the channel is divided, some divided channels may encounter the small grain but some still located in the large grain region. Therefore, the numbers of grain boundaries are about the same between device 1 and device 2 on the substrate by employing the multi-channel structure. Owing to the dangling bonds in grain boundaries are the main source of deep states which strongly affect the threshold voltage and subthreshold swing of poly-Si TFTs, the variations of the Vth and SS in the multi-channel devices are much reduced resulting from the more uniform grain boundaries densities between transistors. It is consonant with our measurement results discussed previously.

However, according to the mechanism of probability, only the grain boundaries non-uniformity can be improved by multi-channel structure, the intra-grain defects of unit area is nearly the same with single-channel devices even after channel divided. Large variations of tail states still remain between the transistors with multi-channel structure.

Therefore, the field-effect mobility and leakage current which governed by the strain-bond tail states in active region nonetheless suffer from large variations in the multi-channel devices which also coincide with the measurement result shown in section 3.3.1. It can be concluded that the multi-channel structure is evident of reducing the deep states densities effectively, while is inefficient for reducing the tail states variations.

In order to investigate the correlation between the grain size and the stripe numbers in out multi-channel devices, scanning electron microscopy (SEM) analysis was executed. The

samples were processed by Secco-etch before analysis. Fig.3.8 shows the SEM image of 500-Å poly-Si thin film crystallized by ELA with the laser energy density of 340 mJ/cm2. The average grain size is about 0.3 μm; the maximum and minimum grain size is about 0.9 μm and 0.1 μm, respectively. It is clear that severe variations of grain size exist in the laser crystallized poly-Si thin films which contribute to the electrical characteristic variations of LTPS TFTs. Based on the measured results and the mechanism of probability effect, it reveals that good uniformity will be achieved in the multi-channel devices with nano-scale channels.

Therefore, the devices with more channel stripes get the better uniformity. However, the more channel stripes, the larger the layout area. Restricting to the design rule and the consideration of layout spaces, the numbers of channel stripes must be limited to an optimum value in the multi-channel devices. In addition, the influence of side-etching gets noticeable when the width of each channel stripe is in the nano-scale. The process variation resulting from side-etching will also contribute to variations of electrical characteristics in the multi-channel devices with tiny channel stripes. In conclusion, the optimum design is obtained when the channel width of each stripe close to but slightly larger than the grain size.

(a)

(b)

Fig.3.7. Probable distributions of the relative location between grain structures and the devices. (a) single channel devices, and (b) multi-channel devices.

Fig.3.8. SEM image of poly-Si thin films crystallized by ELA.

3.4 Conventional Source-follower Analog Buffer with