Improved Lower Electrode Oxidation of High-kappa TiCeO Metal-Insulator-Metal Capacitors by Using a Novel Plasma Treatment

Improved Lower Electrode Oxidation of High-N TiCeO Metal-Insulator-Metal Capacitors by Using a Novel Plasma Treatment



C. H. Chenga, H. H. Hsub, C. K. Dengb, Albert Chinb and C. P. Choua 

a

Department of Mechanical Eng., National Chiao-Tung Univ., Hsinchu, Taiwan, ROC

b

Department of Electronics Eng., National Chiao-Tung Univ., Hsinchu, Taiwan, ROC 

We have fabricated high-N Ir/TiCeO/TaN metal-insulator-metal (MIM) capacitors using a dual plasma treatment on bottom electrode. The novel plasma treatment suppresses the growth of bottom interfacial layer to reduce the degradation of capacitor performance under 400oC PDA. A low leakage current of 1.7u10-7 A/cm2 at -1 V and capacitance density of ~18 fF/Pm2 at 1 MHz were obtained for 21 nm thick TiCeO MIM devices; moreover, a 37 nm thick TiCeO film has a capacitance density of 11 fF/Pm2, which gives a N value of 45. Consequently, the excellent device performance is due to the combined effects of the dual plasma treatment, high-Nҏ TiCeO dielectric and a high work-function Ir metal.

Introduction

There is a continuing demand to increase the capacitance density (HN/tN) of the

Metal-Insulator-Metal (MIM) capacitors (1)-(13). To achieve this, the MIM devices have evolved by using high Nҏdielectrics such as SiN (1)-(2), Al2O3 (3)-(4), Ta2O5 (5), HfO2

(6)-(8), Nb2O5 (9). Titanium oxide (TiO2) is an attractive material, which has a higher

dielectric constant (N ~50-80) depending on the crystal phase. However, a small band gap, conduction band offset (

'

current and unwanted interfacial layer. In order to improve these issues, TiO2-based

dielectrics with a wider band gap and larger conduction band offset have been developed, such as TiTaO (10)-(11), TiLaO (12) and TiHfO (13). Although ZrO2 dielectrics with a

dielectric constant of > 40 for 50nm DRAM technology were demonstrated, the Zr-based crystalline ternary oxides still leave some concerns about the film uniformity and device reliability, compared to amorphous dielectrics (14). A low leakage current and small capacitance variation ('C/C) dependence of the applied voltage are also necessary for

high-density DRAM application, except for the limited thermal budget (>400oC) required for BEOL integration.



The low-N interfacial layer formed between the dielectric and the bottom electrode after a 400oC-PDA process will degrade the capacitance density and increase the leakage current. Using the NH3 plasma interface treatment on the bottom electrode to improve the

leakage current has been proved (15). This suggests that the NH3 plasma treatment

nitrifies the bottom TaN surface, which suppresses the formation of bottom interfacial layer. Here, we reported a dual plasma treatment on the bottom electrode to suppress the growth of bottom interfacial layer and improve the capacitor performance further.



dielectric constant (~26), moderate conduction band offset (~0.75 eV) (16) and high scaling capability. It is worth noting that CeO2 is partially reduced to Ce2O3 due to

oxygen deficiency under post deposition annealing (PDA) (17), while the Gibbs free energy of Ce2O3 (+105 kcal/mol) (18), larger than that of Ta2O5 (-52 kcal/mol) and HfO2

(+47 kcal/mol), can avoid metal/oxide interdiffusion or chemical reaction caused by oxygen exchange. Although TiTaO capacitors published previously exhibit a good performance, the TiTaO dielectric reacts easily with the bottom electrode to form a thicker interfacial layer due to negative Gibbs free energy of Ta2O5.



Here, a high-N (~45) TiCeO film, which mixed a high-N TiO2 and CeO2 dielectric,

combine a high work-function Ir metal (~5.27 eV) as a MIM capacitor has been fabricated. A capacitance density of ~18 fF/Pm2 at 1 MHz and leakage current of 1.7u10-7 A/cm2 at -1 V were measured for a 21 nm thick TiCeO MIM capacitor, respectively. A quadratic voltage coefficient of capacitance (D) of 3192 ppm/V2 was obtained at 1 MHz, which can also be improved rapidly with a decreased capacitance density (19) used for analog/RF application. The good performance is attributed to the dielectric properties, the high work-function metal and a novel interface plasma treatment.

Experimental Procedure

The high-N TiCeO MIM capacitors were fabricated on standard Si wafers. To permit VLSI backend integration, the process began with depositing a 2-Pm-thick SiO2 isolation

layer on the Si substrates. Then a 50 nm TaN was deposited on a 200 nm Ta layer by PVD and the Ta/TaN bi-layers used as a bottom electrode, where the thick Ta was chosen to reduce the parasitic resistance of the electrode. After patterning the bottom electrode, the TaN surface was given a NH3 plasma treatment at 100W first to increase the

oxidation resistance (5) and then was exposed to an O2 plasma treatment at 50W before

the high-N deposition and post-deposition annealing. Sequentially, the 21 nm and 37 nm thick TixCe1-xO (x~0.67) films were deposited by PVD, followed by a 400oC PDA in an

oxygen ambient to reduce the defects and the leakage current (3). (The TiCeO thickness was later measured by cross-sectional SEM.) Finally, a 20 nm Ir was deposited and patterned to form the top electrode. The cross-sectional Scanning Electron Microscopy (SEM) and Atomic Force Microscopy (AFM) were used to identify the thickness of dielectric and the interface of bottom electrode, respectively. A large capacitor size of 180-Pmu180-Pm was chosen to avoid any variations in dimensions arising from lithography. The fabricated devices were characterized by C-V and J-V measurement

using an HP4156C curve tracer and HP4284A precision LCR meter, respectively.

Results and Discussion

The C-V characteristics of Ir/TiO2/TaN capacitors in Figure 1(a) show a capacitance

density of ~15 fF/Pm2 at 100 kHz. However, the capacitance density presents a drop while increasing the applied voltage up to 1V. From the J-V characteristics in Figure 1(b),

a small leakage current of 1u10-7 A/cm2 at -1 V can be obtained under gate injection condition by using a high-work-function metal Ir as a top electrode. But a large leakage current of ~1.7u10-2 A/cm2 at 1 V was obtained under bottom injection condition, even though the bottom electrode has been treated by a NH3 plasma. This implies that the

small band gap of TiO2 dielectric will lead to a high leakage current, and its poor thermal

stability will also lead to a thicker interfacial layer between the high-N dielectric and the bottom electrode under a thermal budget of 400oC-PDA. As stated above, the both two properties will cause a large degradation of capacitance performance. This is why we mixed TiO2 with other dielectrics with a wider band gap and good thermal stability.

Since the interfacial layer is a serious problem for the scaled EOT, the nitrified TaN electrode by using NH3 plasma for the suppression of bottom interfacial layer is not

already enough to meet the requirement for sub-1 nm EOT DRAM technology. To improve the effect of interfacial layer growth further, the conventional NH3 plasma

treatment will be replaced by a dual plasma treatment, which adds an additional oxygen plasma on the surface of bottom electrode after conventional NH3 plasma treatment. In

the present case, the bottom electrodes of the MIM capacitors were treated by a dual plasma treatment. Subsequently, we introduce the TiCeO dielectric instead of the TiO2

dielectric to fabricate MIM capacitors. The TiCeO MIM capacitors were characterized by current-voltage and capacitance-voltage measurements and shown in the following content.



The Figure 2(a) shows the C-V characteristics of Ir/TiCeO/TaN capacitors at a 21 nm

thickness, fabricated under the optimal conditions of a 400oC PDA and dual plasma treated TaN. A high capacitance density of 17.7-18.4 fF/Pm2 was measured for the TiCeO MIM capacitors. A comparison with other capacitors reported previously is summarized in Table I. In addition, the VCC-D is an important parameter of MIM capacitors for analog applications. The VCC-D characteristics can be obtained by fitting the measured C-V characteristics with a second order polynomial equation:

ΓC(V)=C0 (DV2 +EV) [1]

Here C0 is the capacitance at 0 V, D and Eҏ represent the quadratic and linear voltage

coefficients of capacitance, respectively. Since the linearE term can be compensated by circuit design, the quadratic-D is the main factor in the voltage dependence. The Figure 2(b) shows the 'C/C-V charateristics of TiCeO MIM capacitors with a capacitance

density of ~18 fF/Pm2. A quadratic-D value of 3192 ppm/V2 at 1 MHz was measured. From our previous works (10)-(12), the quadratic VCC-D can be improved greatly with increasing the dielectric thickness and a decreased capacitance density used for analog and RF applications.



In Fig 3(a), we show the J-V characteristics of TiCeO MIM capacitors with or

without O2 plasma treatment on the bottom electrode. A low leakage current of 1.7u10-7

A/cm2 at -1V under gate injection condition was measured for the samples with O2

plasma treatment. The comparable leakage currents indicate that the samples with an additional O2 plasma treatment can be improved by two orders of magnitude effectively.

This may be attributed to an additional oxygen plasma to increase the anti-oxidation properties after NH3 plasma on bottom TaN electrode. Besides, the leakage current from

bottom injection is apparently lower than that of the Ir/TiO2/TaN MIM capacitors

described above. This improved leakage current, at a comparable capacitance density, is due to the TiCeO dielectric with a larger

'

current exponentially. In this work, our TiCeO MIM capacitors exhibit a good performance, compared to th TiTaO and TiHfO capacitors. Under the similar high-N values, a lower leakage current at -2V was measured for the TiCeO MIM capacitors than

that of the TiHfO capacitors at a lower capacitance density of 14.3 fF/Pm2. The AFM pictures in Figure 3(b) show the rms roughness of 0.415 nm for only nitrogen plasma and 0.391 nm for both oxygen and nitrogen plasma, respectively. We observed that a smoother bottom surface can be obtained via a dual plasma method. It is well known that a smoother surface can reduce the defect density in the interface between dielectric and bottom electrode. Besides, it is generally believed that the surface roughness effect can be explained in terms of an image force, which lowers the barrier height from gate or bottom injection (20).

The Figure 4(a) shows the leakage current of 1u10-6 A/cm2 at -1 V for the 21 nm thick TiCeO MIM capacitors at 125oC, which is approximately one order of magnitude higher than that at 25oC. The low leakage current at 125oC may be due to the larger 'EC

and higher work-function electrode, which form a higher Schottky barrier height to lower the thermal leakage. Therefore, the top electrode of high work function Ir not only lowers the leakage current at 25oC, but also reduces the number of gate-injected charges at elevated temperature. To more deeply investigate the current conduction mechanism, we plotln(J) versus E1/2 for the Ir/TiCeO/TaN MIM capacitors shown in Figure 4(b),:

¸ ¸ ¹ · ¨ ¨ © § _ v kT V E J 2 b 1 exp

J

KSH

J

2.3 for TiO2 or CeO2 (21), and Kis 1 or 4 for Schottky emission (SE) or Frenkel-Poole

(F-P) conduction, respectively. From the ln(J)-E1/2 plot, the conduction mechanism of leakage current seems to be dominated by Schottky emission at low electric field and F-P

emission at high electric field. From the ln(J/E)-E1/2 plot in Figure 4(c), the extracted linear-E values are the slopes at 25oC and 125oC. The refractive index of 1.8~2.0 for TiCeO dielectric can be deduced at 25oC-leakage current under the conduction mechanism of F-P emission from the range of 0.64 MV/cm to 1.21 MV/cm. Since the

deduced refractive index is close to the theoretical value of 2.3~2.5, the conduction mechanisms we suggested at low or high electric filed were demonstrated.



Finally, a capacitance density of 11 fF/Pm2 was obtained for a 37 nm thick TiCeO MIM capacitors and the Cross-sectional SEM image of the TiCeO MIM capacitors, inserted in Figure 5, gives a high-N value of ~45. Therefore, the high-N TiCeO dielectric may be used as a dielectric for DRAM or RF capacitors.



Conclusions

In this study, a high capacitance density and low leakage current have been achieved in Ir/TiCeO/TaN MIM capacitors. We point out the importance of proper surface treatment on the bottom electrode for the fabrication of MIM capacitors. We also demonstrated that the novel dual-plasma treatment can improve the capacitor performance largely at a processing temperature of 400oC, which could be integrated into DRAM BEOL.

TABLE I. Comparison of MIM capacitors with various dielectrics and metal electrodes. ʳ HfO2 (6) Tb-HfO₂ (8) Al2O3-HfO2 (7) TiTaO (10)-(11) TiHfO (13) TiCeO Top Electrode Ta (4.2 eV) Ta (4.2 eV) TaN (4.6 eV) Ir (5.27 eV) Ni (5.1 eV) Ir (5.27 eV) Cap. Density (fF/Pm2) 13 13.3 12.8 23 14.3 18 J (A/cm2) @25oC 6u10-7 (2V) 1u10-7 (2V) 8u10-9 (2V) 2u10-6 (-1V) 8.4u10-8 (-1V) 5u10-5 (-2V) 1.7u10-7 (-1V) 1u10-5 (-2V) Dҏ (ppm/V2) 607 2667 1990 2289 3392 3192 N ~15 ~20 ~18 ~45 ~45 ~45  Acknowledgment

This work was supported in part by NSC 96-2221-E-009-184 of Taiwan.



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-1

0

1

10

12

14

16

18

20

(Bottom TaN with NH

plasma treatment)

Ir / TiO

/ TaN

Capacitance density (fF/

m

)

Voltage (V)

@100 kHz

-3

-2

-1

0

1

2

3

10

10

10

10

10

Bottom injection

Ir / TiO

/ TaN

Current Density (A/cm

2

)

Voltage (V)

(Bottom TaN with NH

plasma)

Gate injection

(b)



Figure 1. (a) C-V and (b) J-V characteristics of Ir/TiO2/TaN MIM capacitors processed at

-1.5

-1.0

-0.5

0.0

0.5

1.0

1.5

12

15

18

21

1 M Hz

500 kHz

100 kHz

Ir/TiCeO/TaN @ 21nm thickness

Voltage (V)

Capacitance density (fF/

m

)

VCC-

D

= 3192 ppm/V

C~18 fF/

P

m

@ 1MHz

Figure 2. (a) C-V characteristics of Ir/TiCeO/TaN MIM capacitors with a 21nm thickness

-3

-2

-1

0

1

2

3

10

10

10

10

10

10

10

Both NH

& O

plasma

Only NH

plsma

Current density

(

A/

c

m

2

)

Voltage (V)

Gate injection

Bottom injection

(a)

Only NH

plasma

Both NH

& O

plasma

(b)



Figure 3. (a) The J-V characteristics of Ir/TiCeO/TaN MIM capacitors for a 21nm

thickness with or without O2 plasma (b) The surface roughness of bottom electrode by

-3 -2 -1 0 1 2 3 10-9 10-7 10-5 10-3 10-1 101 @125oC @25oC C urr en t d e n s it y ( A/ cm 2 ) Voltage (V)

Gate injection Bottom injection

(a) 200 400 600 800 1000 1200 -16 -12 -8 F-P emission Schottky emission @ 25oC @125oC E1/2(V/cm)1/2 ln (J) (b) 600 700 800 900 1000 1100 -33 -30 -27 -24 -21 -18 @25oC; E=0.01618 @125oC; E=0.09751 ln(J/E) E1/2(V/cm)1/2 Frenkel-Poole emission (Gate injection) Ir/TiCeO/TaN (c) 

Figure 4. (a) The J-V characteristics of Ir/TiCeO/TaN MIM capacitors with a 21nm thickness at 25oC and 125oC (b) Measured and simulated lnJ-E1/2 of an Ir/TiCeO/TaN capacitor (c) The lnJ versus E1/2 plot for Frenkel-poole emission.

-1.5

-1.0

-0.5

0.0

0.5

1.0

1.5

0

3

6

9

12

15

Ir/TiCeO/TaN @37nm

Voltage (V)

C

(fF/um

)

N

~45

Ir

TaN/Ta

Figure 5. C-V characteristics of Ir/TiO2/TaN capacitors with a 37 nm thickness. The SEM