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Radio Frequency Power Performance Enhancement for Asymmetric Lightly Doped Drain
Metal–Oxide–Semiconductor Field-Effect Transistors on SiC Substrate
View the table of contents for this issue, or go to the journal homepage for more 2010 Jpn. J. Appl. Phys. 49 014104
(http://iopscience.iop.org/1347-4065/49/1R/014104)
Radio Frequency Power Performance Enhancement for Asymmetric Lightly
Doped Drain Metal–Oxide–Semiconductor Field-Effect Transistors on SiC Substrate
Tsu Chang, Hsuan-ling Kao1, S. L. Liu, Joseph D. S. Deng2, K. Y. Horng3, and Albert Chin Department of Electronics Engineering, National Chiao-Tung University, Hsinchu 300, Taiwan, R.O.C.
1Department of Electronic Engineering, Chang Gung University, Taoyuan 333, Taiwan, R.O.C. 2Cyntec Co., Ltd., Hsinchu, Taiwan, R.O.C.
3Chung-Shan Institute of Science and Technology, Taoyuan, Taiwan, R.O.C.
Received August 5, 2009; accepted September 20, 2009; published online January 20, 2010
In this paper we report the DC characteristics and radio frequency (RF) power performance improvement as high as 6.6% of asymmetric lightly doped drain metal–oxide–semiconductor field-effect transistors (asymmetric LDD MOSFET, AMOSFET) with 50-mm-thick silicon substrates on SiC substrates. The self-heating and parasitic effects of large size AMOSFETs with 50-mm-thick silicon on SiC substrates are reduced owing to good heat dissipation and less lossy behaviors of thinned silicon substrates and SiC substrates. Therefore, the power gain, saturation output power, and power added efficiency of AMOSFETs with 50-mm-thick Si substrates mounted on SiC substrates is improved.
#2010 The Japan Society of Applied Physics
DOI: 10.1143/JJAP.49.014104
1. Introduction
The Si radio frequency (RF) metal–oxide–semiconductor field-effect transistors (MOSFETs) are now widely used for wireless communications, owing to improvements larger RF gain, higher current-gain (jH21j2) cut-off frequency ( ft) and
better power-gain (Gmax) maximum oscillation frequency
( fmax) with transistor down-scaling and technology
evolu-tion.1–4) We previously developed an asymmetric-lightly
doped drain (LDD) MOSFET (AMOSFET)5) that met the
requirement large RF output power and high-frequency performance. This new RF power device (AMOSFET) can be fabricated in standard foundry logic processes by block-ing the n-drain extension usblock-ing a LDD mask without extra processing steps.
Advanced complementary metal–oxide–semiconductor (CMOS) technology is one of the candidates for system-on-chip (SOC) due to integration and low cost. However, the decay factors of MOSFET performance are the self heating effect6) and substrate loss.7) The self heating effect is the
heating of a device owing to its internal power dissipation, especially in high-current devices. It results in a reduction of the drain current and the negative output conductance effect. Additionally, a lossy Si-substrate causes the parasitic effect of the coupling capacitance and a loss of the RF signal to the substrate. In this study, we report that the DC characteristics and RF performance can be improved by about 6% for an AMOSFET with an ultrathin Si substrate (50 mm) bonded to a SiC substrate. The thermal conductivity is of the SiC substrate is 4.9 W cm1K1 compared with 1.5 W cm1K1 for the silicon substrate. The resistivity of very large-scale integrated circuit (VLSI)-standard Si substrates is 10 cm lower than that of the semi-insulating SiC substrates is 105 cm. The
substrate is removed using chemical mechanical polishing (CMP) process after the CMOS IC processes. Active devices after thinning and transfer onto plastic have also been reported.8–10) However, the self-heating effect in a
high-current active device is serious because of the effect it has in terms of worsening the thermal conductivity. Therefore, the device with a SiC substrate base is a good candidate to improve DC characteristics and RF power performance.
2. Experimental Methods
A foundry standard, 0.18 mm, 1-poly–6-metal (1P6M) logic process was used in this study. To increase the breakdown voltage, the drain LDD region was removed by an n ion-implantation blocking mask to form the AMOSFET.5)The
p-type region underneath the drain spacer forms a wider depletion region to allow larger applied drain voltage. A multiple gate finger layout was used, which has a 40-gate-finger AMOSFET with 0.18 mm gate length and 5 mm width for milli watt RF power application. To achieve integration onto a SiC substrate, we first thinned the Si substrate from 550 to 50 mm using a CMP procedure. The thinned die was then transferred onto a 275-mm-thick SiC substrate. Figure 1(a) shows an image of the fabricated die on the SiC substrate (background held by hand). The thickness of the 50-mm-thick Si substrate thinned-down based on the optical measurement is shown in Fig. 1(b). The semi-insulating SiC substrate had a resistivity of 105 cm. The devices were
fabricated on 8-in wafers at an IC foundry. The small signal S-parameters were measured up to 22 GHz CASCADE probe station and LRRM standard calibration procedure using an HP8510C network analyzer. The intrinsic device characteristics were obtained by open and short two-step de-embedding procedures.11,12) The RF power
character-ization was carried out by on-wafer measurements at 2.4 GHz using an ATN load-pull system, where the input and output impedance matching conditions were selected to optimize the output power.
(a) (b)
50 μm die
SiC substrate
Fig. 1. (Color online) (a) Image of a 50mm thick die on a SiC substrate. (b) Substrate thickness measurement after the thinning procedure.
3. Results and Discussion 3.1 DC characteristics
The drive current of AMOSFETs of 200 mm width and 0.18 mm length before and after a thinning-down process are shown Fig. 2. After the thinning and transfer procedures, the drain current increases at high Vg (> 0:6 V). However, the
drain currents of these two devices are almost the same at small Vg (< 0:6 V). Because the SiC has good heat
dissipation to reduce the self-heating effect. The self-heating effect could be verified from the pulse I–V measurement13)
owing to the ‘‘cold’’ device characteristics. Figure 3 shows the increasing percentage of the drain current at the Vd¼
1:8 V bias condition. The reduction of self-heating effect is significant at higher drain current Id.
Figure 4 shows the transconductance enhancement of AMOSFET before and after thinning. The thinned AMOSFET on a SiC substrate shows a higher gm
character-istic than that on a VLSI-standard substrate. The gm value
increased from 88.95 to 93.4 mS, which is a 5% enhance-ment. The enhancement trend in DC performance is due to the good heat dissipation of 50 mm Si on a SiC substrate. 3.2 S-parameters
The RF S-parameters from 1.1 to 22 GHz of AMOSFETs
before and after thinning were measured. Figure 5 shows the current gain (jH21j2) and Gmaxas a function of frequency for
both AMOSFETs. A cutoff frequency ft of 61 GHz was
obtained from the measured S-parameters for the thinned AMOSFET device. This value is higher than the 57 GHz value found for the VLSI-standard Si substrate AMOSFET. This higher ftin the thinning AMOSFET device is consistent
with the gm in Fig. 4. The ftis given by
!T¼
gm
Cg
;
where Cgis input capacitance and !T¼2 fT. Therefore, the
thinned-down AMOSFET has the higher ftdue to the higher
gm. The reduced self-heating effect improves the RF small
signal characteristic.
The Gmax that has a 10 dB/decade slope in the
maximum stable gain (MSG) frequency region was obtained from the measured S-parameters on VLSI-standard Si substrates and 50 mm Si substrates on SiC AMOSFET device. The thinned-down AMOSFET maintained a higher Gmaxthan the VLSI-standard Si substrate AMOSFET device
as shown in Fig. 5. Therefore the higher fmax is obtained
by extrapolation for the thinned-down AMOSFET device. However, this method cannot be used to determine the fmax.
This is because the Gmaxslope changes from 10 dB/decade
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 0 20 40 60 80 100 120 140 160 Vg=0~2V step 0.2V
Solid: on VLSI-standard Si Substrate Open: with 50 μm Si on SiC substrate
Id
(mA)
Vd (V)
Fig. 2. Drive current of 0.18mm AMOSFETs on VLSI-standard Si substrates and 50mm Si substrates on SiC.
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 2 4 6 8 10 0 30 60 90 120 150 Δ ID /ID (%) Vg (V) ID (mA) meausre @ Vd=1.8V
Solid: on VLSI-standard Si Substrate Open: with 50 μm Si on SiC substrate
Fig. 3. Increasing rate of the drain current for 0.18mm AMOSFETs on VLSI-standard Si substrates and 50mm Si substrates on SiC at Vd¼1:8 V. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 20 40 60 80 100 120
Solid: on VLSI-standard Si Substrate Open: with 50 μm Si on SiC substrate
gm
(mS)
V g (V)
Fig. 4. DC transconductance gm of 0.18mm AMOSFETs on
VLSI-standard Si substrates and 50mm Si substrates on SiC.
1 10 100 0 10 20 30 40 0 5 10 15 20 25 30 35 40
Solid: on VLSI-standard Si Substrate ft = 57 GHz Open: with 50 μm Si on SiC substrate ft = 61 GHz
|H21 | 2 (dB) Frequency (GHz) Gmax (dB)
Fig. 5. Measured jH21j2 and Gmax characteristics of 0.18mm
AMOSFETs on VLSI-standard Si substrates and 50mm Si substrates on SiC.
to higher values at higher frequencies, where the Gmax
decreases from the MSG to the maximum available gain (MAG). The fmax value is above our measurement
capa-bility.
For further analysis of the substrate materials, it is necessary to extract the small-signal device parameters RF gm and Rsub. The device parameters are de-embedded from
the open pad. The RF gm vaule is derived from14)
gm ¼ jY21Y12j:
The bias of an AMOSFET whose body is tied to the source is Vg ¼1:2 V, Vd¼1:8 V. The extracted RF gm value in
Table I shows the 6% improvement, which is the same trend observed for DC characteristics. A simple extraction method of extracting Rsub from the Y-parameters of the MOSFET
is proposed. The Rsub is derived from15)
Rsub
Re½Y22
ðIm½Y22 þIm½Y12Þ2
:
The bias of an AMOSFET whose body is tied to the source is Vg¼Vd¼0 V. The 18.5% enhancement in the extracted
Rsub is obtained from the thinned-down device to the
VLSI-standard device in Table I. The higher Rsub shows lower
substrate loss. Therefore, the thinned-down AMOSFET on a SiC substrate shows better RF performance due to lower substrate loss and better DC characteristics.
3.3 RF power characteristics
The substrate loss can be reduced by a CMP procedure after the IC processes. In this study the substrate was thinned-down to 50 mm. The substrate loss can be reduced to improve the RF power performance. The RF power characteristics have been measured at 2.4 GHz by ATN load pull system under the DC bias point, Vgs¼1:2 V and Vds ¼2:5 V, for
the AMOSFETs before and after thinned-down procedure in Fig. 6. The DC drain breakdown voltage (BVdss) of the
AMOSFETs was 6.9 V for asymmetric-LDD transistors.5) This better BVdss is due to the wider depletion region
designed at drain side to allow higher applied voltages, which is vital for RF power applications with large voltage swing. Therefore, the AMOSFET devices are biased at Vds ¼2:5 V with a 2 drain voltage swing in this study. The
RF saturation output power (Psat) at 2.4 GHz is 0.45 and
0.48 W/mm for the AMOSFET devices on VLSI-standard Si substrate and 50 mm Si substrate on SiC, respectively. This is equivalent to a 6.6% enhancement. The higher improvement percentage is benefit from the reduced substrate loss by thinned down substrate to 50 mm and transfer to the semi-insulating SiC substrate. The power gain is also increased from 19.88 to 20.12 dB, which is nearly a 0.3 dB improve-ment. In an RF power amplifier, power-added efficiency (PAE) is defined as the ratio of the difference between the
output and input signal power to the DC power consumed, as given by
PAE ¼RFoutRFin PDC
:
The peak PAE of AMOSFET devices on VLSI-standard Si substrates and 50 mm Si substrates on SiC are 45.6 and 46.6%, respectively. The enhancement of the trend in the measured large signal RF Pout and PAE characteristics as a
function of Pin is in good agreement with the improvement
in DC measurement results. The improvement in DC I–V and RF characteristics is due to the reduction in the self-heating and substrate loss effect.
4. Conclusions
We have successfully demonstrated the improved DC characteristics and RF performance of AMOSFETs on 50 mm Si substrates mounted on SiC substrates. These are future candidates for heat sink applications in high-power devices. The trend in the enhancement is also observed in the milli watt power range. The combination of a thinned Si substrate on a SiC substrate also shows better RF perform-ance owing to the reduction of self-heating and the substrate loss effect.
Acknowledgment
T. Chang wishes to thank Mr. Y. T. Ho from CSIST for his assistance. This work was partially supported by NSC (98-2221-E-182-024) and CGU (UERPD280012) of Taiwan.
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