UWB Distributed Power Amplifier Basics

4.2.1. Conventional Architecture of UWB Class-AB PA

The distributed amplifier is an elegant way to overcome the limitation of maximum gain-bandwidth product [73]. This architecture achieves a gain-delay trade-off without the penalty on bandwidth. Theoretically, this architecture can provide possibly infinite bandwidth with arbitrary gain. Therefore, ultra-wideband amplification can be accomplished.

Fig. 4.1 is the conventional distributed amplifier architecture. Each Gm-cell acts as a transconductor to provide a certain amount of output current corresponding to the input driving voltage signal. While the input driving voltage signal propagates down the input line, each Gm-cell is being excited in succession, producing the output current equal to the transconductance (Gm) of each Gm-cell multiplied by the input driving voltage signal. One half of the output current signals from each Gm-cell propagate backward to the output line termination resistor Rt and are absorbed. The other half of the output current signals ultimately sum in time coherence if the delays of the input and output lines are matched.

Therefore, the output current waves sum up coherently in constructive superposition manner.

Fig. 4.1. Conventional distributed amplifier architecture.

4.2.2. Load-line Design of Each Gm-Cell

Fig. 4.2 is a typical circuit implementation of this architecture. The cascode topology provides good voltage gain and good isolation. The input and output lines can be synthesized by lumped passive devices, exhibiting a transmission line characteristic impedance of Zo.

Fig. 4.2. Typical circuit implementation of the conventional distributed amplifier architecture.

Fig. 4.3 shows the loading condition of each Gm-cell. The active device output is loaded with a characteristic impedance of Zo in both directions. Equivalently, each Gm-cell is loaded with Zo/2. Therefore, it is easy to show that the voltage gain, Av, of the distributed amplifier is governed by

o

1

= 2 ⋅ ⋅

V m

A n G Z (4.1) where n denotes the number of Gm-cell in the distributed amplifier.

Fig. 4.3. Loading condition of each G_m-cell.

The distributed amplifier architecture provides the capability to achieve simultaneously 50-Ω conjugate match and load-line match. Since each direction seen by the active device output is designed to be 50-Ω for minimum signal reflection, the total loading seen by the

active device output is 25-Ω as the 50-Ω output matching condition. If each Gm-cell is also designed to be with a 25-Ω optimal load-line RL, as shown in Fig. 4.3, 50-Ω conjugate match and optimal load-line match is simultaneously achieved. Therefore, minimum output signal reflection and PA maximum output power efficiency can be accomplished at the same time.

Note that this is impossible in the case of narrowband class-AB PA, which must trade the output 50-Ω matching and the PA maximum output power efficiency, since the optimal load-line impedance is usually much smaller than 50-Ω.

Finally, each output power of each Gm-cell (Pout_each) and the total output power appear at the output port (Pout_total) can be derived as

2

4.2.3. Input and Output Line Design

Fig. 4.4 is the distributed amplifier architecture whose input and output lines are synthesized by lumped devices. In such manner, the input and output lines are named as the artificial lines.

Fig. 4.4. Distributed amplifier with artificial line.

From Fig. 4.4, the characteristic impedance of Zo of the line is

(

)

o 1 1 , 1

2 ^{⋅ ⋅}

= Z ± + _{Z Y} ≈ _Y^Z _{Z Y} >>

Z if . (4.4) To achieve 50-Ω matching, the characteristic impedance Zo of the line is designed to be 50-Ω. The terminal resistor Rt at the end of the line is also 50-Ω to ensure no signal reflection back to the input and output port.

There are three configurations for the artificial lines (Z and Y), namely low-pass line, high-pass line, and band-pass line, as shown in Fig. 4.5. From Fig. 4.4, it can be observed that the overcome of the bandwidth limitation of this architecture comes from the fact that the input and output parasitic capacitances of the Gm-cell are actually parts of the shunt Y devices.

That is, the parasitic capacitances are absorbed into the input and output line, causing entirely no degradation on the circuit operation speed. Therefore, until the cutoff frequency of the line itself is approached, the input and output impedance remains constant and equal to Zo, and the overall operation bandwidth is controlled solely by the input and output lines. It is obvious that the band-pass line structure is the most convenient way to control the overall band-pass type bandwidth.

(a)

(b)

(c)

Fig. 4.5. Detailed artificial line structure and corresponding design equations of (a) low-pass line, (b) high-pass line, and (c) band-pass line.

4.2.4. Design Principle of the UWB Distributed Amplifier

First of all, the optimal load-line (RL) condition of each Gm-cell is designed as the 25-Ω, as shown in Fig. 4.3. In this case, conjugate matching condition and maximum output power efficiency condition can be simultaneous achieved. Therefore, minimum signal reflection and excellent power efficiency can be guaranteed.

Once the optimal load-line RL is set, the size and bias of the active devices is set. Also, the output power of each Gm-cell is defined, as shown in (4.2). Therefore, the input and output impedance of the active devices is defined. With the information of the input and output capacitances, along with the bandwidth specification, the input and output artificial line can be designed, according to Fig. 4.5.

Finally, from the output power specification, the number of stages can be defined, according to (4.3), and the ultra-wideband distributed amplifier is ready to work.