New Proposed Cross-Coupled-SCR ESD Protection Scheme

current path needs to be reduced. In this new proposed ESD protection design, the SCR path is established directly from one differential input pad to the other differential input pad without adding any extra device. The four ESD protection diodes at the differential input pads in the conventional double-diode ESD protection scheme, which include two P+/N-well diodes (DP) and two N+/P-well diodes (DN), are reserved in the new proposed design, but the placement is changed. Fig. 2.11 illustrates the concept of the proposed ESD protection scheme. As illustrated in Fig. 2.11(a), by merging DP1 (P+/N-well diode for RF IN1 pad) and DN2 (N+/P-well diode for RF IN2 pad) together, an SCR path from RF IN1 pad to RF IN2 pad can be established for pin-to-pin ESD protection without adding any extra device. Similarly, DP2 (P+/N-well diode for RF IN2 pad) and DN1 (N+/P-well diode for RF IN1 pad) can be merged together to form an SCR path from RF IN2 pad to RF IN1 pad, as illustrated in Fig.

2.11(b). Since DP1, DN1, DP2, and DN2 still exist, the pad-to-VDD and pad-to-VSS ESD current paths are not altered.

Fig. 2.12 shows the circuit schematic of the differential LNA with the new proposed ESD protection scheme of cross-coupled SCR. P-STSCR1 is placed close to the RF IN1 pad to provide efficient pin-to-pin ESD current path from the RF IN1 pad to the RF IN2 pad.

Similarly, P-STSCR2 is placed close to the RF IN2 pad to provide efficient ESD current path from the RF IN2 pad to the RF IN1 pad under pin-to-pin ESD stresses. To achieve the total parasitic capacitance of 300 fF at each differential input pad, the anode and cathode diffusion regions of P-STSCR1 and P-STSCR2 are all drawn as 60 μm × 2.4 μm. In the proposed ESD protection scheme, the PS-mode ESD current path for the RF IN1 (RF IN2) pad is provided by DP1 (DP2) embedded in P-STSCR1 (P-STSCR2) and the power-rail ESD clamp circuit. The ND-mode ESD current path for the RF IN1 (RF IN2) pad is provided by the power-rail ESD clamp circuit and DN1 (DN2) embedded in P-STSCR2 (P-STSCR1). Under pin-to-pin ESD stresses, the ESD current paths between the differential input pads are provided by the cross-coupled SCR with P-STSCR1 and P-STSCR2. To enhance the turn-on speed, the P+

trigger diffusions are also inserted into P-STSCR1 and P-STSCR2. Since P-STSCR1 and P-STSCR2 are the same devices as that used in the power-rail ESD clamp circuit, the ESD detection circuit in the power-rail ESD clamp circuit can also serve as the ESD detection circuit for the cross-coupled SCR. By connecting the P+ trigger diffusions to the output of the ESD detection circuit in the power-rail ESD clamp circuit, P-STSCR1 and P-STSCR2 can be quickly turned on to provide efficient pin-to-pin ESD protection.

(a)

(b)

Fig. 2.11. Establishing the SCR paths between the differential input pads by combining (a) DP1

(P+/N-well diode for RF IN₁ pad) with DN2 (N+/P-well diode for RF IN₂ pad), and (b) DP2 (P+/N-well diode for RF IN₂ pad) with DN1 (N+/P-well diode for RF IN₁ pad).

Fig. 2.12. Differential LNA with proposed ESD protection scheme of cross-coupled SCR.

2.4.2. Experimental Results

The differential LNA with the new proposed cross-coupled-SCR ESD protection scheme has been fabricated in a 130-nm CMOS process. The chip micrograph of the differential LNA with cross-coupled-SCR ESD protection scheme is shown in Fig. 2.13. It has the same chip area and power consumption as the differential LNA with double-diode ESD protection scheme.

Fig. 2.13. Chip micrograph of differential LNA with proposed cross-coupled-SCR ESD protection.

The measured RF performance of the differential LNA with cross-coupled-SCR ESD protection scheme is compared with those of the original differential LNA without ESD protection in Figs. 2.14 - 2.17. To compare the input matching conditions, the measured S11-parameters of these two differential LNAs are shown in Fig. 2.14. It is observed that the operating frequency of the differential LNA with cross-coupled-SCR ESD protection scheme is shifted from 5 GHz to 4.8 GHz. At 4.8-GHz, the measured S11-parameter is -26.3 dB. The shift in the operating frequency is due to the lack of RF model for SCR device in the given CMOS process. The macro model of SCR was ever reported to simulate its turn-on mechanism during ESD stress [63], [64]; however, the small-signal model of SCR in RF circuit operation condition is still scarce. If the precise RF model of SCR device in the desired RF frequency band can be obtained, the input matching network for LNA can be well co-designed with the SCR device.

Fig. 2.14. Measured S₁₁-parameters of differential LNA with the proposed cross-coupled-SCR ESD protection scheme, and the original differential LNA without ESD protection.

Fig. 2.15 compares the measured power gains (S21-parameters) of these two differential LNAs. At 4.8 GHz, the S21-parameter of differential LNA with cross-coupled-SCR ESD protection scheme is 17.2 dB. The measured S22-parameters of these two differential LNAs are compared in Fig. 2.16. The S22-parameter of differential LNA with cross-coupled-SCR ESD protection scheme is -8 dB at 4.8 GHz. Satisfactory reverse isolation is also achieved in differential LNA with cross-coupled-SCR ESD protection scheme, where the S12-parameter is

differential LNAs. At 4.8 GHz, the noise figure of differential LNA with cross-coupled-SCR ESD protection scheme is 3.58 dB. As compared with the original differential LNA without ESD protection, the minimum noise figure of differential LNA with cross-coupled-SCR ESD protection scheme is somewhat increased. The increase in the noise figure is attributed to the parasitic effects of ESD protection devices with the overlapped wide metal lines in layout, which are connected between the differential input pads and the cross-coupled SCR devices.

Fig. 2.15. Measured S₂₁-parameters of differential LNA with the proposed cross-coupled-SCR ESD protection scheme, and the original differential LNA without ESD protection.

Fig. 2.16. Measured S22-parameters of differential LNA with the proposed cross-coupled-SCR ESD protection scheme, and the original differential LNA without ESD protection.

4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 Fig. 2.17. Measured noise figures of differential LNA.

The HBM and MM ESD levels of differential LNA with the proposed cross-coupled-SCR ESD protection scheme under different test pin combinations are also listed in Table 2.1. Since the PS-mode ESD current paths are the same for the two ESD-protected LNAs, their PS-mode ESD levels do not have significant difference. However, the ND-mode ESD robustness of differential LNA with cross-coupled-SCR ESD protection scheme is lower than that of differential LNA with double-diode ESD protection scheme, because DN1 embedded in P-STSCR2 is placed close to the RF IN2 pad instead of the RF IN1

pad. Thus, VVSS_Bus in (2.6) and the routing resistance between DN1 and the RF IN1 pad are increased in the differential LNA with cross-coupled-SCR ESD protection scheme.

Consequently, the ND-mode ESD robustness is degraded in this LNA with cross-coupled-SCR ESD protection scheme.

The pin-to-pin ESD current path in the differential LNA with cross-coupled-SCR ESD protection scheme is illustrated in Fig. 2.18. The voltage drop along the pin-to-pin ESD current path is

1 1 2

Pin to Pin P STSCR P STSCR to RFIN

V _{− −} =V ₋ +V _{− − −} (2.9) where VP-STSCR1 and VP-STSCR1-IN2 are the voltage drops across P-STSCR1 and the metal line between P-STSCR1 and the RF IN2 pad, respectively. As compared with (2.7), the voltage drop along the pin-to-pin ESD current path is substantially reduced. Thus, the pin-to-pin ESD robustness is significantly improved in differential LNA with the new proposed cross-coupled-SCR ESD protection scheme. The ESD test result shows that the differential LNA with cross-coupled-SCR ESD protection scheme can sustain pin-to-pin ESD stresses of

over 8-kV HBM and 800-V MM.

Fig. 2.18. ESD current path in differential LNA with the proposed cross-coupled-SCR ESD protection scheme under pin-to-pin ESD stresses.

Table 2.2 summarizes the measured performances of the original differential LNA without ESD protection and the differential LNA with the new proposed cross-coupled-SCR ESD protection scheme, and compares their performances to those of the prior CMOS differential LNAs. The proposed ESD-protected differential LNA in this work exhibits excellent ESD robustness as compared with the other differential LNAs, especially in the pin-to-pin ESD stress.

2.5. Summary

A new ESD protection scheme for differential input pads has been proposed and successfully verified to protect the differential LNA. Realized with the cross-coupled SCR, the proposed ESD protection scheme can significantly reduce the voltage drop along the ESD current path under the pin-to-pin ESD test, which is the most critical ESD-test pin combination for the differential input stage with the conventional double-diode ESD protection scheme. With lower voltage drop along the ESD current path, the internal circuits can be efficiently protected against ESD damages. Verified in a 130-nm CMOS process,

pin-to-pin ESD robustness of differential LNA with the proposed cross-coupled-SCR ESD protection scheme has been substantially improved, as compared to that of differential LNA with the conventional double-diode ESD protection scheme. With the evolution of CMOS technology, the gate-oxide breakdown voltage becomes lower, which indicates that reducing the voltage drop along the ESD current path becomes more important for ESD protection design in advanced nanoscale CMOS processes. To achieve good RF performance and high ESD robustness simultaneously, the proposed ESD protection scheme in this work can be well co-designed with the differential LNA.

Table 2.2

Comparison on ESD Robustness Among CMOS Differential LNAs

Technology f0

Chapter 3

Optimization on SCR Device With Low Capacitance