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Chapter 1 Introduction

1.4 Thesis Organization

Chapter 2 describes the detailed specification of IEEE 802.15 Task Group 3a, design consideration of the UWB frequency synthesizer, and the proposed a 3.1~10.6 GHz UWB full-band frequency synthesizer is introduced. In Chapter 3, the circuit components of the phase-lock-loop are considered: phase and frequency detector, charge pump, and two-stage quadrature ring oscillator. The system simulation of a phase-lock-loop is also brought up. The chapter 4 shows the implementation of the circuits in phase-lock-loop. The design consideration of each component would be illustrated and theoretic analyzed. It would be made together with simulation results. Finally, the conclusion and future work are presented in chapter 5.

Chapter 2

A 3.1~10.6 GHz CMOS Frequency Synthesizer

To get a thorough understanding of the UWB system, the physical layer proposal for IEEE 802.25.3a is introduced and analyzed. The system design consideration, the theoretical analysis, as well as architecture of the proposed frequency synthesizer are discussed and presented in chapter 2.

2.1 Multi-Band OFDM Physical Layer Proposal for IEEE 802.15 Task Group 3a

The IEEE 802.15 TG3a [8] specifies the unlicensed 3.1~10.6 GHz UWB band for short-range and high data-rate communications. The specified frequency width 7.5 GHz spectrum is divided into 5 groups and 14 bands with spacing 528MHz as shown below in figure 2.1.

3432 3960 4488 5016 5544 6072 6600 7128 7656 8184 8712 9240 9768 10296

1st Group 2nd Group 3rd Group 4th Group 5th Group

MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz

#1 #2 #3 #4 #5 #6 #7 #8 #9 #10 #11 #12 #13 #14

7128MHz

528MHz 4.125MHz

#8

Figure 2.1 Frequency planning of MB-OFDM UWB systems

The band frequencies are given as follow: [9]

Band central frequency = 2904+528×Nb(MHz) Nb =1...14 (2-1) = 528×Nb'(MHz) Nb'=6.5...19.5

(2-2) where N represents band numbers, and b N represents the numbers of spacing frequency. b' Band #1~ Band #3 are used for Mode 1 application (mandatory mode), while Mode 1 and Band #6~ Band #9 are as Mode 2 application (optional mode). The remaining channels are reserved for future used. The UWB system provides a wireless PAN with data payload communication capabilities of 55, 80, 110, 160, 200, 320, and the fastest 480 Mb/s. It incorporates orthogonal frequency division multiplexing (OFDM) modulation using quadrature phase shift keying (QPSK), a technique that uses multiple carriers to mitigate the effect of multipath path fading. In order to satisfy the QPSK application, the signals in UWB system are different from conventional communication system. Quadrature phase signals must be applied in whole UWB system surely including frequency synthesizer.

The divided bands bandwidth is 528 MHz which is also divided into 128 sub-carriers resulting in a sub-carrier bandwidth is 4.125 MHz as shown in figure 2.1. Among the 128 sub-carriers, 100 tones carry payload data, 12 pilot tones facilitate coherent detection against frequency offset, 10 guard tones relax filter design and the other 6 null tones carry no

information at all.

The MB-OFDM system adopts a frequency-hopping scheme to provide frequency diversity and multiple accesses. The performance of such MB-OFDM UWB architecture in multipath is fundamentally limited by the energy capture ability because when the TX/RX switches to demodulating the subsequent sub-band [9], [10], [11], it loses any ability to

capture the multipath dispersed energy from the current sub-band. Thus, in order to improve the energy capture, pulsed multiband UWB systems need slower time-frequency hopping, i.e., longer contiguous symbol transmissions in each sub-band. This has naturally led to OFDM instead of pure pulse modulation in each sub-band due to the former’s inherent robustness to multipath.

Figure 2.2 Frequency switching for each symbol of a MB-OFDM UWB burst

Multiple piconet coexistence is enabled in multiband UWB systems by introducing channelization via use of suitably designed frequency-hopping sequences over the set of sub-bands as in fig. 2.2 above—in principle, depending on the channel environment and desired data rates, the hop rate can be slow (multiple symbols sent on one sub-band prior to band switching) or fast (only one symbol sent per sub-band). The frequency-hopping sequences are designed to minimize “collision” events when two users in different piconets simultaneously use the same sub-band—such cases lead to erasure of the transmitted symbols.

Thus, the number of simultaneously operating piconets that can be supported by this approach depends on the availability of frequency-hopping sequences with one coincidence property. A guard interval of 9.47ns (5/528MHz) is given as TX/RX switching time, which essentially specifies the maximum frequency synthesizer settling time when hopping between

multi-bands.

Therefore, we know the two essential factors for UWB frequency synthesizer different from the conventional synthesizer. That is the fast hopping time for the TX/RX switching time, 9.47ns, and the quadrature phase output signals for QPSK application as TX/RX LO signals.

2.2 Frequency Planning

The architecture of the frequency planning for UWB systems application is quite important. Our frequency planning for MB-OFDM UWB application provides a great improvement of decreasing the chip area and spurious response. This frequency generation scheme makes the third-order unwanted sidebands caused by mixing fall outside the 7.5 GHz spectrum so that the lower spur level is achieved. The third-order frequencies of spurious tones are given as:

f1 = 3⋅fRFfLO and f2 = 3⋅ fLOfRF (2-3) where all the third-order spurious tones are out of the 7.5 GHz spectrum as fig 2.3 below.

As a result of this, the better frequency planning we used, the less circuit components and system disadvantages are revealed. As we mentioned in chapter 1 section 2, the reviews of the UWB frequency synthesizers, all the frequency planning architecture published have the goals to achieve themselves. Some of them want to subtract the number of the too many PLLs to decrease the chip area, some want to reduce the spurious response by subtracting the number of the SSB mixers, and so on ….. Every frequency planning algorithm for UWB frequency synthesizers earns its benefits for their goals, but it also brings the imperfection affecting the other property. Therefore, how to be universally satisfied is a huge challenge to get over. The followings are the frequency planning diagram of the UWB frequency synthesizer.

2.2.1 Frequency Planning Architecture

The frequency planning diagram is to generate the fundamental band at 7128MHz of the 3rd Group. Then we generates the extending frequencies 1584 MHz, 3168 MHz as extending frequency A, and 528 MHz as extending frequency B. The fundamental band can extend to cover 3rd Group by extending frequency B, or cover 1st, 2nd, or 5th Group by using extending frequency B first and then using extending frequency A. It is quite uncomplicated and directly perceived through the senses as shown in fig 2.4 below.

Figure 2.4 The block diagram of proposed frequency planning architecture for UWB applications

For example, if you want to get the frequency band 8184 MHz, you should let the fundamental band 7128MHz subtract the extending frequency B (528 MHz) as band 6600 MHz first. Second, the band 6600 MHz adds the extending frequency A (1584 MHz) to the band 8184 MHz we expected. All the frequency bands can be obtained by the two steps. This is much more simple and convenient to cover full-band spectrum than [5]. The block diagram of the above example frequency algorithm (fig 2.5) is as follow.

6600 7128 7656 8184 8712 9240

3rd Group 4th Group

MHz MHz MHz MHz MHz MHz

#7 #8 #9 #10 #11 #12

+1584MHz

6600 7128 7656 8184 8712 9240

3rd Group 4th Group

MHz MHz MHz MHz MHz MHz

#7 #8 #9 #10 #11 #12

PLL1

-528MHz goal

Figure 2.5 The block diagram of the example frequency algorithm

The advantage of this frequency generation scheme would be discussed and compared with other published architectures in the last session.

2.3 System Design Consideration

UWB frequency synthesizer is quite dissimilar to conventional narrow band ones in some aspect: I/Q output phase, data rate, operating bandwidth, co-existence with other standards… and so on. Therefore, the system design consideration should be modified to get the appropriate features of it. Preliminarily, single-ended circuits take the priority for its low power consumption and smaller chip area as compared to differential ones, though it is liable to suffer from higher noise and second-order distortion.

Figure 2.6 Frequency synthesizer in a MB-OFDM UWB transceiver

Fig. 2.6 above [12] illustrates the role of a UWB frequency synthesizer in an MB-OFDM direct conversion transceiver. As in other wireless systems, the frequency synthesizer has the crucial function of generating the local oscillator (LO) signal that drives the down-converter in the receiver path and the up-converter in the transmitter. There are at least two demanding requirements that make a frequency synthesizer for an MB-OFDM UWB radio significantly different from the widely explored synthesizers for narrow-band wireless systems, which are:

1) the range of frequencies to be generated spans several gigahertz and 2) the time to switch between different band frequencies within a band group should be less than 9.47 ns. This requirement prevents the use of a standard PLL-based synthesizer as a solution for this application.

In addition to the frequency switching speed, the synthesizer’s output LO signal must comply with other requirements to ensure proper operation of the MB-OFDM UWB radio.

The specifications outlined here assume the OFDM parameters and bit error rate (BER) requirements described in [3] for a 480-Mb/s data transmission and an additive white Gaussian noise (AWGN) channel. A quadrature phase-shift keying (QPSK) constellation is considered for the individual sub-carriers. For a packet error rate of 8% with a 1024-byte packet, the target BER when using a coding rate

4

= 3

R is 105, which corresponds to an un-coded BER of approximately 102. The complete characteristics over the entire frequency bands and analysis are discussed below:

(1) Phase Noise

The phase noise from the LO in an OFDM receiver has two different effects on the received symbols. It introduces a phase rotation of the same magnitude in all of the sub-carriers and creates inter-carrier interference (ICI) [13]. The first undesired effect is eliminated by introducing pilot carriers with a known phase in addition to the

information carriers. On the other hand, phase noise produces ICI in a similar way as adjacent-channel interference in narrow-band systems. Assuming that the data symbols on the different sub-carriers are independent, the ICI may be treated as Gaussian noise.

The power spectral density (PSD) of a locked PLL can be modeled by a Lorenzian spectrum described by [13]

where β is the 3-dB bandwidth of the PSD, which has a normalized total power of 0 dB.

The degradation ( D in decibels) in the signal-to-noise ratio (SNR) of the received sub-carriers due to the phase noise of the LO in an OFDM system can be approximated as [14] where T is the OFDM symbol length in seconds (without the cyclic extension), β defines the Lorenzian spectrum described above, and

O S

N

E is the desired SNR for the

received symbols (in a linear scale, not in decibels). For this system, 1 =4.125

T MHz

mentioned parameters, β can be computed with (2-4) and is 7.7 kHz. The corresponding Lorenzian spectrum has a power of -86.5 dBc/Hz @ 1 MHz.

(2) In Phase (I) and Quadrature Phase (Q) Matching

In an OFDM system, the amplitude and phase imbalance between the I and Q channels transform the received time-domain vector into a corrupted vector r , which

consists of a scaled version of the original vector r combined with a term proportional to its complex conjugate r . This transformation can be written as [15]

riq =α⋅r+β⋅r

(2-6) where αand β are complex constants, which depend on the amount of IQ imbalance.

This alteration on the received symbols can have a significant impact on the system performance. The effect of a phase mismatch in the quadrature LO signal on the BER versus SNR performance of the receiver was evaluated considering the system

characteristics. Simulation results for uncoded data over an AWGN channel showed that the degradation in the sensitivity is 0.6 dB for 5° of mismatch.

(3) Spurious Content

As in other communication systems, the most harmful spurious components of an LO signal are those at an offset equal to multiples of the frequency spacing between adjacent bands (in this case, 528 MHz) since they directly up/down convert the

transmission of a peer device on top of the signal of interest, as shown in fig 2.7 below.

It was found that, in order to have a negligible degradation in the sensitivity (0.1 dB); the carrier-to-interferer ratio (CIR) at baseband should be at least 24 dB. In other words, to tolerate the presence of other UWB transmissions that arrive with comparable power at the antenna of the receiver, the synthesizer spurs that appear at frequencies

corresponding to other bands must have an aggregate power of less than -24 dBc. A summary of the UWB frequency synthesizer specifications is given in Table 2.1.

Figure 2.7 Effect of unwanted frequency translation of interferers

Table 2.1 The summary of the UWB frequency synthesizer specification

Band spacing 528 MHz Switching time between

adjacent bands

< 9.47ns Phase noise of the LO

signal

< -86.5 dBc/Hz@1 MHz Aggregate power of spurs

at band frequencies

< -24 dBc Phase I/Q mismatch < 5°

There are two types of spurs in this synthesizer. One type of spur is caused by the frequency mixing with 528MHz in mixer1. Hence, the spurs in the first group will decide those in other groups. The other type of spur is due to mixer2. Although the third-order unwanted sidebands have been prevented by the frequency generation scheme in fig 2.3, fig 2.4, first-order spurious tones must be taken into consideration when the groups are

up/down-converted by mixer2. The first-order spurious tones would be generated at the opposite side of the target band, and it would be placed in the 7.5 GHz spectrum of UWB application. Suppressing the first-order spurs and letting it less than -24 dBc should pay close attention to carefully.

2.4 UWB Frequency Synthesizer Architecture and Operational Principle

The block diagram of the proposed frequency synthesizer is shown in fig 2.8, which consists of two I/Q output PLLs, two SSB mixers, a multiplexer, and a combined output buffer. It generates the fundamental band (7128 MHz) by the ring oscillator of the first PLL and the input reference frequency is 66 MHz produced by a crystal oscillator with low phase noise distortion. In order to cover the frequency spectrum of Group 3rd in UWB application, the spacing frequency 528 MHz is generated by the cascaded dividers (included a quadrature divider-by-3). The frequency spectrum of Group 3rd (included 6600 MHz, 7128 MHz, and 7656 MHz) would come into existence by the first SSB mixer1. The output of the Group 3rd would send to the output buffer.

528MHz

Figure 2.8 The proposed 3.1~10.6 GHz frequency synthesizer for MB-OFDM UWB application

The other frequency spectrum of Group 1st, 2nd, 4th, and 5th are produced at the output of the second SSB mixer2. The extending frequency of 1584 MHz and 3168 MHz are generated by the VCO’s output and the connected divider-by-2. Through the LO signal of the 1584MHz or 3168 MHz, the frequency spectrum of the Group 2nd, 4th or Group 1st, 5th would come into existence at the SSB mixer2. The output of SSB mixer2 would also send to the output buffer, and it would be combined with the output of SSB mixer1. The unique output should be constructed for an exact and complete frequency synthesizer. Finally, it would be a single output and full-band frequency synthesizer for MB-OFDM UWB application. The frequency spectrum generation scheme as the block diagram would be shown in fig 2.9 below.

528MHz

3432 3960 4488 5016 5544 6072 6600 7128 7656 8184 8712 9240 9768 10296

1st Group 2nd Group 3rd Group 4th Group 5th Group

MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz

#1 #2 #3 #4 #5 #6 #7 #8 #9 #10 #11 #12 #13 #14

Figure 2.9 The block diagram of the frequency spectrum generation scheme

2.5 Discussion and Comparison

As we mentioned in chapter 2 section 2, the better frequency planning we used, the less circuit components and system disadvantages are revealed. In the followings, the frequency planning architecture for MB-OFDM UWB applications would be compared with previous works at system level. Each frequency planning architecture has its own logical thinking to improve some of the frequency synthesizer’s performance. However, in order to reach the goal covering the 7.5 GHz frequency spectrum and satisfying the UWB specifications, there must be some cost. How to let the cost down and achieve the same purpose is the great issue for us to pay efforts on it. Table 2.2 is the comparison of the proposed frequency planning architecture with the illustrated works in chapter 1.

Table 2.2 The summary and comparison of the UWB frequency synthesizer characteristics

This work [4]

The frequency planning architecture at system level of this work has superior advantages on low spurious response, uncomplicated system design, and saving much more chip area for UWB application. As compared to [4], the SSB of this work does not need to operate in very wide bandwidth (over 5 GHz frequency spectrum), and dividers in [4] is also a difficulty to realize. The architecture of [5] must waste an extra SSB mixer to realize the whole system.

That causes not only chip area consumption but the lower spurious response. [6] is realized for the past UWB frequency planning specification, and the chip area of [6] is huge because of its poly phase filters. The I/Q mismatch problem is another issue for [6] because the poly phase filter cannot operate exactly at wide frequency range. The SSB mixer in PLL also might cause extra problem in locking and spurious consideration in [6]. The [7] uses extra SSB mixer causing the issue as [5], but [7] only need one PLL. Although this work has more one PLL, we use two-stage ring oscillator to save the chip area. Without the passive component inductor, the chip area would even be smaller than [7]. Finally, in all the frequency generation schemes, this work is the most directly perceived through the sense, and the system is the most uncomplicated to realized.

Chapter 3

Phase Lock Loop Theory and System Simulation

Among the circuit component of frequency synthesizer, the phase-lock-loop is the major part of it. Synthesizers used in commercial radio receivers are largely based on

phase-lock-loops ( PLLs). Transceivers’ LO signals are generally produced by it. Because of this, the PLLs play an important role in the radio communications.

Phase-lock-loop (PLL) is a control system that generates a signal that has a fixed relation to the phase of a "reference" signal. A phase-lock-loop circuit responds to both the frequency and the phase of the input signals, automatically raising or lowering the frequency of a controlled oscillator until it is matched to the reference in both frequency and phase. A phase-lock-loop is an example of a control system using negative feedback. It is widely used in radio, telecommunications, computers and other electronic applications. They may generate stable frequencies, recover a signal from a noisy communication channel, or distribute clock timing pulses in digital logic designs such as microprocessors. Since a single integrated circuit can provide a complete phase-lock-loop building block, the technique is widely used in

modern electronic devices, with output frequencies from a fraction of a cycle per second up to many gigahertz. The next section is the general consideration of the PLLs.

3.1 Basic Considerations

Phase Noise

A purity of spectrum synthesized output signal is the most important requirement in all

wireless communication systems. Ideally, the output spectrum of a frequency synthesizer should be a pure tone at the desired frequency, as shown in fig 3.1 (a) below. In the time domain, the output can be expressed as:

vout( )t = ⋅A cos(ω0t)

(3-1) However, due to random amplitude and phase fluctuations, the actual output becomes:

[ ] [ ]

( ) ( ) cos 0 ( )

out t

v = At ⋅ ω tt

(3-2) Where ε( )t represents amplitude fluctuations and θ( )t represents phase fluctuations. The actual output spectrum exhibits “skirts” around the desired carrier impulse in the frequency domain, as shown in fig 3.1 (b) below. Because the amplitude fluctuations can be removed or greatly reduced by a limiter, the phase fluctuations, expressed in terms of phase noise, become a bigger and dominant concern in frequency synthesizer design. The phase fluctuations could

(3-2) Where ε( )t represents amplitude fluctuations and θ( )t represents phase fluctuations. The actual output spectrum exhibits “skirts” around the desired carrier impulse in the frequency domain, as shown in fig 3.1 (b) below. Because the amplitude fluctuations can be removed or greatly reduced by a limiter, the phase fluctuations, expressed in terms of phase noise, become a bigger and dominant concern in frequency synthesizer design. The phase fluctuations could