• 沒有找到結果。

Chapter 3 Phase Lock Loop Theory and System Simulation

3.1 Basic Considerations

Phase Noise

A purity of spectrum synthesized output signal is the most important requirement in all

wireless communication systems. Ideally, the output spectrum of a frequency synthesizer should be a pure tone at the desired frequency, as shown in fig 3.1 (a) below. In the time domain, the output can be expressed as:

vout( )t = ⋅A cos(ω0t)

(3-1) However, due to random amplitude and phase fluctuations, the actual output becomes:

[ ] [ ]

( ) ( ) cos 0 ( )

out t

v = At ⋅ ω tt

(3-2) Where ε( )t represents amplitude fluctuations and θ( )t represents phase fluctuations. The actual output spectrum exhibits “skirts” around the desired carrier impulse in the frequency domain, as shown in fig 3.1 (b) below. Because the amplitude fluctuations can be removed or greatly reduced by a limiter, the phase fluctuations, expressed in terms of phase noise, become a bigger and dominant concern in frequency synthesizer design. The phase fluctuations could be attributed to either the external noise at the frequency-tuning input of the oscillator or the noise sources such as thermal, shot, or flicker noise of the devices in the oscillator.

(a) (b)

Figure 3.1 The (a) ideal, (b) actual output spectrum of an oscillator

The phase noise limits the quality of the synthesized signal. In order to quantify the phase noise, the total noise power within a unit bandwidth at an offset frequency (Δω) from the carrier frequency (ω0) is compared with the carrier power. As shown in fig 3.1 (b) above,

this quantity is defined as:

{ }

10 log sideband( 0 ,1 )

carrier

P Hz

L P

ω ω

ω + Δ

Δ = ⋅ ⎢ ⎥

⎣ ⎦ (dBc / Hz) (3-3) Where Psideband0+ Δω,1Hz) represents the single sideband noise power within a 1Hz bandwidth at an offset frequency (Δω).

Fig 3.2 below illustrates the impact of the oscillator or synthesizer phase noise in both the receive path and transmit path of a transceiver. As depicted in fig 3.2 (a), in the receive path, the weak desired signal is accompanied by a larger interferer in the adjacent channel.

Ideally, the received RF signal is down-converted with a pure LO signal into the desired pure IF signal and the down-converted interferer can be easily filtered. However, in fact, there exists a phase noise skirt around the LO signal. After down-conversion, the weak desired signal could be corrupted by the tail of the interferer spectra and even possibly canceled if the phase noise skirt is too large. It degrades the SNR of the desired signal. In the transmit path, the weak nearby signal of interest can be corrupted by the tail of the large-power transmitted signal, as shown in fig 3.2 (b).

(a) (b)

Figure 3.2 The effect of phase noise in (a) the receive path, (b) the transmit path

Therefore, the output spectrum of the LO or synthesizer must be extremely sharp, and a set of stringent phase noise requirements must be achieved so as to satisfy the maximum blocking signal power specified in the wireless communication system.

Settling Time

Transient behavior of the frequency synthesizers is also a critical performance parameter.

A change in the division ratio of divider or in the reference frequency would result in a loop transient. Every time a different division ratio or reference frequency is set for channel selection, the synthesizer requires a finite time to lock to the new frequency. The synthesizer needs settling to certain accuracy within the specification of the wireless standard and the overall required time is called “settling time” (also called “locking time”). Also, one thing worth mentioning is that the locking speed requirement of synthesizers is even more stringent for a fast frequency-hopping spread-spectrum system. However, in the UWB specifications, the switching time to the other frequency bands is only 9.47 ns, it is impossible for PLL to lock in such a tiny time. Therefore, changing the frequency bands by settling time of one PLL is not a solution for UWB application. The detailed analysis to model the loop settling behavior will also be discussed in later sections.

Tuning Range

The basic requirement set for a frequency synthesizer by any wireless communication system is that the synthesizer must be able to generate all required frequencies of the system with a sufficient accuracy for channel selection. Therefore, the voltage-controlled oscillator (VCO) and the prescaler must be carefully designed so as to cover the required dynamic frequency range of the synthesizer. However, in our frequency planning architecture, the output frequency of the PLLs should be fixed and unique. This is because of the settling time

of PLL cannot satisfy the UWB specifications (9.47ns).

Spurious Response

Apart from the phase noise, the other key parameter affecting the purity of spectrum synthesized output signal is the relatively high-energy spurious tones (also called spurs), appearing as spikes above the noise skirt, as shown in fig 3.3 (a) below.

Figure 3.3 The (a) spurs, (b) effect of spurs in receive path

Any systematic disturbance on the tuning input of the oscillator will cause the periodic phase variation and thus modulate the synthesized output. In the frequency domain, it manifests itself as the undesired tones at the upper and lower sideband of the carrier. These tones can be quantified by the difference between the carrier power and the spurious power at certain frequency offset in the dBc unit. As illustrated in fig 3.3 (b), similar to the case of phase noise, if a large interferer is close to the weak desired signal and the LO signal has spurs, then both the desired signal and interferer will be mixed down to the IF. If the spacing between the desired signal and the interferer is equal to that between the LO signal and the spur, the spur in the down-converted interferer falls into the center frequency of the desired down-converted signal, and then also degrades the SNR performance. The most common type

of spur is the reference spur that appears at multiples of the comparison frequency. Due to the non-ideal switching nature of the synthesizer, it may cause reference frequency feed-through, and then the resulting periodic ripples on the tuning input of the oscillator induces the reference spurs at the output, as shown in fig 3.4 below.

Figure 3.4 The feed-through of the reference frequency

The basic considerations would be analyzed and considered in the later section, and it also be the most important issues in the PLL design specifications. The performance of the frequency synthesizer is compared with them. How to achieve the specifications the frequency synthesizer needed is a tough task.