Conclusion

Chapter 2 has presented a new sub-1-V and a new sub-1-V curvature-compensated CMOS bandgap references. The new sub-1-V CMOS bandgap voltage reference with VREF of 238.2 mV and temperature coefficient of 58.1 ppm/°C, which consumes a maximum current of 28 μA at 0.85 V supply, has been presented.

The sub-1-V operation of the bandgap reference has been successfully achieved in this work without using the low-threshold-voltage devices. Moreover, other techniques to achieve sub-1-V operation have been described, such as low voltage startup circuit and the lower common-mode input range of the amplifier by using the resistive subdivision method. Without using low-threshold-voltage device, the proposed bandgap reference circuit can be implemented in general CMOS technology.

The new proposed sub-1-V curvature-compensated bandgap voltage reference with VREF of 536 mV and temperature coefficient of 19.5 ppm/°C under supply voltage of 0.9 V was presented, which consumes a maximum current of 50 μA at 0.9 V. The sub-1-V operation of the curvature-compensated bandgap voltage reference has been successfully verified in silicon. The new proposed curvature-compensated technique used to improve the temperature coefficient of sub-1-V bandgap voltage reference can be implemented in general CMOS technology.

Table 2.1

Comparison among the Low Voltage Bandgap References

Table 2.2

Comparison among the Curvature-Compensated Bandgap Voltage References

Fig. 2.1. The traditional bandgap reference circuit in CMOS technology.

Fig. 2.2. The new proposed bandgap reference circuit for sub-1-V operation.

Fig. 2.3. Complete schematic of the new proposed bandgap reference.

Fig. 2.4. Small signal model of the proposed bandgap reference.

Fig. 2.5. Simulated reference voltage of the proposed bandgap reference with different supply voltages.

Fig. 2.6. Simulated minimum supply voltage of the proposed bandgap reference.

Fig. 2.7. Die photo of the new proposed bandgap reference circuit fabricated in a 0.25-μm CMOS process.

Fig. 2.8. Dependence of output reference voltage on the temperature under different VDD voltage levels.

Fig. 2.9. Dependence of output reference voltage on the VDD supply voltage under different temperatures.

Fig. 2.10. Dependence of PSRR on the frequency under different input sinusoidal amplitudes.

Fig. 2.11. The relationship between nonlinear temperature-dependence VBE and linear temperaturedependence VPTAT on the output reference voltage of bnadgap voltage reference circuit. The multiplying VPTAT with Kfactor is used to compensate the VBE.

Fig. 2.12. The new proposed sub-1-V curvature-compensated bandgap voltage reference circuit.

Fig. 2.13. The cross-sectional view of parasitic vertical NPN BJT in CMOS technology.

Fig. 2.14. Complete circuit of the new proposed curvature-compensated bandgap voltage reference for sub-1-V operation.

Fig. 2.15. Simulated output reference current (I^REF) of the new proposed bandgap voltage reference under different temperatures from 0 to 100 °C with supply voltage of 1 V.

Fig. 2.16. Die microphotography of the new proposed curvature-compensated bandgap voltage reference fabricated in a 0.25-μm CMOS process.

Fig. 2.17. The measured dependence of output reference voltage on the operating temperature under different supply voltage levels.

Fig. 2.18. The measured dependence of output reference voltage on the supply voltage under different operating temperatures.

CHAPTER 3

Impact of Gate-Oxide Reliability on CMOS Analog Amplifiers in Nanoscale CMOS Technology

The influences of gate-oxide reliability on analog amplifiers are investigated with common-source amplifier and operational amplifier in a 130-nm low-voltage CMOS process. The test conditions of this work include the DC stress, AC stress with DC offset, and large-signal transition stress under different frequencies and signals.

After overstresses, the small-signal parameters, such as small-signal gain, unity-gain frequency, phase margin, and output DC voltage levels, are measured to verify the impact of gate-oxide reliability on circuit performances of the analog amplifiers. The impact of soft and hard gate-oxide breakdowns on common-source amplifiers with non-stacked and stacked diode-connected active load structures has been analyzed and discussed. The hard breakdown has more serious impact to the analog amplifiers.

3.1. Single Amplifier

3.1.1. Background

The reduction of power consumption has become increasingly important to portable products, such as mobile phone, notebook, and flash memory. In general, the most common and efficient way to reduce the power consumption in CMOS very large scale integrated circuits (VLSI) is to reduce the power-supply voltage. To reduce the power consumption in CMOS VLSI systems, the standard supply voltage trends to scale down from 2.5 to 1 V. Thus the gate-oxide thickness of the MOS transistor will be become thin to reduce nominal operation voltage (power-supply voltage). In general, the VLSI productions have lifetime of 10 years, but the thin gate-oxide

thickness of the MOS transistor has many problems, such as gate-oxide breakdown, tunneling current, and hot carrier effect that will degrade the lifetime of the MOS transistor. Therefore, to improve the gate-oxide reliability of MOS transistor and to investigate the effect of gate-oxide breakdown on CMOS circuit performances will become more important in the nanometer CMOS technology.

The occurrence of gate-oxide breakdown during the lifetime of CMOS circuits cannot be completely ruled out. The exact extrapolation of time-to-breakdown at operating conditions is still difficult, since the physical mechanism governing the MOSFET gate dielectric breakdown is not yet fully modeled. It was less of a problem for the old CMOS technologies, which had thick gate oxide. However, because the probability of gate-oxide breakdown strongly increases with the decreasing oxide thickness [76], [77], the CMOS circuit in nano-scale technologies could be insufficiently reliable. The defect generation leading to gate-oxide breakdown and the nature of the conduction after gate-oxide breakdown has been investigated [49]-[52], [76]-[83], which point out that the gate-oxide breakdown will degraded the small-signal parameters of the MOS transistor, such as transconductance, gm, and threshold voltage, VTH. Recently, some studies on the impact of MOSFET gate-oxide breakdown on circuits have been reported [49]-[52], [78], [79]. In [49], it was demonstrated that the digital circuits would remain functional beyond the first gate-oxide hard breakdown. A soft gate-oxide breakdown event in dynamic CMOS digital circuit relying on the uncorrected soft nodes may result in some failure of the circuit [50]. The gate-oxide breakdown on RF circuit has been studied [51]. The impact of gate-oxide breakdown on SRAM stability was also investigated [52], [78].

Some designs of analog circuits [84], [85] and the mixed-voltage I/O interface [86], [87] indicate that gate-oxide reliability is a very important design consideration in CMOS integrated circuits. The impact of MOSFET gate-oxide reliability on the CMOS operational amplifiers had been investigated and simulated [88]. The performances of analog circuits strongly depend on the I-V characteristics of MOSFET devices, because the small-signal parameters of MOSFET device are determined by the biasing voltage and current of MOSFET devices. The small-signal gain and frequency response of analog circuits in CMOS processes are determined by the transconductance gm and output resistance ro of MOSFET devices. The transconductance g and output resistance r of MOSFET device can be expressed by

(

^-

) (

^2-D

)

where μ is the mobility of carrier, L denotes the effective channel length, W is the effective channel width, Cox is the gate oxide capacitance per unit area, VTH is the threshold voltage of MOSFET device, VGS is the gate-to-source voltage of MOSFET device, VA is the Early voltage, and the current ID is the drain current of MOSFET device. Comparing the equations (3.1) and (3.2), the drain current ID is the key factor for analog circuits in CMOS process. Therefore, the performances of analog circuits in CMOS processes are dominated by the drain currents of MOSFET devices. The drain current ID of MOSFET device operated in saturation region can be expressed by

1 2

The channel-length modulation and body effect of MOSFET devices are not included in equation (3.3). The threshold voltage and gate-to-source voltage of MOSFET device are the important design parameters in equation (3.3). However, the gate-oxide overstress of MOSFET will cause degrade the device characteristics of MOSFET.

Therefore, gate-oxide breakdown can be expected to have serious impact on the performances of analog circuits in nanoscale CMOS technology.

In this work, the influence of gate-oxide reliability on common-source amplifiers with diode-connected active load is investigated with the non-stacked and stacked structures in a 130-nm low-voltage CMOS process under the DC stress, AC stress with DC offset, and large-signal transition stress. The small-signal gain, phase margin, unity-gain frequency, and output DC voltage level of the two common-source amplifiers are measured and compared under the different stresses in analog and digital applications. The impact of soft and hard breakdowns on these two amplifiers has been discussed and analyzed.

3.1.2. Analog Amplifiers

The common-source amplifier is a basic unit in many typical analog circuitry cells, such as level converter and output stage. The common-source amplifiers with the non-stacked and stacked diode-connected active load structures are used to verify the impact of MOSFET gate-oxide reliability on CMOS analog amplifier. The complete circuits of the common-source amplifiers with the non-stacked and stacked diode-connected active load structures are shown in Figs. 3.1(a) and 3.1(b). The common-source amplifiers have been fabricated in a 130-nm low-voltage CMOS process. The normal operating voltage and the gate-oxide thickness (tox) of all MOSFET devices in these two common-source amplifiers are 1-V and 2.5-nm, respectively, in a 130-nm low-voltage CMOS process. The device dimensions of two amplifiers are shown in Table 3.1. The body terminals of the all NMOS and PMOS transistors are connected to ground and power supply voltage, respectively. The small-signal gain, AV_Non-Stacked, of the common-source amplifier with the non-stacked diode-connected active load structure is given by

( )

where the go and gm are the output conductance and transconductance of MOS transistor, respectively. In the MOSFET device, the CGS is the parasitic capacitance between the gate and source nodes, and the CGD is the parasitic capacitance between the gate and drain nodes. The CL is the output capacitive load. The small-signal gain, AV_ Stacked, of the common-source amplifier with the stacked diode-connected active load structure can be written as

( )

gm4+go4+SCGS4, respectively. Before overstress, the small-signal gains of the common-source amplifiers with the non-stacked and stacked diode-connect active load structures are 17.5-dB and 13.2-dB, respectively. The body effect of the NMOS and PMOS transistors in the common-source amplifiers with the non-stacked and stacked diode-connect active load structures is not included in equations (3.4) and (3.5). The phase margin of the two common-source amplifiers is more than 60 degree under output capacitive load of 10 pF. Comparing the common-source amplifiers with

the non-stacked and stacked diode-connected active load structures, the impact of gate-oxide reliability on the CMOS common-source amplifier has been investigated under analog and digital applications.

3.1.3. Overstress Test

The impact of gate-oxide reliability on common-source amplifier needs long-term operation, which may need many years, to measure the performance degradation under the gate-oxide degradation of MOSFET device. In order to accelerate the gate-oxide degradation and understand the impact of gate-oxide reliability on common-source amplifiers with the non-stacked and stacked diode-connected active load structures, the common-source amplifiers with the non-stacked and stacked diode-connected active load structures are statically stressed at supply voltage VDD of 2.5 V. Because the MOS transistors in analog circuits usually work in the saturation region, the gate-oxide breakdown is more likely to occur in conventional time-dependent dielectric breakdown (TDDB). High VGS, VGD, and VDS

of the MOSFET are set to get a fast and easy-to-observe breakdown occurrence for investigating the impact of gate-oxide reliability on the common-source amplifier with diode-connected active load. The advantages of using static stress are the known and well-defined distributions of the voltages in the common-source amplifiers with diode-connected active load and better understanding of the consequences of this stress. After the overstresses, the small-signal parameters of the common-source amplifiers with non-stacked and stacked diode-connected active load structures are re-evaluated on the same operation condition under the DC stress, AC stress with DC offset, and large-signal transition stress.

3.1.3.1. DC Stress

The common-source amplifiers with the non-stacked and stacked diode-connected active load structures are continuously operated in this DC overstress, as shown in Fig. 3.2. The power supply voltage, VDD, and output capacitive load, CL, of the common-source amplifiers with non-stacked and stacked diode-connected active load structures are set to 2.5 V and 10 pF, respectively. The input nodes, VIN_1

and VIN_2, are biased to 0.5 V in order to set the output DC voltage level at 1.25 V under the power supply voltage of 2.5 V. During this DC overstress, the small-signal gain and unity-gain frequency of the common-source amplifiers with the non-stacked and stacked diode-connected active load structures are measured. When those parameters are measured, the input signal of DC 0.5 V at input nodes, VIN_1 and VIN_2, is replaced by the AC small-signal of 200 mV sinusoidal signal (peak-to-peak amplitude) with DC voltage of 0.5 V. The dependence of the small-signal gain on the stress time of the common-source amplifiers with the non-stacked and stacked diode-connected active load structures under the DC stress is shown in Fig. 3.3. The small-signal gain of the common-source amplifier with the non-stacked diode-connected active load structure is degraded by gate-oxide breakdown.

Moreover, the common-source amplifier with the non-stacked diode-connected active load structure does not maintain its amplified function with continuous stress condition under the DC stress, when the stress time is increased. The small-signal gain of the common-source amplifier with the stacked diode-connected active load structure is not changed under the same stress condition even through the stress time up to 2000 minutes. The measured waveforms of the input and output signals in the common-source amplifier with the non-stacked diode-connected active load structure on the different stress times are shown in Figs. 3.4(a), 3.4(b), and 3.4(c). Fig. 3.5 shows the dependence of the unity-gain frequency on the stress time of the common-source amplifiers with the non-stacked and stacked diode-connected active load structures under the DC stress. The bandwidth of the common-source amplifier with non-stacked diode-connected active load structure on the stress time is decreased, but that of the common-source amplifier with the stacked diode-connected active load structure is almost not changed after the stress. The phase margin of the common-source amplifier with the non-stacked diode-connected active load structure on the stress time is varied with gate-oxide breakdown, but that is still stable (phase margin > 45 degree). The dependence of the output DC voltage level on the stress time of the common-source amplifiers with the non-stacked and stacked diode-connected active load structures under the DC stress is shown in Fig. 3.6. The output DC voltage level of the common-source amplifier with the non-stacked diode-connected active load structure on the stress time will be closed to the power supply voltage of 2.5 V, but that of the common-source amplifier with the stacked diode-connected active load structure is not changed after the stress.

The reason, why the circuit performances of the common-source amplifier with the non-stacked diode-connected active load structure, such as small-signal gain, unity-gain frequency, and output DC voltage level, is degraded with the overstress, is summed up that the gate-oxide breakdown will degrade the transconductance (gm), threshold voltage (VTH), and output conductance (go) of the MOS transistor. In equation (3.4), if the small-signal parameters gm, VTH, and go of the MOS transistor are degraded with gate-oxide breakdown, the small-signal gain will be changed. From the equation (3.4), the dominant pole of the common-source amplifier with the non-stacked diode-connected active load structure can be written as

2 1 2 which is dominated by transconductance, gm2, and output capacitive load, CL. Therefore, the unity-gain frequency of the common-source amplifier with the non-stacked diode-connected active load structure will be degraded by gate-oxide breakdown. In this test condition, if the transistors M1 and M2 of the common-source amplifier with the non-stacked diode-connected active load structure are designed to operate in saturation region, the output DC voltage level of the common-source amplifier with the non-stacked diode-connected active load structure can be expressed as

In the equation (3.7), the output DC voltage level, VOUT_1(DC), is function of the VTH(M1) and VTH(M2). Therefore, the output DC voltage level of the common-source amplifier with the non-stacked diode-connected active load structure will be changed with gate-oxide breakdown after the stress.

3.1.3.2. AC Stress with DC Offset

The common-source amplifiers with the non-stacked and stacked diode-connected active load structures are continuously tested in this stress of AC

small-signal input and DC offset, as shown in Fig. 3.7. The input nodes, VIN_1 and VIN_2, of the common-source amplifiers with the non-stacked and stacked diode-connected active load structures are biased to the AC small-signal input of 200-mV sinusoidal signal (peak-to-peak amplitude) with DC offset voltage of 0.5 V under the different frequencies of 100 Hz, 500 kHz, and 1 MHz. The power supply voltage, VDD, and output capacitive load, CL, of the common-source amplifiers with non-stacked and stacked structures are set to 2.5 V and 10 pF, respectively. The measurement setup is used to investigate the relationship between gate-oxide breakdown and different frequencies of input signals in the CMOS analog circuit applications.

The dependence of the small-signal gain in the common-source amplifiers with the non-stacked and stacked diode-connected active load structures on the stress time under the stress of the AC small-signal input with DC offset is shown in Fig. 3.8. The circuit performances of the common-source amplifier with the stacked diode-connected active load structure are not degraded by the stress of the AC small-signal input with DC offset. In the common-source amplifier with the non-stacked diode-connected active load structure, the high-frequency input signal causes a slow degradation on the small-signal gain, but the low-frequency input signal causes a fast degradation on the small-signal gain under the stress of the AC small-signal input with DC offset. The other small-signal performances in the common-source amplifier with the non-stacked diode-connected active load structure under the stress of the AC small-signal input with DC offset have the same change trend as that under the DC stress, but the different frequencies of the input signal will cause the different degradation times. These measured results are consistent to that reported in [90]. The frequency dependence of tBD (time to breakdown) is reasonably understood in terms of the re-distribution of the breakdown species from the anodic interface toward the oxide bulk. These two different frequency regimes correspond to two extreme distributions. When the frequency is very high, the concentration of

The dependence of the small-signal gain in the common-source amplifiers with the non-stacked and stacked diode-connected active load structures on the stress time under the stress of the AC small-signal input with DC offset is shown in Fig. 3.8. The circuit performances of the common-source amplifier with the stacked diode-connected active load structure are not degraded by the stress of the AC small-signal input with DC offset. In the common-source amplifier with the non-stacked diode-connected active load structure, the high-frequency input signal causes a slow degradation on the small-signal gain, but the low-frequency input signal causes a fast degradation on the small-signal gain under the stress of the AC small-signal input with DC offset. The other small-signal performances in the common-source amplifier with the non-stacked diode-connected active load structure under the stress of the AC small-signal input with DC offset have the same change trend as that under the DC stress, but the different frequencies of the input signal will cause the different degradation times. These measured results are consistent to that reported in [90]. The frequency dependence of tBD (time to breakdown) is reasonably understood in terms of the re-distribution of the breakdown species from the anodic interface toward the oxide bulk. These two different frequency regimes correspond to two extreme distributions. When the frequency is very high, the concentration of

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