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[PDF] Top 20 A Framework for the Design of Error-Aware Power-Efficient Fixed-Width BOOTH Multipliers

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A Design Framework for Embedded Linux Drivers

A Design Framework for Embedded Linux Drivers

... generate a driver code skeleton according to user-specified configuration. The driver skeleton is composed of a set of parameterized templates which con- tain coarse-grained ... See full document

6

The Design of  a Multi-Agent Framework for Distributed Hyper-Linking-Based Theorem Proving

The Design of a Multi-Agent Framework for Distributed Hyper-Linking-Based Theorem Proving

... is a refutational deduction method in first-order logic. In this framework, distributed theorem proving is achieved in clause-level by the collaboration of multi- ...solve the given ... See full document

8

Crosstalk-insensitive via-programming ROMs using content-aware design framework

Crosstalk-insensitive via-programming ROMs using content-aware design framework

... Content-Aware Design Framework Meng-Fan Chang, Lih-Yih Chiou, and Kuei-Ann Wen, Senior Member, IEEE Abstract—Various code patterns of a via-programming read only memory (ROM) cause ... See full document

5

The Design and Implementation of a Mobile Agent-Based Framework for Context Aware Computing

The Design and Implementation of a Mobile Agent-Based Framework for Context Aware Computing

... CC/PP framework is based on XML/RDF[9][12]. XML/RDF provides the framework with the basic tools for both vocabulary extensibility, via XML namespaces, and ...interoperability. ... See full document

20

INTRO: the Design of a Social-Mobile Framework for Enhancing the Social Interactions

INTRO: the Design of a Social-Mobile Framework for Enhancing the Social Interactions

... overcome the above problem, a three-layer framework, called INTRO, is designed to cover the interactions in the social activity to the social web ...sites. The three ... See full document

6

Design and characterization of porphyrin sensitizers with a push-pull framework for highly efficient dye-sensitized solar cells

Design and characterization of porphyrin sensitizers with a push-pull framework for highly efficient dye-sensitized solar cells

... into the electron distribution at the frontier and nearby molecular orbitals, we performed quantum-chemical calculations on porphyrins YD14–YD17 using density-functional theory (DFT) at the ... See full document

8

Power-Efficient Pipelined Reconfigurable Fixed-Width Baugh-Wooley Multipliers

Power-Efficient Pipelined Reconfigurable Fixed-Width Baugh-Wooley Multipliers

... Reconfigurable Fixed-Width Baugh-Wooley Multipliers Jin-Hao Tu and Lan-Da Van, Member, IEEE Abstract—In this paper, we propose a pipelined reconfigurable fixed-width Baugh-Wooley ... See full document

10

A Generic Power Management Framework for Location Aware Mobile Computing 施皓榮、江憲坤

A Generic Power Management Framework for Location Aware Mobile Computing 施皓榮、江憲坤

... al., Design Patterns-Elements of Reusable Object- Oriented Software, Addison-Wesley, ...Services for the Wireless Web, New York: John Wiley & Sons, ...Communications of the ACM, ... See full document

2

Design and Implementation of High-Speed and Energy-Efficient Variable-Latency Speculating Booth Multiplier (VLSBM)

Design and Implementation of High-Speed and Energy-Efficient Variable-Latency Speculating Booth Multiplier (VLSBM)

... to the branch predictor used in microprocessors, if a true carry prediction occurs, the multiplier-stall cycles caused by data de- pendence can be ...by the instruction streams in the ... See full document

13

A Hierarchical Framework for Fine-Grained SIP-Based Location-Aware Integrated System

A Hierarchical Framework for Fine-Grained SIP-Based Location-Aware Integrated System

... message. The proxy server will add a Record Router header into the INVITE SIP message when it processing the SIP ...record the related information belong to the Proxy Server into ... See full document

10

A generalized methodology for low-error and area-time efficient fixed-width Booth multipliers

A generalized methodology for low-error and area-time efficient fixed-width Booth multipliers

... 51 have been widely studied. King and Swartzlander [3] analyzed an adaptive error-compensation bias and proposed an n-bit fixed- width multiplier. In [ l , 21, we generalized[r] ... See full document

4

A low-error and area-time efficient fixed-width booth multiplier

A low-error and area-time efficient fixed-width booth multiplier

... In many digital signal processing (DSP) applications such as digital filters [6, 7] and wavelet transform, it is desirable to maintain fixed-width output word through tihe arithmetic ope[r] ... See full document

4

Design of a lower-error fixed-width multiplier for speech processing application

Design of a lower-error fixed-width multiplier for speech processing application

... This novel structure to fixed-width digital FIR filter for speech signal processing has shown with excellent performance in maximum error, average error, and variance [r] ... See full document

4

Low-Error and Area-Efficient Fixed-Width Multiplier by Using Minor Input Correction Vector with Fixed Compensation Circuit

Low-Error and Area-Efficient Fixed-Width Multiplier by Using Minor Input Correction Vector with Fixed Compensation Circuit

... (Review Design of the Multipliers) 文 獻 常 見 幾 種 不 同 固 定 寬 度 乘 法 器 (fixed-width multiplier)架構,其中 Shyh-Jye Jou 等人[2]所提出之誤差補償,使用統計分析 和線性復原分析,在輸入補償(IC)總和直接加 入補償。其優點主要在於速度更快,使用較 ... See full document

12

An optimum algorithm for compacting error traces for efficient design error debugging

An optimum algorithm for compacting error traces for efficient design error debugging

... compact the portion that the bounded compaction approach cannot ...takes the paradigm of binary search for compacting error ...traces. The algorithm not only ensures log 2 ... See full document

11

Accurate Rank Ordering of Error Candidates for Efficient HDL Design Debugging

Accurate Rank Ordering of Error Candidates for Efficient HDL Design Debugging

... 1.0).” The number of times is presented in the “#case_CS” and “#case_PCS” ...when the PCS is used to obtain a debugging priority, in all the design cases, the ... See full document

13

An Efficient Power-Aware Multicast Protocol for Mobile Ad Hoc Networks

An Efficient Power-Aware Multicast Protocol for Mobile Ad Hoc Networks

... Number of members In figure 6, we can know that whatever the speed is fast or slow, our multicast routing pro- tocol PAMP still keeps high packet delivery ra- ...tio. The packet delivery ratio ... See full document

6

A fast and power-saving self-timed Manchester carry-bypass adder for Booth multiplier-accumulator design

A fast and power-saving self-timed Manchester carry-bypass adder for Booth multiplier-accumulator design

... 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits(AP-ASIC2004)i Aug. Consequently, the speed is moderate, which is the average delay time of the MCBA circuit. [r] ... See full document

4

Power-Aware Soft Error Hardening via Selective Voltage Scaling

Power-Aware Soft Error Hardening via Selective Voltage Scaling

... assignments of gate sizes, supply voltages, threshold voltages, and output loads to get better results with smaller area ...avoided, for all benchmarks, all subcircuits finally operate at the highest ... See full document

6

A framework of performance evaluation and error analysis methodology for speech understanding systems

A framework of performance evaluation and error analysis methodology for speech understanding systems

... In this paper, a new framework for performance evaluation and error analysis for speech understanding systems is proposed based on the comparison with the ‘best-mat[r] ... See full document

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