Chapter 7. Conclusions and Future Works
7.2. Future Works
In this dissertation, five I/O circuits realized with low-voltage devices for high-voltage applications have been presented. However, the traditional electrostatic discharge (ESD) protection circuits are not suitable for these applications. In addition, the more robust ESD protection circuits are required in the nanometer processes. Therefore, new ESD protection circuits realized in low-voltage processes must be developed in the future.
Although the DC overstress on the gate oxide is more harmful than AC overstress, the operation frequency becomes higher in the advanced ICs. The AC overstress is also an important issue when the operation frequency is high. Thus, not only the DC overstress on the gate oxide but also the AC overstress must be considered in the high-voltage circuits realized with low-voltage devices in the future IC design.
Due to the trends of SOC and CMOS technology, more circuits will be deigned with low-voltage processes and integrated in a single chip. Thus, not only the I/O circuits and charge pump circuits but also other circuits, such as OPAMP (operational amplifier), ADC (analog-to-digital converter), and so on, must be designed in low-voltage CMOS processes for high-voltage applications. Such design topic still continues to the future research.
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VITA
姓 名：陳世倫 (Shih-Lun Chen) 性 別：男
出生日期：民國 65 年 10 月 13 日 出 生 地：台北市
住 址：台北市松山區吉仁里 1 鄰八德路 3 段 120 號 6 樓
學 歷：私立輔仁大學電子工程系畢業 (84 年 9 月 - 88 年 6 月)
私立輔仁大學電子工程系碩士班畢業 (88 年 9 月 - 90 年 6 月) 國立交通大學電子研究所博士班 (90 年 9 月入學)
論文名稱：低電壓互補式金氧半製程下的高電壓電路設計
High-Voltage Circuit Design in Low-Voltage CMOS Processes
PUBLICATION LIST
(A) Regular Journal Papers
[1] H.-Y. Huang and Shih-Lun Chen, “Interconnect accelerating techniques for sub-100 nm giga-scale systems,” IEEE Trans. VLSI Systems, vol.12, pp. 1192−1200, Nov.
2004.
[2] M.-D. Ker, Shih-Lun Chen, and C.-S. Tsai, “Design of charge pump circuit with consideration of gate-oxide reliability in low-voltage process,” IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1100−1107, May 2006.
[3] M.-D. Ker, Shih-Lun Chen, and C.-S. Tsai, “Overview and design of mixed-voltage I/O buffers with low-voltage thin-oxide CMOS transistors,” IEEE Trans. Circuits Syst. I: Regular Papers, in press, 2006.
[4] M.-D. Ker and Shih-Lun Chen, “Design of mixed-voltage I/O buffer by using NMOS-blocking technique,” IEEE J. Solid-State Circuits, in press, 2006.
(B) Brief Journal Papers
[1] Shih-Lun Chen and M.-D. Ker, “A new Schmitt trigger circuit in a 0.13-μm 1/2.5-V CMOS process to receive 3.3-V input signals,” IEEE Trans. Circuits Syst. II:
Express Briefs, vol. 52, no. 7, pp. 361−365, July 2005.
[2] Shih-Lun Chen and M.-D. Ker, “An output buffer for 3.3-V applications in a 0.13-μm 1/2.5-V CMOS process,” Revised by IEEE Trans. Circuits Syst. II: Express Briefs.
[3] M.-D. Ker and Shih-Lun Chen, “Ultra-high-voltage charge pump circuit in low-voltage bulk CMOS processes with polysilicon diodes,” Accepted by IEEE Trans. Circuits Syst. II: Express Briefs.
(C) International Conference Papers
[1] H.-Y. Huang and Shih-Lun Chen, “Input isolated sense amplifiers,” in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), Scottsdale, Arizona, USA, May 2002, vol. 4, pp.
587−590.
[2] H.-Y. Huang and Shih-Lun Chen, “Self-isolated gain-enhanced sense amplifier,” in Proc. IEEE Asia-Pacific Conf. ASIC (AP-ASIC), Taipei, Taiwan, Aug. 2002, pp, 57−60.
[3] H.-Y. Huang and Shih-Lun Chen, “High-speed receivers for on-chip interconnections in deep-submicron process,” in Proc. IEEE Int. Conf. Electronics, Circuits, Syst. (ICECS), Sept. 2002, vol. 2, pp. 769−772.
[4] H.-Y. Huang and Shih-Lun Chen, “Threshold triggers and accelerator for deep submicron interconnection,” in Proc. IEEE Asia-Pacific Conf. Circuits Syst.
(APCCAS), Oct. 2002, vol. 2, pp. 143−146.
[5] M.-D. Ker, Shih-Lun Chen, and C.-S. Tsai, “A new charge pump circuit dealing with gate-oxide reliability issue in low-voltage process,” in Proc. IEEE Int. Symp.
Circuits Syst. (ISCAS), Vancouver, British Columbia, Canada, May 2004, vol. 1, pp.
321−325.
[6] Shih-Lun Chen and M.-D. Ker, “A new Schmitt trigger circuit in a 0.13 μm 1/2.5 V CMOS process to receive 3.3 V input signals,” in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), Vancouver, British Columbia, Canada, May 2004, vol. 2, pp.
573−576.
[7] Shih-Lun Chen and M.-D. Ker, “A new output buffer for 3.3-V PCI-X
applications in a 0.13 μm 1/2.5 V CMOS process,” in Proc. IEEE Asia-Pacific conf.
ASIC (AP-ASIC), Fukuoka, Japan. Aug. 2004, pp. 112−115.
[8] H.-Y. Huang, C.-C. Wu, and Shih-Lun Chen, “Simultaneous current-mode bi-directional signaling for on-chip interconnection,” in Proc. IEEE Asia-Pacific conf. ASIC (AP-ASIC), Fukuoka, Japan, 2004, pp. 380−383.
[9] M.-D. Ker and Shih-Lun Chen, “Mixed-voltage I/O buffer with dynamic gate-bias circuit to achieve 3×VDD input tolerance by using 1×VDD devices and single VDD power supply,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2005, pp. 524−525, 614.
[10] M.-D. Ker, Shih-Lun Chen, and C.-S. Tsai, “Design on mixed-voltage I/O buffer with blocking NMOS and dynamic gate-controlled circuit for high-voltage-tolerant applications,” in Proc. IEEE Int. Symp. Circuits Syst. (ISCAS), Kobe, Japan, May 2005, pp. 1859−1862.
[11] M.-D. Ker and Shih-Lun Chen, “On-chip high-voltage charge pump circuit in standard CMOS process with polysilicon diodes,” in Proc. IEEE Asian Solid-State Circuits Conf. (A-SSCC), Hsinchu, Taiwan, Nov. 2005, pp.157−160.
(D) Local Conference Papers
[1] H.-Y. Huang and Shih-Lun Chen, “Sense amplifiers for high-speed interconnection design,” in Proc. 12th VLSI Design/CAD Symp., Hsinchu, Taiwan, Aug. 2001.
[2] H.-Y. Huang and Shih-Lun Chen, “Deep submicron interconnection triggers and accelerator,” in Proc. 13th VLSI Design/CAD Symp., Taitung, Taiwan, Aug. 2002.
[3] Shih-Lun Chen and M.-D. Ker, “Schmitt trigger circuit realized by only thin-gate-oxide devices to receive high-voltage input signals in a 0.13-μm CMOS process,” in Proc. 15th VLSI Design/CAD Symp., Kenting, Taiwan, Aug. 2004.
[4] H.-Y. Huang, C.-C. Wu, and Shih-Lun Chen, “Simultaneous current-mode bi-directional transceiver,” in Proc. 15th VLSI Design/CAD Symp., Kenting, Taiwan, Aug. 2004.
(E) U.S. Patents
[1] H.-Y. Huang and Shih-Lun Chen, “Apparatus for capacitor-coupling acceleration,”
U.S. Patent 6850089, Feb. 1, 2005.
[2] Shih-Lun Chen and M.-D. Ker, “Output buffer with low-voltage devices to drive high-voltage signals for PCI-X applications,” U.S. Patent 7046036, May 16, 2006.
[3] Shih-Lun Chen and M.-D. Ker, “Schmitt trigger circuit realized with low-voltage devices for high-voltage signal application,” U.S. Patent pending.
[4] M.-D. Ker and Shih-Lun Chen, “Mixed-voltage I/O buffer with low-voltage devices,” U.S. Patent pending.
[5] M.-D. Ker and Shih-Lun Chen, “Small output ripple charge pump regulator by using multi-phase clock signals,” U.S. Patent pending.
[5] M.-D. Ker and Shih-Lun Chen, “Small output ripple charge pump regulator by using multi-phase clock signals,” U.S. Patent pending.