[PDF] Top 20 Optimal design of triple-gate devices for high-performance and low-power applications
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Optimal design of triple-gate devices for high-performance and low-power applications
... speed high-density bipolar SRAMs, multigigabit-per-second fiber-optic data- link circuits, and scaling issues for bipolar/BiCMOS devices and ...the High Performance ... See full document
6
High Performance Metal-Gate/High-kappa GaN MOSFET With Good Reliability for Both Logic and Power Applications
... Laboratory of Microelectronic Devices and Circuits, Institute of Microelectronics, Peking University, Beijing 100871, China CORRESPONDING AUTHOR: ...Ministry of Science and ... See full document
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Modeling and design of the high performance step SOI-LIGBT power devices by partition mid-point method
... reliability of surrounding low power cells on the same chip ...descriptions and can be easily realized by different implant ...mask of the step doping case is a serious problem in the ... See full document
6
Design of Bidirectional and Low Power Consumption Gate Driver in Amorphous Silicon Technology for TFT-LCD Application
... (a-Si), gate driver, thin-film transistor liquid crystal display ...variety of portable electronic devices have been introduced with small displays such as cellular phone and PDA (Personal ... See full document
9
Linearity and power characteristics of SiGeHBTs at high temperatures for RF applications
... One of the solutions to meet these requirements is to integrate receiver, transmitter, and other processing circuits on a single ...chip. Devices made from III-V materials exhibit high-speed ... See full document
7
Design and analysis of on-chip ESD protection circuit with very low input capacitance for high-precision analog applications
... view of the ggNMOS with the silicide-blocking drain ...circuit performance due to the nonlinear input capacitance of the input ESD clamp devices had been reported in [8], where the input ... See full document
22
Investigation of impact ionization in InAs-channel HEMT ford high-speed and low-power applications
... IEEE, and Guo-Wei Huang, Member, IEEE Abstract—An 80-nm InP high electron mobility transistor (HEMT) with InAs channel and InGaAs subchannels has been ...The high current gain cutoff frequency ... See full document
3
Impacts of NBTI/PBTI and Contact Resistance on Power-Gated SRAM With High-kappa Metal-Gate Devices
... bipolar devices, technology, and ...properties of epitaxial Schottky barrier diodes, did pioneering works on the perimeter effects of advanced double-poly self-aligned bipolar transistors, ... See full document
13
Optimal design of CMOS pseudoactive pixel sensor (PAPS) structure for low-dark-current and large-array-size imager applications
... the optimal OPAPS structure, has been proposed and analyzed for the applications of CMOS im- ...current of photodiodes, and decrease the leakage current of ... See full document
8
InAs-Channel High-Electron-Mobility Transistors for Ultralow-Power Low Noise Amplifier Applications
... High-indium-content devices typically suffer from a marked kink effect, low breakdown voltage, and high output transconductance caused by electron–hole pair ...marked for InAs/AlSb ... See full document
4
InAs high electron mobility transistors with buried gate for ultralow-power-consumption low-noise amplifier application
... reduction of gate length seems to be a good approach, the limitation of such an approach lies mainly in the degradation of performance caused by the short channel ...parameters ... See full document
4
An ultra-low-power and portable digitally controlled oscillator for SoC applications
... The performance comparisons simulated at 200 MHz at 0.8 V and typical corner cases, are summarized in Table ...all of them have the similar performance in LSB resolution ex- cept Approach ... See full document
5
Evaluation of Sub-0.2 V High-Speed Low-Power Circuits Using Hetero-Channel MOSFET and Tunneling FET Devices
... doctoral and postdoctoral research in Silicon-On-Insulator (SOI) devices at ...one of the major contributors to the unified BSIMSOI model, the first industrial standard SOI MOSFET model for ... See full document
9
Design and Implementation of a High-Voltage High-Frequency Pulse Power Generation System for Plasma Applications
... active and passive determined by the power switching elements of the two ...opposite power switches are ...active. For phase shift control and with the lossless snubbing ... See full document
5
Design and implementation of a high-performance and complexity-effective VLIW DSP for multimedia applications
... the design and implementation of a novel VLIW digital signal processor (DSP) for multimedia ...area and improves 46.9% access time of centralized ones found in most VLIW ... See full document
15
Design of Low-Power and High Speed Ten-Transistor Full Adders
... 在 42 種架構的全加器，經過 H-Spice 模擬後， 經 過 比 較 所 挑 選 出 ， 取 平 均 功 率 消 耗 (Power Dissipation, Pd)最低的三者表列；表 6 與圖 13 是電 FA-31、FA-32 和 FA-40 是 42 種架構的全加器中， ... See full document
6
Low-Power Programmable Pseudorandom Word Generator and Clock Multiplier Unit for High-Speed SerDes Applications
... sensitivity of the VCO core, its output fre- quency is adjusted by a dual-loop frequency-tuning ...positive and negative ...loading of the delay stage is reduced for high-speed ...M7 ... See full document
7
Design and Simulation of a Low Power Rake Receiver for Indoor Communication
... Eltawil and Babak Daneshrad, “A Low-Power DS-CDMA RAKE Receiver Utilizing Resource Allocation Techniques”, IEEE JSSC, ...Li and Hsueh-Jyh Li, “A Novel RAKE Receiver Finger Number Decisio n ... See full document
32
Optimal design theories and applications of tuned mass dampers
... extensive applications of the TMD. The optimal design parameters of the TMD are systematically determined to minimize the mean square value of the structural responses in the ... See full document
11
Low power and power aware fractional motion estimation of H.264/AVC for mobile applications
... Furthermore, if the PERFORMANCE OF CANDIDATE LEVEL DR FOR THE PROPOSED PARALLEL power is very low, we can even support only half-pel or integer- ARCHITECTURE.. pel resolution with one re[r] ... See full document
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